;
; File Name: cydevicerv_trm.inc
; 
; PSoC Creator  4.2
;
; Description:
; This file provides all of the address values for the entire PSoC device.
;
;-------------------------------------------------------------------------------
; Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
; You may use this file only in accordance with the license, terms, conditions, 
; disclaimers, and limitations in the end user license agreement accompanying 
; the software package with which this file was provided.
;-------------------------------------------------------------------------------

    IF :LNOT::DEF:CYDEV_FLASH_BASE
CYDEV_FLASH_BASE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYDEV_FLASH_SIZE
CYDEV_FLASH_SIZE EQU 0x00020000
    ENDIF
    IF :LNOT::DEF:CYREG_FLASH_DATA_MBASE
CYREG_FLASH_DATA_MBASE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYREG_FLASH_DATA_MSIZE
CYREG_FLASH_DATA_MSIZE EQU 0x00020000
    ENDIF
    IF :LNOT::DEF:CYDEV_SFLASH_BASE
CYDEV_SFLASH_BASE EQU 0x0ffff000
    ENDIF
    IF :LNOT::DEF:CYDEV_SFLASH_SIZE
CYDEV_SFLASH_SIZE EQU 0x00000800
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW0
CYREG_SFLASH_PROT_ROW0 EQU 0x0ffff000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_DATA8__OFFSET
CYFLD_SFLASH_DATA8__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_DATA8__SIZE
CYFLD_SFLASH_DATA8__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW1
CYREG_SFLASH_PROT_ROW1 EQU 0x0ffff001
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW2
CYREG_SFLASH_PROT_ROW2 EQU 0x0ffff002
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW3
CYREG_SFLASH_PROT_ROW3 EQU 0x0ffff003
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW4
CYREG_SFLASH_PROT_ROW4 EQU 0x0ffff004
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW5
CYREG_SFLASH_PROT_ROW5 EQU 0x0ffff005
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW6
CYREG_SFLASH_PROT_ROW6 EQU 0x0ffff006
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW7
CYREG_SFLASH_PROT_ROW7 EQU 0x0ffff007
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW8
CYREG_SFLASH_PROT_ROW8 EQU 0x0ffff008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW9
CYREG_SFLASH_PROT_ROW9 EQU 0x0ffff009
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW10
CYREG_SFLASH_PROT_ROW10 EQU 0x0ffff00a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW11
CYREG_SFLASH_PROT_ROW11 EQU 0x0ffff00b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW12
CYREG_SFLASH_PROT_ROW12 EQU 0x0ffff00c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW13
CYREG_SFLASH_PROT_ROW13 EQU 0x0ffff00d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW14
CYREG_SFLASH_PROT_ROW14 EQU 0x0ffff00e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW15
CYREG_SFLASH_PROT_ROW15 EQU 0x0ffff00f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW16
CYREG_SFLASH_PROT_ROW16 EQU 0x0ffff010
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW17
CYREG_SFLASH_PROT_ROW17 EQU 0x0ffff011
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW18
CYREG_SFLASH_PROT_ROW18 EQU 0x0ffff012
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW19
CYREG_SFLASH_PROT_ROW19 EQU 0x0ffff013
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW20
CYREG_SFLASH_PROT_ROW20 EQU 0x0ffff014
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW21
CYREG_SFLASH_PROT_ROW21 EQU 0x0ffff015
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW22
CYREG_SFLASH_PROT_ROW22 EQU 0x0ffff016
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW23
CYREG_SFLASH_PROT_ROW23 EQU 0x0ffff017
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW24
CYREG_SFLASH_PROT_ROW24 EQU 0x0ffff018
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW25
CYREG_SFLASH_PROT_ROW25 EQU 0x0ffff019
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW26
CYREG_SFLASH_PROT_ROW26 EQU 0x0ffff01a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW27
CYREG_SFLASH_PROT_ROW27 EQU 0x0ffff01b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW28
CYREG_SFLASH_PROT_ROW28 EQU 0x0ffff01c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW29
CYREG_SFLASH_PROT_ROW29 EQU 0x0ffff01d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW30
CYREG_SFLASH_PROT_ROW30 EQU 0x0ffff01e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW31
CYREG_SFLASH_PROT_ROW31 EQU 0x0ffff01f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW32
CYREG_SFLASH_PROT_ROW32 EQU 0x0ffff020
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW33
CYREG_SFLASH_PROT_ROW33 EQU 0x0ffff021
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW34
CYREG_SFLASH_PROT_ROW34 EQU 0x0ffff022
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW35
CYREG_SFLASH_PROT_ROW35 EQU 0x0ffff023
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW36
CYREG_SFLASH_PROT_ROW36 EQU 0x0ffff024
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW37
CYREG_SFLASH_PROT_ROW37 EQU 0x0ffff025
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW38
CYREG_SFLASH_PROT_ROW38 EQU 0x0ffff026
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW39
CYREG_SFLASH_PROT_ROW39 EQU 0x0ffff027
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW40
CYREG_SFLASH_PROT_ROW40 EQU 0x0ffff028
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW41
CYREG_SFLASH_PROT_ROW41 EQU 0x0ffff029
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW42
CYREG_SFLASH_PROT_ROW42 EQU 0x0ffff02a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW43
CYREG_SFLASH_PROT_ROW43 EQU 0x0ffff02b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW44
CYREG_SFLASH_PROT_ROW44 EQU 0x0ffff02c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW45
CYREG_SFLASH_PROT_ROW45 EQU 0x0ffff02d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW46
CYREG_SFLASH_PROT_ROW46 EQU 0x0ffff02e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW47
CYREG_SFLASH_PROT_ROW47 EQU 0x0ffff02f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW48
CYREG_SFLASH_PROT_ROW48 EQU 0x0ffff030
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW49
CYREG_SFLASH_PROT_ROW49 EQU 0x0ffff031
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW50
CYREG_SFLASH_PROT_ROW50 EQU 0x0ffff032
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW51
CYREG_SFLASH_PROT_ROW51 EQU 0x0ffff033
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW52
CYREG_SFLASH_PROT_ROW52 EQU 0x0ffff034
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW53
CYREG_SFLASH_PROT_ROW53 EQU 0x0ffff035
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW54
CYREG_SFLASH_PROT_ROW54 EQU 0x0ffff036
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW55
CYREG_SFLASH_PROT_ROW55 EQU 0x0ffff037
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW56
CYREG_SFLASH_PROT_ROW56 EQU 0x0ffff038
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW57
CYREG_SFLASH_PROT_ROW57 EQU 0x0ffff039
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW58
CYREG_SFLASH_PROT_ROW58 EQU 0x0ffff03a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW59
CYREG_SFLASH_PROT_ROW59 EQU 0x0ffff03b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW60
CYREG_SFLASH_PROT_ROW60 EQU 0x0ffff03c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW61
CYREG_SFLASH_PROT_ROW61 EQU 0x0ffff03d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW62
CYREG_SFLASH_PROT_ROW62 EQU 0x0ffff03e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW63
CYREG_SFLASH_PROT_ROW63 EQU 0x0ffff03f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_PROTECTION
CYREG_SFLASH_PROT_PROTECTION EQU 0x0ffff07f
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_PROT_LEVEL__OFFSET
CYFLD_SFLASH_PROT_LEVEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_PROT_LEVEL__SIZE
CYFLD_SFLASH_PROT_LEVEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SFLASH_PROT_LEVEL_VIRGIN
CYVAL_SFLASH_PROT_LEVEL_VIRGIN EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SFLASH_PROT_LEVEL_OPEN
CYVAL_SFLASH_PROT_LEVEL_OPEN EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SFLASH_PROT_LEVEL_PROTECTED
CYVAL_SFLASH_PROT_LEVEL_PROTECTED EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SFLASH_PROT_LEVEL_KILL
CYVAL_SFLASH_PROT_LEVEL_KILL EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B0
CYREG_SFLASH_AV_PAIRS_8B0 EQU 0x0ffff080
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B1
CYREG_SFLASH_AV_PAIRS_8B1 EQU 0x0ffff081
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B2
CYREG_SFLASH_AV_PAIRS_8B2 EQU 0x0ffff082
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B3
CYREG_SFLASH_AV_PAIRS_8B3 EQU 0x0ffff083
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B4
CYREG_SFLASH_AV_PAIRS_8B4 EQU 0x0ffff084
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B5
CYREG_SFLASH_AV_PAIRS_8B5 EQU 0x0ffff085
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B6
CYREG_SFLASH_AV_PAIRS_8B6 EQU 0x0ffff086
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B7
CYREG_SFLASH_AV_PAIRS_8B7 EQU 0x0ffff087
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B8
CYREG_SFLASH_AV_PAIRS_8B8 EQU 0x0ffff088
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B9
CYREG_SFLASH_AV_PAIRS_8B9 EQU 0x0ffff089
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B10
CYREG_SFLASH_AV_PAIRS_8B10 EQU 0x0ffff08a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B11
CYREG_SFLASH_AV_PAIRS_8B11 EQU 0x0ffff08b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B12
CYREG_SFLASH_AV_PAIRS_8B12 EQU 0x0ffff08c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B13
CYREG_SFLASH_AV_PAIRS_8B13 EQU 0x0ffff08d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B14
CYREG_SFLASH_AV_PAIRS_8B14 EQU 0x0ffff08e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B15
CYREG_SFLASH_AV_PAIRS_8B15 EQU 0x0ffff08f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B16
CYREG_SFLASH_AV_PAIRS_8B16 EQU 0x0ffff090
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B17
CYREG_SFLASH_AV_PAIRS_8B17 EQU 0x0ffff091
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B18
CYREG_SFLASH_AV_PAIRS_8B18 EQU 0x0ffff092
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B19
CYREG_SFLASH_AV_PAIRS_8B19 EQU 0x0ffff093
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B20
CYREG_SFLASH_AV_PAIRS_8B20 EQU 0x0ffff094
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B21
CYREG_SFLASH_AV_PAIRS_8B21 EQU 0x0ffff095
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B22
CYREG_SFLASH_AV_PAIRS_8B22 EQU 0x0ffff096
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B23
CYREG_SFLASH_AV_PAIRS_8B23 EQU 0x0ffff097
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B24
CYREG_SFLASH_AV_PAIRS_8B24 EQU 0x0ffff098
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B25
CYREG_SFLASH_AV_PAIRS_8B25 EQU 0x0ffff099
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B26
CYREG_SFLASH_AV_PAIRS_8B26 EQU 0x0ffff09a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B27
CYREG_SFLASH_AV_PAIRS_8B27 EQU 0x0ffff09b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B28
CYREG_SFLASH_AV_PAIRS_8B28 EQU 0x0ffff09c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B29
CYREG_SFLASH_AV_PAIRS_8B29 EQU 0x0ffff09d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B30
CYREG_SFLASH_AV_PAIRS_8B30 EQU 0x0ffff09e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B31
CYREG_SFLASH_AV_PAIRS_8B31 EQU 0x0ffff09f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B32
CYREG_SFLASH_AV_PAIRS_8B32 EQU 0x0ffff0a0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B33
CYREG_SFLASH_AV_PAIRS_8B33 EQU 0x0ffff0a1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B34
CYREG_SFLASH_AV_PAIRS_8B34 EQU 0x0ffff0a2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B35
CYREG_SFLASH_AV_PAIRS_8B35 EQU 0x0ffff0a3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B36
CYREG_SFLASH_AV_PAIRS_8B36 EQU 0x0ffff0a4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B37
CYREG_SFLASH_AV_PAIRS_8B37 EQU 0x0ffff0a5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B38
CYREG_SFLASH_AV_PAIRS_8B38 EQU 0x0ffff0a6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B39
CYREG_SFLASH_AV_PAIRS_8B39 EQU 0x0ffff0a7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B40
CYREG_SFLASH_AV_PAIRS_8B40 EQU 0x0ffff0a8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B41
CYREG_SFLASH_AV_PAIRS_8B41 EQU 0x0ffff0a9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B42
CYREG_SFLASH_AV_PAIRS_8B42 EQU 0x0ffff0aa
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B43
CYREG_SFLASH_AV_PAIRS_8B43 EQU 0x0ffff0ab
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B44
CYREG_SFLASH_AV_PAIRS_8B44 EQU 0x0ffff0ac
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B45
CYREG_SFLASH_AV_PAIRS_8B45 EQU 0x0ffff0ad
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B46
CYREG_SFLASH_AV_PAIRS_8B46 EQU 0x0ffff0ae
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B47
CYREG_SFLASH_AV_PAIRS_8B47 EQU 0x0ffff0af
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B48
CYREG_SFLASH_AV_PAIRS_8B48 EQU 0x0ffff0b0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B49
CYREG_SFLASH_AV_PAIRS_8B49 EQU 0x0ffff0b1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B50
CYREG_SFLASH_AV_PAIRS_8B50 EQU 0x0ffff0b2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B51
CYREG_SFLASH_AV_PAIRS_8B51 EQU 0x0ffff0b3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B52
CYREG_SFLASH_AV_PAIRS_8B52 EQU 0x0ffff0b4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B53
CYREG_SFLASH_AV_PAIRS_8B53 EQU 0x0ffff0b5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B54
CYREG_SFLASH_AV_PAIRS_8B54 EQU 0x0ffff0b6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B55
CYREG_SFLASH_AV_PAIRS_8B55 EQU 0x0ffff0b7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B56
CYREG_SFLASH_AV_PAIRS_8B56 EQU 0x0ffff0b8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B57
CYREG_SFLASH_AV_PAIRS_8B57 EQU 0x0ffff0b9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B58
CYREG_SFLASH_AV_PAIRS_8B58 EQU 0x0ffff0ba
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B59
CYREG_SFLASH_AV_PAIRS_8B59 EQU 0x0ffff0bb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B60
CYREG_SFLASH_AV_PAIRS_8B60 EQU 0x0ffff0bc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B61
CYREG_SFLASH_AV_PAIRS_8B61 EQU 0x0ffff0bd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B62
CYREG_SFLASH_AV_PAIRS_8B62 EQU 0x0ffff0be
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B63
CYREG_SFLASH_AV_PAIRS_8B63 EQU 0x0ffff0bf
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B64
CYREG_SFLASH_AV_PAIRS_8B64 EQU 0x0ffff0c0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B65
CYREG_SFLASH_AV_PAIRS_8B65 EQU 0x0ffff0c1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B66
CYREG_SFLASH_AV_PAIRS_8B66 EQU 0x0ffff0c2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B67
CYREG_SFLASH_AV_PAIRS_8B67 EQU 0x0ffff0c3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B68
CYREG_SFLASH_AV_PAIRS_8B68 EQU 0x0ffff0c4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B69
CYREG_SFLASH_AV_PAIRS_8B69 EQU 0x0ffff0c5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B70
CYREG_SFLASH_AV_PAIRS_8B70 EQU 0x0ffff0c6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B71
CYREG_SFLASH_AV_PAIRS_8B71 EQU 0x0ffff0c7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B72
CYREG_SFLASH_AV_PAIRS_8B72 EQU 0x0ffff0c8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B73
CYREG_SFLASH_AV_PAIRS_8B73 EQU 0x0ffff0c9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B74
CYREG_SFLASH_AV_PAIRS_8B74 EQU 0x0ffff0ca
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B75
CYREG_SFLASH_AV_PAIRS_8B75 EQU 0x0ffff0cb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B76
CYREG_SFLASH_AV_PAIRS_8B76 EQU 0x0ffff0cc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B77
CYREG_SFLASH_AV_PAIRS_8B77 EQU 0x0ffff0cd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B78
CYREG_SFLASH_AV_PAIRS_8B78 EQU 0x0ffff0ce
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B79
CYREG_SFLASH_AV_PAIRS_8B79 EQU 0x0ffff0cf
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B80
CYREG_SFLASH_AV_PAIRS_8B80 EQU 0x0ffff0d0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B81
CYREG_SFLASH_AV_PAIRS_8B81 EQU 0x0ffff0d1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B82
CYREG_SFLASH_AV_PAIRS_8B82 EQU 0x0ffff0d2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B83
CYREG_SFLASH_AV_PAIRS_8B83 EQU 0x0ffff0d3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B84
CYREG_SFLASH_AV_PAIRS_8B84 EQU 0x0ffff0d4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B85
CYREG_SFLASH_AV_PAIRS_8B85 EQU 0x0ffff0d5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B86
CYREG_SFLASH_AV_PAIRS_8B86 EQU 0x0ffff0d6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B87
CYREG_SFLASH_AV_PAIRS_8B87 EQU 0x0ffff0d7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_BLESS_BB_BUMP2
CYREG_SFLASH_BLESS_BB_BUMP2 EQU 0x0ffff0d8
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_V2I_RCAL__OFFSET
CYFLD_SFLASH_V2I_RCAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_V2I_RCAL__SIZE
CYFLD_SFLASH_V2I_RCAL__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_V2I__OFFSET
CYFLD_SFLASH_V2I__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_V2I__SIZE
CYFLD_SFLASH_V2I__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VBG_TRIM__OFFSET
CYFLD_SFLASH_VBG_TRIM__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VBG_TRIM__SIZE
CYFLD_SFLASH_VBG_TRIM__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_SY_IBIAS__OFFSET
CYFLD_SFLASH_SY_IBIAS__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_SY_IBIAS__SIZE
CYFLD_SFLASH_SY_IBIAS__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B88
CYREG_SFLASH_AV_PAIRS_8B88 EQU 0x0ffff0d8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B89
CYREG_SFLASH_AV_PAIRS_8B89 EQU 0x0ffff0d9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_BLESS_BB_XO
CYREG_SFLASH_BLESS_BB_XO EQU 0x0ffff0da
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_DIS_XOCORE_SUPFILT__OFFSET
CYFLD_SFLASH_DIS_XOCORE_SUPFILT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_DIS_XOCORE_SUPFILT__SIZE
CYFLD_SFLASH_DIS_XOCORE_SUPFILT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_EN_RE_FASTSTART__OFFSET
CYFLD_SFLASH_EN_RE_FASTSTART__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_EN_RE_FASTSTART__SIZE
CYFLD_SFLASH_EN_RE_FASTSTART__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_EN_CURMEAS__OFFSET
CYFLD_SFLASH_EN_CURMEAS__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_EN_CURMEAS__SIZE
CYFLD_SFLASH_EN_CURMEAS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_EN_AMPDET_CURMEAS__OFFSET
CYFLD_SFLASH_EN_AMPDET_CURMEAS__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_EN_AMPDET_CURMEAS__SIZE
CYFLD_SFLASH_EN_AMPDET_CURMEAS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_EN_AMPDET_FASTSTART__OFFSET
CYFLD_SFLASH_EN_AMPDET_FASTSTART__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_EN_AMPDET_FASTSTART__SIZE
CYFLD_SFLASH_EN_AMPDET_FASTSTART__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CTRL_RC_FASTSTART_RES__OFFSET
CYFLD_SFLASH_CTRL_RC_FASTSTART_RES__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CTRL_RC_FASTSTART_RES__SIZE
CYFLD_SFLASH_CTRL_RC_FASTSTART_RES__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CTRL_VDDL_XO__OFFSET
CYFLD_SFLASH_CTRL_VDDL_XO__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CTRL_VDDL_XO__SIZE
CYFLD_SFLASH_CTRL_VDDL_XO__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CTRL_VDDL_XB__OFFSET
CYFLD_SFLASH_CTRL_VDDL_XB__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CTRL_VDDL_XB__SIZE
CYFLD_SFLASH_CTRL_VDDL_XB__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CTRL_RPREF__OFFSET
CYFLD_SFLASH_CTRL_RPREF__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CTRL_RPREF__SIZE
CYFLD_SFLASH_CTRL_RPREF__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_rev_bb_xo__OFFSET
CYFLD_SFLASH_rev_bb_xo__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_rev_bb_xo__SIZE
CYFLD_SFLASH_rev_bb_xo__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B90
CYREG_SFLASH_AV_PAIRS_8B90 EQU 0x0ffff0da
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B91
CYREG_SFLASH_AV_PAIRS_8B91 EQU 0x0ffff0db
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B92
CYREG_SFLASH_AV_PAIRS_8B92 EQU 0x0ffff0dc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_BLESS_SY_BUMP1
CYREG_SFLASH_BLESS_SY_BUMP1 EQU 0x0ffff0dc
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VCO__OFFSET
CYFLD_SFLASH_VCO__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VCO__SIZE
CYFLD_SFLASH_VCO__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_LOFB_POWERSAVE__OFFSET
CYFLD_SFLASH_LOFB_POWERSAVE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_LOFB_POWERSAVE__SIZE
CYFLD_SFLASH_LOFB_POWERSAVE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_IBIAS_LOPATH__OFFSET
CYFLD_SFLASH_IBIAS_LOPATH__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_IBIAS_LOPATH__SIZE
CYFLD_SFLASH_IBIAS_LOPATH__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_LDOLO_FORCE_STARTUP__OFFSET
CYFLD_SFLASH_LDOLO_FORCE_STARTUP__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_LDOLO_FORCE_STARTUP__SIZE
CYFLD_SFLASH_LDOLO_FORCE_STARTUP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_LOPATH__OFFSET
CYFLD_SFLASH_LOPATH__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_LOPATH__SIZE
CYFLD_SFLASH_LOPATH__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_PDCPLPF__OFFSET
CYFLD_SFLASH_PDCPLPF__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_PDCPLPF__SIZE
CYFLD_SFLASH_PDCPLPF__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B93
CYREG_SFLASH_AV_PAIRS_8B93 EQU 0x0ffff0dd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B94
CYREG_SFLASH_AV_PAIRS_8B94 EQU 0x0ffff0de
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_BLESS_LDO
CYREG_SFLASH_BLESS_LDO EQU 0x0ffff0de
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_BALUM_HF__OFFSET
CYFLD_SFLASH_BUMP_BALUM_HF__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_BALUM_HF__SIZE
CYFLD_SFLASH_BUMP_BALUM_HF__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_SY_VCO__OFFSET
CYFLD_SFLASH_BUMP_SY_VCO__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_SY_VCO__SIZE
CYFLD_SFLASH_BUMP_SY_VCO__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_SY_LOPATH__OFFSET
CYFLD_SFLASH_BUMP_SY_LOPATH__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_SY_LOPATH__SIZE
CYFLD_SFLASH_BUMP_SY_LOPATH__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_SY_LHV__OFFSET
CYFLD_SFLASH_BUMP_SY_LHV__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_SY_LHV__SIZE
CYFLD_SFLASH_BUMP_SY_LHV__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_SY_FFFB__OFFSET
CYFLD_SFLASH_BUMP_SY_FFFB__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BUMP_SY_FFFB__SIZE
CYFLD_SFLASH_BUMP_SY_FFFB__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_REV_LDO__OFFSET
CYFLD_SFLASH_REV_LDO__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_REV_LDO__SIZE
CYFLD_SFLASH_REV_LDO__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B95
CYREG_SFLASH_AV_PAIRS_8B95 EQU 0x0ffff0df
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B96
CYREG_SFLASH_AV_PAIRS_8B96 EQU 0x0ffff0e0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B97
CYREG_SFLASH_AV_PAIRS_8B97 EQU 0x0ffff0e1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B98
CYREG_SFLASH_AV_PAIRS_8B98 EQU 0x0ffff0e2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B99
CYREG_SFLASH_AV_PAIRS_8B99 EQU 0x0ffff0e3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B100
CYREG_SFLASH_AV_PAIRS_8B100 EQU 0x0ffff0e4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B101
CYREG_SFLASH_AV_PAIRS_8B101 EQU 0x0ffff0e5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B102
CYREG_SFLASH_AV_PAIRS_8B102 EQU 0x0ffff0e6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B103
CYREG_SFLASH_AV_PAIRS_8B103 EQU 0x0ffff0e7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B104
CYREG_SFLASH_AV_PAIRS_8B104 EQU 0x0ffff0e8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B105
CYREG_SFLASH_AV_PAIRS_8B105 EQU 0x0ffff0e9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B106
CYREG_SFLASH_AV_PAIRS_8B106 EQU 0x0ffff0ea
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B107
CYREG_SFLASH_AV_PAIRS_8B107 EQU 0x0ffff0eb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B108
CYREG_SFLASH_AV_PAIRS_8B108 EQU 0x0ffff0ec
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B109
CYREG_SFLASH_AV_PAIRS_8B109 EQU 0x0ffff0ed
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B110
CYREG_SFLASH_AV_PAIRS_8B110 EQU 0x0ffff0ee
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B111
CYREG_SFLASH_AV_PAIRS_8B111 EQU 0x0ffff0ef
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B112
CYREG_SFLASH_AV_PAIRS_8B112 EQU 0x0ffff0f0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B113
CYREG_SFLASH_AV_PAIRS_8B113 EQU 0x0ffff0f1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B114
CYREG_SFLASH_AV_PAIRS_8B114 EQU 0x0ffff0f2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B115
CYREG_SFLASH_AV_PAIRS_8B115 EQU 0x0ffff0f3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B116
CYREG_SFLASH_AV_PAIRS_8B116 EQU 0x0ffff0f4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B117
CYREG_SFLASH_AV_PAIRS_8B117 EQU 0x0ffff0f5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B118
CYREG_SFLASH_AV_PAIRS_8B118 EQU 0x0ffff0f6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B119
CYREG_SFLASH_AV_PAIRS_8B119 EQU 0x0ffff0f7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B120
CYREG_SFLASH_AV_PAIRS_8B120 EQU 0x0ffff0f8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B121
CYREG_SFLASH_AV_PAIRS_8B121 EQU 0x0ffff0f9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B122
CYREG_SFLASH_AV_PAIRS_8B122 EQU 0x0ffff0fa
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B123
CYREG_SFLASH_AV_PAIRS_8B123 EQU 0x0ffff0fb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B124
CYREG_SFLASH_AV_PAIRS_8B124 EQU 0x0ffff0fc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B125
CYREG_SFLASH_AV_PAIRS_8B125 EQU 0x0ffff0fd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B126
CYREG_SFLASH_AV_PAIRS_8B126 EQU 0x0ffff0fe
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B127
CYREG_SFLASH_AV_PAIRS_8B127 EQU 0x0ffff0ff
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B0
CYREG_SFLASH_AV_PAIRS_32B0 EQU 0x0ffff100
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_DATA32__OFFSET
CYFLD_SFLASH_DATA32__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_DATA32__SIZE
CYFLD_SFLASH_DATA32__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B1
CYREG_SFLASH_AV_PAIRS_32B1 EQU 0x0ffff104
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B2
CYREG_SFLASH_AV_PAIRS_32B2 EQU 0x0ffff108
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B3
CYREG_SFLASH_AV_PAIRS_32B3 EQU 0x0ffff10c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B4
CYREG_SFLASH_AV_PAIRS_32B4 EQU 0x0ffff110
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B5
CYREG_SFLASH_AV_PAIRS_32B5 EQU 0x0ffff114
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B6
CYREG_SFLASH_AV_PAIRS_32B6 EQU 0x0ffff118
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B7
CYREG_SFLASH_AV_PAIRS_32B7 EQU 0x0ffff11c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B8
CYREG_SFLASH_AV_PAIRS_32B8 EQU 0x0ffff120
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B9
CYREG_SFLASH_AV_PAIRS_32B9 EQU 0x0ffff124
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B10
CYREG_SFLASH_AV_PAIRS_32B10 EQU 0x0ffff128
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B11
CYREG_SFLASH_AV_PAIRS_32B11 EQU 0x0ffff12c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B12
CYREG_SFLASH_AV_PAIRS_32B12 EQU 0x0ffff130
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B13
CYREG_SFLASH_AV_PAIRS_32B13 EQU 0x0ffff134
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B14
CYREG_SFLASH_AV_PAIRS_32B14 EQU 0x0ffff138
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B15
CYREG_SFLASH_AV_PAIRS_32B15 EQU 0x0ffff13c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_SILICON_ID
CYREG_SFLASH_SILICON_ID EQU 0x0ffff144
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_ID__OFFSET
CYFLD_SFLASH_ID__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_ID__SIZE
CYFLD_SFLASH_ID__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_HIB_KEY_DELAY
CYREG_SFLASH_HIB_KEY_DELAY EQU 0x0ffff150
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_WAKEUP_HOLDOFF__OFFSET
CYFLD_SFLASH_WAKEUP_HOLDOFF__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_WAKEUP_HOLDOFF__SIZE
CYFLD_SFLASH_WAKEUP_HOLDOFF__SIZE EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_DPSLP_KEY_DELAY
CYREG_SFLASH_DPSLP_KEY_DELAY EQU 0x0ffff152
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_SWD_CONFIG
CYREG_SFLASH_SWD_CONFIG EQU 0x0ffff154
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_SWD_SELECT__OFFSET
CYFLD_SFLASH_SWD_SELECT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_SWD_SELECT__SIZE
CYFLD_SFLASH_SWD_SELECT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_INITIAL_SPCIF_TRIM_M1_DAC0
CYREG_SFLASH_INITIAL_SPCIF_TRIM_M1_DAC0 EQU 0x0ffff155
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_IDAC__OFFSET
CYFLD_SFLASH_IDAC__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_IDAC__SIZE
CYFLD_SFLASH_IDAC__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_SLOPE__OFFSET
CYFLD_SFLASH_SLOPE__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_SLOPE__SIZE
CYFLD_SFLASH_SLOPE__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_SWD_LISTEN
CYREG_SFLASH_SWD_LISTEN EQU 0x0ffff158
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CYCLES__OFFSET
CYFLD_SFLASH_CYCLES__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CYCLES__SIZE
CYFLD_SFLASH_CYCLES__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_FLASH_START
CYREG_SFLASH_FLASH_START EQU 0x0ffff15c
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_ADDRESS__OFFSET
CYFLD_SFLASH_ADDRESS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_ADDRESS__SIZE
CYFLD_SFLASH_ADDRESS__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_CSD_TRIM1_HVIDAC
CYREG_SFLASH_CSD_TRIM1_HVIDAC EQU 0x0ffff160
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TRIM8__OFFSET
CYFLD_SFLASH_TRIM8__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TRIM8__SIZE
CYFLD_SFLASH_TRIM8__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_CSD_TRIM2_HVIDAC
CYREG_SFLASH_CSD_TRIM2_HVIDAC EQU 0x0ffff161
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_CSD_TRIM1_CSD
CYREG_SFLASH_CSD_TRIM1_CSD EQU 0x0ffff162
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_CSD_TRIM2_CSD
CYREG_SFLASH_CSD_TRIM2_CSD EQU 0x0ffff163
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_SAR_TEMP_MULTIPLIER
CYREG_SFLASH_SAR_TEMP_MULTIPLIER EQU 0x0ffff164
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TEMP_MULTIPLIER__OFFSET
CYFLD_SFLASH_TEMP_MULTIPLIER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TEMP_MULTIPLIER__SIZE
CYFLD_SFLASH_TEMP_MULTIPLIER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_SAR_TEMP_OFFSET
CYREG_SFLASH_SAR_TEMP_OFFSET EQU 0x0ffff166
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TEMP_OFFSET__OFFSET
CYFLD_SFLASH_TEMP_OFFSET__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TEMP_OFFSET__SIZE
CYFLD_SFLASH_TEMP_OFFSET__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY0
CYREG_SFLASH_PROT_VIRGINKEY0 EQU 0x0ffff170
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_KEY8__OFFSET
CYFLD_SFLASH_KEY8__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_KEY8__SIZE
CYFLD_SFLASH_KEY8__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY1
CYREG_SFLASH_PROT_VIRGINKEY1 EQU 0x0ffff171
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY2
CYREG_SFLASH_PROT_VIRGINKEY2 EQU 0x0ffff172
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY3
CYREG_SFLASH_PROT_VIRGINKEY3 EQU 0x0ffff173
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY4
CYREG_SFLASH_PROT_VIRGINKEY4 EQU 0x0ffff174
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY5
CYREG_SFLASH_PROT_VIRGINKEY5 EQU 0x0ffff175
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY6
CYREG_SFLASH_PROT_VIRGINKEY6 EQU 0x0ffff176
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_VIRGINKEY7
CYREG_SFLASH_PROT_VIRGINKEY7 EQU 0x0ffff177
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_DIE_LOT0
CYREG_SFLASH_DIE_LOT0 EQU 0x0ffff178
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_LOT__OFFSET
CYFLD_SFLASH_LOT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_LOT__SIZE
CYFLD_SFLASH_LOT__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_DIE_LOT1
CYREG_SFLASH_DIE_LOT1 EQU 0x0ffff179
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_DIE_LOT2
CYREG_SFLASH_DIE_LOT2 EQU 0x0ffff17a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_DIE_WAFER
CYREG_SFLASH_DIE_WAFER EQU 0x0ffff17b
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_WAFER__OFFSET
CYFLD_SFLASH_WAFER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_WAFER__SIZE
CYFLD_SFLASH_WAFER__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_DIE_X
CYREG_SFLASH_DIE_X EQU 0x0ffff17c
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_X__OFFSET
CYFLD_SFLASH_X__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_X__SIZE
CYFLD_SFLASH_X__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_DIE_Y
CYREG_SFLASH_DIE_Y EQU 0x0ffff17d
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_Y__OFFSET
CYFLD_SFLASH_Y__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_Y__SIZE
CYFLD_SFLASH_Y__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_DIE_SORT
CYREG_SFLASH_DIE_SORT EQU 0x0ffff17e
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_S1_PASS__OFFSET
CYFLD_SFLASH_S1_PASS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_S1_PASS__SIZE
CYFLD_SFLASH_S1_PASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_S2_PASS__OFFSET
CYFLD_SFLASH_S2_PASS__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_S2_PASS__SIZE
CYFLD_SFLASH_S2_PASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_S3_PASS__OFFSET
CYFLD_SFLASH_S3_PASS__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_S3_PASS__SIZE
CYFLD_SFLASH_S3_PASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CRI_PASS__OFFSET
CYFLD_SFLASH_CRI_PASS__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CRI_PASS__SIZE
CYFLD_SFLASH_CRI_PASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CHI_PASS__OFFSET
CYFLD_SFLASH_CHI_PASS__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_CHI_PASS__SIZE
CYFLD_SFLASH_CHI_PASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_ENG_PASS__OFFSET
CYFLD_SFLASH_ENG_PASS__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_ENG_PASS__SIZE
CYFLD_SFLASH_ENG_PASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_DIE_MINOR
CYREG_SFLASH_DIE_MINOR EQU 0x0ffff17f
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_MINOR__OFFSET
CYFLD_SFLASH_MINOR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_MINOR__SIZE
CYFLD_SFLASH_MINOR__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM_USBMODE_24
CYREG_SFLASH_IMO_TRIM_USBMODE_24 EQU 0x0ffff1be
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TRIM_24__OFFSET
CYFLD_SFLASH_TRIM_24__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TRIM_24__SIZE
CYFLD_SFLASH_TRIM_24__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM_USBMODE_48
CYREG_SFLASH_IMO_TRIM_USBMODE_48 EQU 0x0ffff1bf
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_MAXF0
CYREG_SFLASH_IMO_MAXF0 EQU 0x0ffff1c0
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_MAXFREQ__OFFSET
CYFLD_SFLASH_MAXFREQ__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_MAXFREQ__SIZE
CYFLD_SFLASH_MAXFREQ__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS0
CYREG_SFLASH_IMO_ABS0 EQU 0x0ffff1c1
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_ABS_TRIM_IMO__OFFSET
CYFLD_SFLASH_ABS_TRIM_IMO__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_ABS_TRIM_IMO__SIZE
CYFLD_SFLASH_ABS_TRIM_IMO__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO0
CYREG_SFLASH_IMO_TMPCO0 EQU 0x0ffff1c2
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TMPCO_TRIM_IMO__OFFSET
CYFLD_SFLASH_TMPCO_TRIM_IMO__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_TMPCO_TRIM_IMO__SIZE
CYFLD_SFLASH_TMPCO_TRIM_IMO__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_MAXF1
CYREG_SFLASH_IMO_MAXF1 EQU 0x0ffff1c3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS1
CYREG_SFLASH_IMO_ABS1 EQU 0x0ffff1c4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO1
CYREG_SFLASH_IMO_TMPCO1 EQU 0x0ffff1c5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_MAXF2
CYREG_SFLASH_IMO_MAXF2 EQU 0x0ffff1c6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS2
CYREG_SFLASH_IMO_ABS2 EQU 0x0ffff1c7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO2
CYREG_SFLASH_IMO_TMPCO2 EQU 0x0ffff1c8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_MAXF3
CYREG_SFLASH_IMO_MAXF3 EQU 0x0ffff1c9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS3
CYREG_SFLASH_IMO_ABS3 EQU 0x0ffff1ca
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO3
CYREG_SFLASH_IMO_TMPCO3 EQU 0x0ffff1cb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_ABS4
CYREG_SFLASH_IMO_ABS4 EQU 0x0ffff1cc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TMPCO4
CYREG_SFLASH_IMO_TMPCO4 EQU 0x0ffff1cd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM0
CYREG_SFLASH_IMO_TRIM0 EQU 0x0ffff1d0
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_OFFSET__OFFSET
CYFLD_SFLASH_OFFSET__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_OFFSET__SIZE
CYFLD_SFLASH_OFFSET__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM1
CYREG_SFLASH_IMO_TRIM1 EQU 0x0ffff1d1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM2
CYREG_SFLASH_IMO_TRIM2 EQU 0x0ffff1d2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM3
CYREG_SFLASH_IMO_TRIM3 EQU 0x0ffff1d3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM4
CYREG_SFLASH_IMO_TRIM4 EQU 0x0ffff1d4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM5
CYREG_SFLASH_IMO_TRIM5 EQU 0x0ffff1d5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM6
CYREG_SFLASH_IMO_TRIM6 EQU 0x0ffff1d6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM7
CYREG_SFLASH_IMO_TRIM7 EQU 0x0ffff1d7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM8
CYREG_SFLASH_IMO_TRIM8 EQU 0x0ffff1d8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM9
CYREG_SFLASH_IMO_TRIM9 EQU 0x0ffff1d9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM10
CYREG_SFLASH_IMO_TRIM10 EQU 0x0ffff1da
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM11
CYREG_SFLASH_IMO_TRIM11 EQU 0x0ffff1db
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM12
CYREG_SFLASH_IMO_TRIM12 EQU 0x0ffff1dc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM13
CYREG_SFLASH_IMO_TRIM13 EQU 0x0ffff1dd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM14
CYREG_SFLASH_IMO_TRIM14 EQU 0x0ffff1de
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM15
CYREG_SFLASH_IMO_TRIM15 EQU 0x0ffff1df
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM16
CYREG_SFLASH_IMO_TRIM16 EQU 0x0ffff1e0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM17
CYREG_SFLASH_IMO_TRIM17 EQU 0x0ffff1e1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM18
CYREG_SFLASH_IMO_TRIM18 EQU 0x0ffff1e2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM19
CYREG_SFLASH_IMO_TRIM19 EQU 0x0ffff1e3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM20
CYREG_SFLASH_IMO_TRIM20 EQU 0x0ffff1e4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM21
CYREG_SFLASH_IMO_TRIM21 EQU 0x0ffff1e5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM22
CYREG_SFLASH_IMO_TRIM22 EQU 0x0ffff1e6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM23
CYREG_SFLASH_IMO_TRIM23 EQU 0x0ffff1e7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM24
CYREG_SFLASH_IMO_TRIM24 EQU 0x0ffff1e8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM25
CYREG_SFLASH_IMO_TRIM25 EQU 0x0ffff1e9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM26
CYREG_SFLASH_IMO_TRIM26 EQU 0x0ffff1ea
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM27
CYREG_SFLASH_IMO_TRIM27 EQU 0x0ffff1eb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM28
CYREG_SFLASH_IMO_TRIM28 EQU 0x0ffff1ec
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM29
CYREG_SFLASH_IMO_TRIM29 EQU 0x0ffff1ed
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM30
CYREG_SFLASH_IMO_TRIM30 EQU 0x0ffff1ee
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM31
CYREG_SFLASH_IMO_TRIM31 EQU 0x0ffff1ef
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM32
CYREG_SFLASH_IMO_TRIM32 EQU 0x0ffff1f0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM33
CYREG_SFLASH_IMO_TRIM33 EQU 0x0ffff1f1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM34
CYREG_SFLASH_IMO_TRIM34 EQU 0x0ffff1f2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM35
CYREG_SFLASH_IMO_TRIM35 EQU 0x0ffff1f3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM36
CYREG_SFLASH_IMO_TRIM36 EQU 0x0ffff1f4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM37
CYREG_SFLASH_IMO_TRIM37 EQU 0x0ffff1f5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM38
CYREG_SFLASH_IMO_TRIM38 EQU 0x0ffff1f6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM39
CYREG_SFLASH_IMO_TRIM39 EQU 0x0ffff1f7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM40
CYREG_SFLASH_IMO_TRIM40 EQU 0x0ffff1f8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM41
CYREG_SFLASH_IMO_TRIM41 EQU 0x0ffff1f9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM42
CYREG_SFLASH_IMO_TRIM42 EQU 0x0ffff1fa
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM43
CYREG_SFLASH_IMO_TRIM43 EQU 0x0ffff1fb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM44
CYREG_SFLASH_IMO_TRIM44 EQU 0x0ffff1fc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM45
CYREG_SFLASH_IMO_TRIM45 EQU 0x0ffff1fd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH0
CYREG_SFLASH_MACRO_0_FREE_SFLASH0 EQU 0x0ffff200
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BYTE_MEM__OFFSET
CYFLD_SFLASH_BYTE_MEM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_BYTE_MEM__SIZE
CYFLD_SFLASH_BYTE_MEM__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH1
CYREG_SFLASH_MACRO_0_FREE_SFLASH1 EQU 0x0ffff201
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH2
CYREG_SFLASH_MACRO_0_FREE_SFLASH2 EQU 0x0ffff202
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH3
CYREG_SFLASH_MACRO_0_FREE_SFLASH3 EQU 0x0ffff203
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH4
CYREG_SFLASH_MACRO_0_FREE_SFLASH4 EQU 0x0ffff204
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH5
CYREG_SFLASH_MACRO_0_FREE_SFLASH5 EQU 0x0ffff205
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH6
CYREG_SFLASH_MACRO_0_FREE_SFLASH6 EQU 0x0ffff206
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH7
CYREG_SFLASH_MACRO_0_FREE_SFLASH7 EQU 0x0ffff207
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH8
CYREG_SFLASH_MACRO_0_FREE_SFLASH8 EQU 0x0ffff208
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH9
CYREG_SFLASH_MACRO_0_FREE_SFLASH9 EQU 0x0ffff209
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH10
CYREG_SFLASH_MACRO_0_FREE_SFLASH10 EQU 0x0ffff20a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH11
CYREG_SFLASH_MACRO_0_FREE_SFLASH11 EQU 0x0ffff20b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH12
CYREG_SFLASH_MACRO_0_FREE_SFLASH12 EQU 0x0ffff20c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH13
CYREG_SFLASH_MACRO_0_FREE_SFLASH13 EQU 0x0ffff20d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH14
CYREG_SFLASH_MACRO_0_FREE_SFLASH14 EQU 0x0ffff20e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH15
CYREG_SFLASH_MACRO_0_FREE_SFLASH15 EQU 0x0ffff20f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH16
CYREG_SFLASH_MACRO_0_FREE_SFLASH16 EQU 0x0ffff210
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH17
CYREG_SFLASH_MACRO_0_FREE_SFLASH17 EQU 0x0ffff211
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH18
CYREG_SFLASH_MACRO_0_FREE_SFLASH18 EQU 0x0ffff212
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH19
CYREG_SFLASH_MACRO_0_FREE_SFLASH19 EQU 0x0ffff213
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH20
CYREG_SFLASH_MACRO_0_FREE_SFLASH20 EQU 0x0ffff214
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH21
CYREG_SFLASH_MACRO_0_FREE_SFLASH21 EQU 0x0ffff215
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH22
CYREG_SFLASH_MACRO_0_FREE_SFLASH22 EQU 0x0ffff216
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH23
CYREG_SFLASH_MACRO_0_FREE_SFLASH23 EQU 0x0ffff217
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH24
CYREG_SFLASH_MACRO_0_FREE_SFLASH24 EQU 0x0ffff218
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH25
CYREG_SFLASH_MACRO_0_FREE_SFLASH25 EQU 0x0ffff219
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH26
CYREG_SFLASH_MACRO_0_FREE_SFLASH26 EQU 0x0ffff21a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH27
CYREG_SFLASH_MACRO_0_FREE_SFLASH27 EQU 0x0ffff21b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH28
CYREG_SFLASH_MACRO_0_FREE_SFLASH28 EQU 0x0ffff21c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH29
CYREG_SFLASH_MACRO_0_FREE_SFLASH29 EQU 0x0ffff21d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH30
CYREG_SFLASH_MACRO_0_FREE_SFLASH30 EQU 0x0ffff21e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH31
CYREG_SFLASH_MACRO_0_FREE_SFLASH31 EQU 0x0ffff21f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH32
CYREG_SFLASH_MACRO_0_FREE_SFLASH32 EQU 0x0ffff220
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH33
CYREG_SFLASH_MACRO_0_FREE_SFLASH33 EQU 0x0ffff221
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH34
CYREG_SFLASH_MACRO_0_FREE_SFLASH34 EQU 0x0ffff222
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH35
CYREG_SFLASH_MACRO_0_FREE_SFLASH35 EQU 0x0ffff223
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH36
CYREG_SFLASH_MACRO_0_FREE_SFLASH36 EQU 0x0ffff224
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH37
CYREG_SFLASH_MACRO_0_FREE_SFLASH37 EQU 0x0ffff225
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH38
CYREG_SFLASH_MACRO_0_FREE_SFLASH38 EQU 0x0ffff226
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH39
CYREG_SFLASH_MACRO_0_FREE_SFLASH39 EQU 0x0ffff227
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH40
CYREG_SFLASH_MACRO_0_FREE_SFLASH40 EQU 0x0ffff228
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH41
CYREG_SFLASH_MACRO_0_FREE_SFLASH41 EQU 0x0ffff229
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH42
CYREG_SFLASH_MACRO_0_FREE_SFLASH42 EQU 0x0ffff22a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH43
CYREG_SFLASH_MACRO_0_FREE_SFLASH43 EQU 0x0ffff22b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH44
CYREG_SFLASH_MACRO_0_FREE_SFLASH44 EQU 0x0ffff22c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH45
CYREG_SFLASH_MACRO_0_FREE_SFLASH45 EQU 0x0ffff22d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH46
CYREG_SFLASH_MACRO_0_FREE_SFLASH46 EQU 0x0ffff22e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH47
CYREG_SFLASH_MACRO_0_FREE_SFLASH47 EQU 0x0ffff22f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH48
CYREG_SFLASH_MACRO_0_FREE_SFLASH48 EQU 0x0ffff230
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH49
CYREG_SFLASH_MACRO_0_FREE_SFLASH49 EQU 0x0ffff231
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH50
CYREG_SFLASH_MACRO_0_FREE_SFLASH50 EQU 0x0ffff232
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH51
CYREG_SFLASH_MACRO_0_FREE_SFLASH51 EQU 0x0ffff233
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH52
CYREG_SFLASH_MACRO_0_FREE_SFLASH52 EQU 0x0ffff234
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH53
CYREG_SFLASH_MACRO_0_FREE_SFLASH53 EQU 0x0ffff235
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH54
CYREG_SFLASH_MACRO_0_FREE_SFLASH54 EQU 0x0ffff236
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH55
CYREG_SFLASH_MACRO_0_FREE_SFLASH55 EQU 0x0ffff237
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH56
CYREG_SFLASH_MACRO_0_FREE_SFLASH56 EQU 0x0ffff238
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH57
CYREG_SFLASH_MACRO_0_FREE_SFLASH57 EQU 0x0ffff239
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH58
CYREG_SFLASH_MACRO_0_FREE_SFLASH58 EQU 0x0ffff23a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH59
CYREG_SFLASH_MACRO_0_FREE_SFLASH59 EQU 0x0ffff23b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH60
CYREG_SFLASH_MACRO_0_FREE_SFLASH60 EQU 0x0ffff23c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH61
CYREG_SFLASH_MACRO_0_FREE_SFLASH61 EQU 0x0ffff23d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH62
CYREG_SFLASH_MACRO_0_FREE_SFLASH62 EQU 0x0ffff23e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH63
CYREG_SFLASH_MACRO_0_FREE_SFLASH63 EQU 0x0ffff23f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH64
CYREG_SFLASH_MACRO_0_FREE_SFLASH64 EQU 0x0ffff240
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH65
CYREG_SFLASH_MACRO_0_FREE_SFLASH65 EQU 0x0ffff241
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH66
CYREG_SFLASH_MACRO_0_FREE_SFLASH66 EQU 0x0ffff242
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH67
CYREG_SFLASH_MACRO_0_FREE_SFLASH67 EQU 0x0ffff243
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH68
CYREG_SFLASH_MACRO_0_FREE_SFLASH68 EQU 0x0ffff244
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH69
CYREG_SFLASH_MACRO_0_FREE_SFLASH69 EQU 0x0ffff245
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH70
CYREG_SFLASH_MACRO_0_FREE_SFLASH70 EQU 0x0ffff246
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH71
CYREG_SFLASH_MACRO_0_FREE_SFLASH71 EQU 0x0ffff247
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH72
CYREG_SFLASH_MACRO_0_FREE_SFLASH72 EQU 0x0ffff248
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH73
CYREG_SFLASH_MACRO_0_FREE_SFLASH73 EQU 0x0ffff249
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH74
CYREG_SFLASH_MACRO_0_FREE_SFLASH74 EQU 0x0ffff24a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH75
CYREG_SFLASH_MACRO_0_FREE_SFLASH75 EQU 0x0ffff24b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH76
CYREG_SFLASH_MACRO_0_FREE_SFLASH76 EQU 0x0ffff24c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH77
CYREG_SFLASH_MACRO_0_FREE_SFLASH77 EQU 0x0ffff24d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH78
CYREG_SFLASH_MACRO_0_FREE_SFLASH78 EQU 0x0ffff24e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH79
CYREG_SFLASH_MACRO_0_FREE_SFLASH79 EQU 0x0ffff24f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH80
CYREG_SFLASH_MACRO_0_FREE_SFLASH80 EQU 0x0ffff250
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH81
CYREG_SFLASH_MACRO_0_FREE_SFLASH81 EQU 0x0ffff251
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH82
CYREG_SFLASH_MACRO_0_FREE_SFLASH82 EQU 0x0ffff252
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH83
CYREG_SFLASH_MACRO_0_FREE_SFLASH83 EQU 0x0ffff253
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH84
CYREG_SFLASH_MACRO_0_FREE_SFLASH84 EQU 0x0ffff254
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH85
CYREG_SFLASH_MACRO_0_FREE_SFLASH85 EQU 0x0ffff255
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH86
CYREG_SFLASH_MACRO_0_FREE_SFLASH86 EQU 0x0ffff256
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH87
CYREG_SFLASH_MACRO_0_FREE_SFLASH87 EQU 0x0ffff257
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH88
CYREG_SFLASH_MACRO_0_FREE_SFLASH88 EQU 0x0ffff258
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH89
CYREG_SFLASH_MACRO_0_FREE_SFLASH89 EQU 0x0ffff259
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH90
CYREG_SFLASH_MACRO_0_FREE_SFLASH90 EQU 0x0ffff25a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH91
CYREG_SFLASH_MACRO_0_FREE_SFLASH91 EQU 0x0ffff25b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH92
CYREG_SFLASH_MACRO_0_FREE_SFLASH92 EQU 0x0ffff25c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH93
CYREG_SFLASH_MACRO_0_FREE_SFLASH93 EQU 0x0ffff25d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH94
CYREG_SFLASH_MACRO_0_FREE_SFLASH94 EQU 0x0ffff25e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH95
CYREG_SFLASH_MACRO_0_FREE_SFLASH95 EQU 0x0ffff25f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH96
CYREG_SFLASH_MACRO_0_FREE_SFLASH96 EQU 0x0ffff260
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH97
CYREG_SFLASH_MACRO_0_FREE_SFLASH97 EQU 0x0ffff261
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH98
CYREG_SFLASH_MACRO_0_FREE_SFLASH98 EQU 0x0ffff262
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH99
CYREG_SFLASH_MACRO_0_FREE_SFLASH99 EQU 0x0ffff263
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH100
CYREG_SFLASH_MACRO_0_FREE_SFLASH100 EQU 0x0ffff264
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH101
CYREG_SFLASH_MACRO_0_FREE_SFLASH101 EQU 0x0ffff265
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH102
CYREG_SFLASH_MACRO_0_FREE_SFLASH102 EQU 0x0ffff266
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH103
CYREG_SFLASH_MACRO_0_FREE_SFLASH103 EQU 0x0ffff267
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH104
CYREG_SFLASH_MACRO_0_FREE_SFLASH104 EQU 0x0ffff268
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH105
CYREG_SFLASH_MACRO_0_FREE_SFLASH105 EQU 0x0ffff269
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH106
CYREG_SFLASH_MACRO_0_FREE_SFLASH106 EQU 0x0ffff26a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH107
CYREG_SFLASH_MACRO_0_FREE_SFLASH107 EQU 0x0ffff26b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH108
CYREG_SFLASH_MACRO_0_FREE_SFLASH108 EQU 0x0ffff26c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH109
CYREG_SFLASH_MACRO_0_FREE_SFLASH109 EQU 0x0ffff26d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH110
CYREG_SFLASH_MACRO_0_FREE_SFLASH110 EQU 0x0ffff26e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH111
CYREG_SFLASH_MACRO_0_FREE_SFLASH111 EQU 0x0ffff26f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH112
CYREG_SFLASH_MACRO_0_FREE_SFLASH112 EQU 0x0ffff270
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH113
CYREG_SFLASH_MACRO_0_FREE_SFLASH113 EQU 0x0ffff271
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH114
CYREG_SFLASH_MACRO_0_FREE_SFLASH114 EQU 0x0ffff272
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH115
CYREG_SFLASH_MACRO_0_FREE_SFLASH115 EQU 0x0ffff273
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH116
CYREG_SFLASH_MACRO_0_FREE_SFLASH116 EQU 0x0ffff274
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH117
CYREG_SFLASH_MACRO_0_FREE_SFLASH117 EQU 0x0ffff275
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH118
CYREG_SFLASH_MACRO_0_FREE_SFLASH118 EQU 0x0ffff276
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH119
CYREG_SFLASH_MACRO_0_FREE_SFLASH119 EQU 0x0ffff277
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH120
CYREG_SFLASH_MACRO_0_FREE_SFLASH120 EQU 0x0ffff278
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH121
CYREG_SFLASH_MACRO_0_FREE_SFLASH121 EQU 0x0ffff279
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH122
CYREG_SFLASH_MACRO_0_FREE_SFLASH122 EQU 0x0ffff27a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH123
CYREG_SFLASH_MACRO_0_FREE_SFLASH123 EQU 0x0ffff27b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH124
CYREG_SFLASH_MACRO_0_FREE_SFLASH124 EQU 0x0ffff27c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH125
CYREG_SFLASH_MACRO_0_FREE_SFLASH125 EQU 0x0ffff27d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH126
CYREG_SFLASH_MACRO_0_FREE_SFLASH126 EQU 0x0ffff27e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH127
CYREG_SFLASH_MACRO_0_FREE_SFLASH127 EQU 0x0ffff27f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH128
CYREG_SFLASH_MACRO_0_FREE_SFLASH128 EQU 0x0ffff280
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH129
CYREG_SFLASH_MACRO_0_FREE_SFLASH129 EQU 0x0ffff281
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH130
CYREG_SFLASH_MACRO_0_FREE_SFLASH130 EQU 0x0ffff282
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH131
CYREG_SFLASH_MACRO_0_FREE_SFLASH131 EQU 0x0ffff283
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH132
CYREG_SFLASH_MACRO_0_FREE_SFLASH132 EQU 0x0ffff284
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH133
CYREG_SFLASH_MACRO_0_FREE_SFLASH133 EQU 0x0ffff285
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH134
CYREG_SFLASH_MACRO_0_FREE_SFLASH134 EQU 0x0ffff286
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH135
CYREG_SFLASH_MACRO_0_FREE_SFLASH135 EQU 0x0ffff287
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH136
CYREG_SFLASH_MACRO_0_FREE_SFLASH136 EQU 0x0ffff288
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH137
CYREG_SFLASH_MACRO_0_FREE_SFLASH137 EQU 0x0ffff289
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH138
CYREG_SFLASH_MACRO_0_FREE_SFLASH138 EQU 0x0ffff28a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH139
CYREG_SFLASH_MACRO_0_FREE_SFLASH139 EQU 0x0ffff28b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH140
CYREG_SFLASH_MACRO_0_FREE_SFLASH140 EQU 0x0ffff28c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH141
CYREG_SFLASH_MACRO_0_FREE_SFLASH141 EQU 0x0ffff28d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH142
CYREG_SFLASH_MACRO_0_FREE_SFLASH142 EQU 0x0ffff28e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH143
CYREG_SFLASH_MACRO_0_FREE_SFLASH143 EQU 0x0ffff28f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH144
CYREG_SFLASH_MACRO_0_FREE_SFLASH144 EQU 0x0ffff290
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH145
CYREG_SFLASH_MACRO_0_FREE_SFLASH145 EQU 0x0ffff291
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH146
CYREG_SFLASH_MACRO_0_FREE_SFLASH146 EQU 0x0ffff292
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH147
CYREG_SFLASH_MACRO_0_FREE_SFLASH147 EQU 0x0ffff293
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH148
CYREG_SFLASH_MACRO_0_FREE_SFLASH148 EQU 0x0ffff294
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH149
CYREG_SFLASH_MACRO_0_FREE_SFLASH149 EQU 0x0ffff295
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH150
CYREG_SFLASH_MACRO_0_FREE_SFLASH150 EQU 0x0ffff296
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH151
CYREG_SFLASH_MACRO_0_FREE_SFLASH151 EQU 0x0ffff297
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH152
CYREG_SFLASH_MACRO_0_FREE_SFLASH152 EQU 0x0ffff298
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH153
CYREG_SFLASH_MACRO_0_FREE_SFLASH153 EQU 0x0ffff299
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH154
CYREG_SFLASH_MACRO_0_FREE_SFLASH154 EQU 0x0ffff29a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH155
CYREG_SFLASH_MACRO_0_FREE_SFLASH155 EQU 0x0ffff29b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH156
CYREG_SFLASH_MACRO_0_FREE_SFLASH156 EQU 0x0ffff29c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH157
CYREG_SFLASH_MACRO_0_FREE_SFLASH157 EQU 0x0ffff29d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH158
CYREG_SFLASH_MACRO_0_FREE_SFLASH158 EQU 0x0ffff29e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH159
CYREG_SFLASH_MACRO_0_FREE_SFLASH159 EQU 0x0ffff29f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH160
CYREG_SFLASH_MACRO_0_FREE_SFLASH160 EQU 0x0ffff2a0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH161
CYREG_SFLASH_MACRO_0_FREE_SFLASH161 EQU 0x0ffff2a1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH162
CYREG_SFLASH_MACRO_0_FREE_SFLASH162 EQU 0x0ffff2a2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH163
CYREG_SFLASH_MACRO_0_FREE_SFLASH163 EQU 0x0ffff2a3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH164
CYREG_SFLASH_MACRO_0_FREE_SFLASH164 EQU 0x0ffff2a4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH165
CYREG_SFLASH_MACRO_0_FREE_SFLASH165 EQU 0x0ffff2a5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH166
CYREG_SFLASH_MACRO_0_FREE_SFLASH166 EQU 0x0ffff2a6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH167
CYREG_SFLASH_MACRO_0_FREE_SFLASH167 EQU 0x0ffff2a7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH168
CYREG_SFLASH_MACRO_0_FREE_SFLASH168 EQU 0x0ffff2a8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH169
CYREG_SFLASH_MACRO_0_FREE_SFLASH169 EQU 0x0ffff2a9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH170
CYREG_SFLASH_MACRO_0_FREE_SFLASH170 EQU 0x0ffff2aa
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH171
CYREG_SFLASH_MACRO_0_FREE_SFLASH171 EQU 0x0ffff2ab
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH172
CYREG_SFLASH_MACRO_0_FREE_SFLASH172 EQU 0x0ffff2ac
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH173
CYREG_SFLASH_MACRO_0_FREE_SFLASH173 EQU 0x0ffff2ad
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH174
CYREG_SFLASH_MACRO_0_FREE_SFLASH174 EQU 0x0ffff2ae
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH175
CYREG_SFLASH_MACRO_0_FREE_SFLASH175 EQU 0x0ffff2af
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH176
CYREG_SFLASH_MACRO_0_FREE_SFLASH176 EQU 0x0ffff2b0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH177
CYREG_SFLASH_MACRO_0_FREE_SFLASH177 EQU 0x0ffff2b1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH178
CYREG_SFLASH_MACRO_0_FREE_SFLASH178 EQU 0x0ffff2b2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH179
CYREG_SFLASH_MACRO_0_FREE_SFLASH179 EQU 0x0ffff2b3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH180
CYREG_SFLASH_MACRO_0_FREE_SFLASH180 EQU 0x0ffff2b4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH181
CYREG_SFLASH_MACRO_0_FREE_SFLASH181 EQU 0x0ffff2b5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH182
CYREG_SFLASH_MACRO_0_FREE_SFLASH182 EQU 0x0ffff2b6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH183
CYREG_SFLASH_MACRO_0_FREE_SFLASH183 EQU 0x0ffff2b7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH184
CYREG_SFLASH_MACRO_0_FREE_SFLASH184 EQU 0x0ffff2b8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH185
CYREG_SFLASH_MACRO_0_FREE_SFLASH185 EQU 0x0ffff2b9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH186
CYREG_SFLASH_MACRO_0_FREE_SFLASH186 EQU 0x0ffff2ba
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH187
CYREG_SFLASH_MACRO_0_FREE_SFLASH187 EQU 0x0ffff2bb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH188
CYREG_SFLASH_MACRO_0_FREE_SFLASH188 EQU 0x0ffff2bc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH189
CYREG_SFLASH_MACRO_0_FREE_SFLASH189 EQU 0x0ffff2bd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH190
CYREG_SFLASH_MACRO_0_FREE_SFLASH190 EQU 0x0ffff2be
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH191
CYREG_SFLASH_MACRO_0_FREE_SFLASH191 EQU 0x0ffff2bf
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH192
CYREG_SFLASH_MACRO_0_FREE_SFLASH192 EQU 0x0ffff2c0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH193
CYREG_SFLASH_MACRO_0_FREE_SFLASH193 EQU 0x0ffff2c1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH194
CYREG_SFLASH_MACRO_0_FREE_SFLASH194 EQU 0x0ffff2c2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH195
CYREG_SFLASH_MACRO_0_FREE_SFLASH195 EQU 0x0ffff2c3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH196
CYREG_SFLASH_MACRO_0_FREE_SFLASH196 EQU 0x0ffff2c4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH197
CYREG_SFLASH_MACRO_0_FREE_SFLASH197 EQU 0x0ffff2c5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH198
CYREG_SFLASH_MACRO_0_FREE_SFLASH198 EQU 0x0ffff2c6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH199
CYREG_SFLASH_MACRO_0_FREE_SFLASH199 EQU 0x0ffff2c7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH200
CYREG_SFLASH_MACRO_0_FREE_SFLASH200 EQU 0x0ffff2c8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH201
CYREG_SFLASH_MACRO_0_FREE_SFLASH201 EQU 0x0ffff2c9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH202
CYREG_SFLASH_MACRO_0_FREE_SFLASH202 EQU 0x0ffff2ca
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH203
CYREG_SFLASH_MACRO_0_FREE_SFLASH203 EQU 0x0ffff2cb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH204
CYREG_SFLASH_MACRO_0_FREE_SFLASH204 EQU 0x0ffff2cc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH205
CYREG_SFLASH_MACRO_0_FREE_SFLASH205 EQU 0x0ffff2cd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH206
CYREG_SFLASH_MACRO_0_FREE_SFLASH206 EQU 0x0ffff2ce
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH207
CYREG_SFLASH_MACRO_0_FREE_SFLASH207 EQU 0x0ffff2cf
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH208
CYREG_SFLASH_MACRO_0_FREE_SFLASH208 EQU 0x0ffff2d0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH209
CYREG_SFLASH_MACRO_0_FREE_SFLASH209 EQU 0x0ffff2d1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH210
CYREG_SFLASH_MACRO_0_FREE_SFLASH210 EQU 0x0ffff2d2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH211
CYREG_SFLASH_MACRO_0_FREE_SFLASH211 EQU 0x0ffff2d3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH212
CYREG_SFLASH_MACRO_0_FREE_SFLASH212 EQU 0x0ffff2d4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH213
CYREG_SFLASH_MACRO_0_FREE_SFLASH213 EQU 0x0ffff2d5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH214
CYREG_SFLASH_MACRO_0_FREE_SFLASH214 EQU 0x0ffff2d6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH215
CYREG_SFLASH_MACRO_0_FREE_SFLASH215 EQU 0x0ffff2d7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH216
CYREG_SFLASH_MACRO_0_FREE_SFLASH216 EQU 0x0ffff2d8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH217
CYREG_SFLASH_MACRO_0_FREE_SFLASH217 EQU 0x0ffff2d9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH218
CYREG_SFLASH_MACRO_0_FREE_SFLASH218 EQU 0x0ffff2da
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH219
CYREG_SFLASH_MACRO_0_FREE_SFLASH219 EQU 0x0ffff2db
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH220
CYREG_SFLASH_MACRO_0_FREE_SFLASH220 EQU 0x0ffff2dc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH221
CYREG_SFLASH_MACRO_0_FREE_SFLASH221 EQU 0x0ffff2dd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH222
CYREG_SFLASH_MACRO_0_FREE_SFLASH222 EQU 0x0ffff2de
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH223
CYREG_SFLASH_MACRO_0_FREE_SFLASH223 EQU 0x0ffff2df
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH224
CYREG_SFLASH_MACRO_0_FREE_SFLASH224 EQU 0x0ffff2e0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH225
CYREG_SFLASH_MACRO_0_FREE_SFLASH225 EQU 0x0ffff2e1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH226
CYREG_SFLASH_MACRO_0_FREE_SFLASH226 EQU 0x0ffff2e2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH227
CYREG_SFLASH_MACRO_0_FREE_SFLASH227 EQU 0x0ffff2e3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH228
CYREG_SFLASH_MACRO_0_FREE_SFLASH228 EQU 0x0ffff2e4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH229
CYREG_SFLASH_MACRO_0_FREE_SFLASH229 EQU 0x0ffff2e5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH230
CYREG_SFLASH_MACRO_0_FREE_SFLASH230 EQU 0x0ffff2e6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH231
CYREG_SFLASH_MACRO_0_FREE_SFLASH231 EQU 0x0ffff2e7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH232
CYREG_SFLASH_MACRO_0_FREE_SFLASH232 EQU 0x0ffff2e8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH233
CYREG_SFLASH_MACRO_0_FREE_SFLASH233 EQU 0x0ffff2e9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH234
CYREG_SFLASH_MACRO_0_FREE_SFLASH234 EQU 0x0ffff2ea
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH235
CYREG_SFLASH_MACRO_0_FREE_SFLASH235 EQU 0x0ffff2eb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH236
CYREG_SFLASH_MACRO_0_FREE_SFLASH236 EQU 0x0ffff2ec
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH237
CYREG_SFLASH_MACRO_0_FREE_SFLASH237 EQU 0x0ffff2ed
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH238
CYREG_SFLASH_MACRO_0_FREE_SFLASH238 EQU 0x0ffff2ee
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH239
CYREG_SFLASH_MACRO_0_FREE_SFLASH239 EQU 0x0ffff2ef
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH240
CYREG_SFLASH_MACRO_0_FREE_SFLASH240 EQU 0x0ffff2f0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH241
CYREG_SFLASH_MACRO_0_FREE_SFLASH241 EQU 0x0ffff2f1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH242
CYREG_SFLASH_MACRO_0_FREE_SFLASH242 EQU 0x0ffff2f2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH243
CYREG_SFLASH_MACRO_0_FREE_SFLASH243 EQU 0x0ffff2f3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH244
CYREG_SFLASH_MACRO_0_FREE_SFLASH244 EQU 0x0ffff2f4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH245
CYREG_SFLASH_MACRO_0_FREE_SFLASH245 EQU 0x0ffff2f5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH246
CYREG_SFLASH_MACRO_0_FREE_SFLASH246 EQU 0x0ffff2f6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH247
CYREG_SFLASH_MACRO_0_FREE_SFLASH247 EQU 0x0ffff2f7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH248
CYREG_SFLASH_MACRO_0_FREE_SFLASH248 EQU 0x0ffff2f8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH249
CYREG_SFLASH_MACRO_0_FREE_SFLASH249 EQU 0x0ffff2f9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH250
CYREG_SFLASH_MACRO_0_FREE_SFLASH250 EQU 0x0ffff2fa
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH251
CYREG_SFLASH_MACRO_0_FREE_SFLASH251 EQU 0x0ffff2fb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH252
CYREG_SFLASH_MACRO_0_FREE_SFLASH252 EQU 0x0ffff2fc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH253
CYREG_SFLASH_MACRO_0_FREE_SFLASH253 EQU 0x0ffff2fd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH254
CYREG_SFLASH_MACRO_0_FREE_SFLASH254 EQU 0x0ffff2fe
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH255
CYREG_SFLASH_MACRO_0_FREE_SFLASH255 EQU 0x0ffff2ff
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH256
CYREG_SFLASH_MACRO_0_FREE_SFLASH256 EQU 0x0ffff300
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH257
CYREG_SFLASH_MACRO_0_FREE_SFLASH257 EQU 0x0ffff301
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH258
CYREG_SFLASH_MACRO_0_FREE_SFLASH258 EQU 0x0ffff302
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH259
CYREG_SFLASH_MACRO_0_FREE_SFLASH259 EQU 0x0ffff303
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH260
CYREG_SFLASH_MACRO_0_FREE_SFLASH260 EQU 0x0ffff304
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH261
CYREG_SFLASH_MACRO_0_FREE_SFLASH261 EQU 0x0ffff305
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH262
CYREG_SFLASH_MACRO_0_FREE_SFLASH262 EQU 0x0ffff306
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH263
CYREG_SFLASH_MACRO_0_FREE_SFLASH263 EQU 0x0ffff307
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH264
CYREG_SFLASH_MACRO_0_FREE_SFLASH264 EQU 0x0ffff308
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH265
CYREG_SFLASH_MACRO_0_FREE_SFLASH265 EQU 0x0ffff309
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH266
CYREG_SFLASH_MACRO_0_FREE_SFLASH266 EQU 0x0ffff30a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH267
CYREG_SFLASH_MACRO_0_FREE_SFLASH267 EQU 0x0ffff30b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH268
CYREG_SFLASH_MACRO_0_FREE_SFLASH268 EQU 0x0ffff30c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH269
CYREG_SFLASH_MACRO_0_FREE_SFLASH269 EQU 0x0ffff30d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH270
CYREG_SFLASH_MACRO_0_FREE_SFLASH270 EQU 0x0ffff30e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH271
CYREG_SFLASH_MACRO_0_FREE_SFLASH271 EQU 0x0ffff30f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH272
CYREG_SFLASH_MACRO_0_FREE_SFLASH272 EQU 0x0ffff310
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH273
CYREG_SFLASH_MACRO_0_FREE_SFLASH273 EQU 0x0ffff311
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH274
CYREG_SFLASH_MACRO_0_FREE_SFLASH274 EQU 0x0ffff312
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH275
CYREG_SFLASH_MACRO_0_FREE_SFLASH275 EQU 0x0ffff313
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH276
CYREG_SFLASH_MACRO_0_FREE_SFLASH276 EQU 0x0ffff314
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH277
CYREG_SFLASH_MACRO_0_FREE_SFLASH277 EQU 0x0ffff315
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH278
CYREG_SFLASH_MACRO_0_FREE_SFLASH278 EQU 0x0ffff316
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH279
CYREG_SFLASH_MACRO_0_FREE_SFLASH279 EQU 0x0ffff317
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH280
CYREG_SFLASH_MACRO_0_FREE_SFLASH280 EQU 0x0ffff318
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH281
CYREG_SFLASH_MACRO_0_FREE_SFLASH281 EQU 0x0ffff319
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH282
CYREG_SFLASH_MACRO_0_FREE_SFLASH282 EQU 0x0ffff31a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH283
CYREG_SFLASH_MACRO_0_FREE_SFLASH283 EQU 0x0ffff31b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH284
CYREG_SFLASH_MACRO_0_FREE_SFLASH284 EQU 0x0ffff31c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH285
CYREG_SFLASH_MACRO_0_FREE_SFLASH285 EQU 0x0ffff31d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH286
CYREG_SFLASH_MACRO_0_FREE_SFLASH286 EQU 0x0ffff31e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH287
CYREG_SFLASH_MACRO_0_FREE_SFLASH287 EQU 0x0ffff31f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH288
CYREG_SFLASH_MACRO_0_FREE_SFLASH288 EQU 0x0ffff320
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH289
CYREG_SFLASH_MACRO_0_FREE_SFLASH289 EQU 0x0ffff321
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH290
CYREG_SFLASH_MACRO_0_FREE_SFLASH290 EQU 0x0ffff322
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH291
CYREG_SFLASH_MACRO_0_FREE_SFLASH291 EQU 0x0ffff323
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH292
CYREG_SFLASH_MACRO_0_FREE_SFLASH292 EQU 0x0ffff324
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH293
CYREG_SFLASH_MACRO_0_FREE_SFLASH293 EQU 0x0ffff325
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH294
CYREG_SFLASH_MACRO_0_FREE_SFLASH294 EQU 0x0ffff326
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH295
CYREG_SFLASH_MACRO_0_FREE_SFLASH295 EQU 0x0ffff327
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH296
CYREG_SFLASH_MACRO_0_FREE_SFLASH296 EQU 0x0ffff328
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH297
CYREG_SFLASH_MACRO_0_FREE_SFLASH297 EQU 0x0ffff329
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH298
CYREG_SFLASH_MACRO_0_FREE_SFLASH298 EQU 0x0ffff32a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH299
CYREG_SFLASH_MACRO_0_FREE_SFLASH299 EQU 0x0ffff32b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH300
CYREG_SFLASH_MACRO_0_FREE_SFLASH300 EQU 0x0ffff32c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH301
CYREG_SFLASH_MACRO_0_FREE_SFLASH301 EQU 0x0ffff32d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH302
CYREG_SFLASH_MACRO_0_FREE_SFLASH302 EQU 0x0ffff32e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH303
CYREG_SFLASH_MACRO_0_FREE_SFLASH303 EQU 0x0ffff32f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH304
CYREG_SFLASH_MACRO_0_FREE_SFLASH304 EQU 0x0ffff330
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH305
CYREG_SFLASH_MACRO_0_FREE_SFLASH305 EQU 0x0ffff331
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH306
CYREG_SFLASH_MACRO_0_FREE_SFLASH306 EQU 0x0ffff332
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH307
CYREG_SFLASH_MACRO_0_FREE_SFLASH307 EQU 0x0ffff333
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH308
CYREG_SFLASH_MACRO_0_FREE_SFLASH308 EQU 0x0ffff334
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH309
CYREG_SFLASH_MACRO_0_FREE_SFLASH309 EQU 0x0ffff335
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH310
CYREG_SFLASH_MACRO_0_FREE_SFLASH310 EQU 0x0ffff336
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH311
CYREG_SFLASH_MACRO_0_FREE_SFLASH311 EQU 0x0ffff337
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH312
CYREG_SFLASH_MACRO_0_FREE_SFLASH312 EQU 0x0ffff338
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH313
CYREG_SFLASH_MACRO_0_FREE_SFLASH313 EQU 0x0ffff339
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH314
CYREG_SFLASH_MACRO_0_FREE_SFLASH314 EQU 0x0ffff33a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH315
CYREG_SFLASH_MACRO_0_FREE_SFLASH315 EQU 0x0ffff33b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH316
CYREG_SFLASH_MACRO_0_FREE_SFLASH316 EQU 0x0ffff33c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH317
CYREG_SFLASH_MACRO_0_FREE_SFLASH317 EQU 0x0ffff33d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH318
CYREG_SFLASH_MACRO_0_FREE_SFLASH318 EQU 0x0ffff33e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH319
CYREG_SFLASH_MACRO_0_FREE_SFLASH319 EQU 0x0ffff33f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH320
CYREG_SFLASH_MACRO_0_FREE_SFLASH320 EQU 0x0ffff340
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH321
CYREG_SFLASH_MACRO_0_FREE_SFLASH321 EQU 0x0ffff341
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH322
CYREG_SFLASH_MACRO_0_FREE_SFLASH322 EQU 0x0ffff342
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH323
CYREG_SFLASH_MACRO_0_FREE_SFLASH323 EQU 0x0ffff343
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH324
CYREG_SFLASH_MACRO_0_FREE_SFLASH324 EQU 0x0ffff344
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH325
CYREG_SFLASH_MACRO_0_FREE_SFLASH325 EQU 0x0ffff345
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH326
CYREG_SFLASH_MACRO_0_FREE_SFLASH326 EQU 0x0ffff346
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH327
CYREG_SFLASH_MACRO_0_FREE_SFLASH327 EQU 0x0ffff347
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH328
CYREG_SFLASH_MACRO_0_FREE_SFLASH328 EQU 0x0ffff348
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH329
CYREG_SFLASH_MACRO_0_FREE_SFLASH329 EQU 0x0ffff349
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH330
CYREG_SFLASH_MACRO_0_FREE_SFLASH330 EQU 0x0ffff34a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH331
CYREG_SFLASH_MACRO_0_FREE_SFLASH331 EQU 0x0ffff34b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH332
CYREG_SFLASH_MACRO_0_FREE_SFLASH332 EQU 0x0ffff34c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH333
CYREG_SFLASH_MACRO_0_FREE_SFLASH333 EQU 0x0ffff34d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH334
CYREG_SFLASH_MACRO_0_FREE_SFLASH334 EQU 0x0ffff34e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH335
CYREG_SFLASH_MACRO_0_FREE_SFLASH335 EQU 0x0ffff34f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH336
CYREG_SFLASH_MACRO_0_FREE_SFLASH336 EQU 0x0ffff350
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH337
CYREG_SFLASH_MACRO_0_FREE_SFLASH337 EQU 0x0ffff351
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH338
CYREG_SFLASH_MACRO_0_FREE_SFLASH338 EQU 0x0ffff352
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH339
CYREG_SFLASH_MACRO_0_FREE_SFLASH339 EQU 0x0ffff353
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH340
CYREG_SFLASH_MACRO_0_FREE_SFLASH340 EQU 0x0ffff354
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH341
CYREG_SFLASH_MACRO_0_FREE_SFLASH341 EQU 0x0ffff355
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH342
CYREG_SFLASH_MACRO_0_FREE_SFLASH342 EQU 0x0ffff356
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH343
CYREG_SFLASH_MACRO_0_FREE_SFLASH343 EQU 0x0ffff357
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH344
CYREG_SFLASH_MACRO_0_FREE_SFLASH344 EQU 0x0ffff358
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH345
CYREG_SFLASH_MACRO_0_FREE_SFLASH345 EQU 0x0ffff359
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH346
CYREG_SFLASH_MACRO_0_FREE_SFLASH346 EQU 0x0ffff35a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH347
CYREG_SFLASH_MACRO_0_FREE_SFLASH347 EQU 0x0ffff35b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH348
CYREG_SFLASH_MACRO_0_FREE_SFLASH348 EQU 0x0ffff35c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH349
CYREG_SFLASH_MACRO_0_FREE_SFLASH349 EQU 0x0ffff35d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH350
CYREG_SFLASH_MACRO_0_FREE_SFLASH350 EQU 0x0ffff35e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH351
CYREG_SFLASH_MACRO_0_FREE_SFLASH351 EQU 0x0ffff35f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH352
CYREG_SFLASH_MACRO_0_FREE_SFLASH352 EQU 0x0ffff360
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH353
CYREG_SFLASH_MACRO_0_FREE_SFLASH353 EQU 0x0ffff361
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH354
CYREG_SFLASH_MACRO_0_FREE_SFLASH354 EQU 0x0ffff362
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH355
CYREG_SFLASH_MACRO_0_FREE_SFLASH355 EQU 0x0ffff363
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH356
CYREG_SFLASH_MACRO_0_FREE_SFLASH356 EQU 0x0ffff364
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH357
CYREG_SFLASH_MACRO_0_FREE_SFLASH357 EQU 0x0ffff365
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH358
CYREG_SFLASH_MACRO_0_FREE_SFLASH358 EQU 0x0ffff366
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH359
CYREG_SFLASH_MACRO_0_FREE_SFLASH359 EQU 0x0ffff367
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH360
CYREG_SFLASH_MACRO_0_FREE_SFLASH360 EQU 0x0ffff368
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH361
CYREG_SFLASH_MACRO_0_FREE_SFLASH361 EQU 0x0ffff369
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH362
CYREG_SFLASH_MACRO_0_FREE_SFLASH362 EQU 0x0ffff36a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH363
CYREG_SFLASH_MACRO_0_FREE_SFLASH363 EQU 0x0ffff36b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH364
CYREG_SFLASH_MACRO_0_FREE_SFLASH364 EQU 0x0ffff36c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH365
CYREG_SFLASH_MACRO_0_FREE_SFLASH365 EQU 0x0ffff36d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH366
CYREG_SFLASH_MACRO_0_FREE_SFLASH366 EQU 0x0ffff36e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH367
CYREG_SFLASH_MACRO_0_FREE_SFLASH367 EQU 0x0ffff36f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH368
CYREG_SFLASH_MACRO_0_FREE_SFLASH368 EQU 0x0ffff370
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH369
CYREG_SFLASH_MACRO_0_FREE_SFLASH369 EQU 0x0ffff371
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH370
CYREG_SFLASH_MACRO_0_FREE_SFLASH370 EQU 0x0ffff372
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH371
CYREG_SFLASH_MACRO_0_FREE_SFLASH371 EQU 0x0ffff373
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH372
CYREG_SFLASH_MACRO_0_FREE_SFLASH372 EQU 0x0ffff374
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH373
CYREG_SFLASH_MACRO_0_FREE_SFLASH373 EQU 0x0ffff375
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH374
CYREG_SFLASH_MACRO_0_FREE_SFLASH374 EQU 0x0ffff376
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH375
CYREG_SFLASH_MACRO_0_FREE_SFLASH375 EQU 0x0ffff377
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH376
CYREG_SFLASH_MACRO_0_FREE_SFLASH376 EQU 0x0ffff378
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH377
CYREG_SFLASH_MACRO_0_FREE_SFLASH377 EQU 0x0ffff379
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH378
CYREG_SFLASH_MACRO_0_FREE_SFLASH378 EQU 0x0ffff37a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH379
CYREG_SFLASH_MACRO_0_FREE_SFLASH379 EQU 0x0ffff37b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH380
CYREG_SFLASH_MACRO_0_FREE_SFLASH380 EQU 0x0ffff37c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH381
CYREG_SFLASH_MACRO_0_FREE_SFLASH381 EQU 0x0ffff37d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH382
CYREG_SFLASH_MACRO_0_FREE_SFLASH382 EQU 0x0ffff37e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH383
CYREG_SFLASH_MACRO_0_FREE_SFLASH383 EQU 0x0ffff37f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH384
CYREG_SFLASH_MACRO_0_FREE_SFLASH384 EQU 0x0ffff380
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH385
CYREG_SFLASH_MACRO_0_FREE_SFLASH385 EQU 0x0ffff381
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH386
CYREG_SFLASH_MACRO_0_FREE_SFLASH386 EQU 0x0ffff382
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH387
CYREG_SFLASH_MACRO_0_FREE_SFLASH387 EQU 0x0ffff383
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH388
CYREG_SFLASH_MACRO_0_FREE_SFLASH388 EQU 0x0ffff384
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH389
CYREG_SFLASH_MACRO_0_FREE_SFLASH389 EQU 0x0ffff385
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH390
CYREG_SFLASH_MACRO_0_FREE_SFLASH390 EQU 0x0ffff386
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH391
CYREG_SFLASH_MACRO_0_FREE_SFLASH391 EQU 0x0ffff387
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH392
CYREG_SFLASH_MACRO_0_FREE_SFLASH392 EQU 0x0ffff388
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH393
CYREG_SFLASH_MACRO_0_FREE_SFLASH393 EQU 0x0ffff389
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH394
CYREG_SFLASH_MACRO_0_FREE_SFLASH394 EQU 0x0ffff38a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH395
CYREG_SFLASH_MACRO_0_FREE_SFLASH395 EQU 0x0ffff38b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH396
CYREG_SFLASH_MACRO_0_FREE_SFLASH396 EQU 0x0ffff38c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH397
CYREG_SFLASH_MACRO_0_FREE_SFLASH397 EQU 0x0ffff38d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH398
CYREG_SFLASH_MACRO_0_FREE_SFLASH398 EQU 0x0ffff38e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH399
CYREG_SFLASH_MACRO_0_FREE_SFLASH399 EQU 0x0ffff38f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH400
CYREG_SFLASH_MACRO_0_FREE_SFLASH400 EQU 0x0ffff390
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH401
CYREG_SFLASH_MACRO_0_FREE_SFLASH401 EQU 0x0ffff391
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH402
CYREG_SFLASH_MACRO_0_FREE_SFLASH402 EQU 0x0ffff392
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH403
CYREG_SFLASH_MACRO_0_FREE_SFLASH403 EQU 0x0ffff393
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH404
CYREG_SFLASH_MACRO_0_FREE_SFLASH404 EQU 0x0ffff394
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH405
CYREG_SFLASH_MACRO_0_FREE_SFLASH405 EQU 0x0ffff395
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH406
CYREG_SFLASH_MACRO_0_FREE_SFLASH406 EQU 0x0ffff396
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH407
CYREG_SFLASH_MACRO_0_FREE_SFLASH407 EQU 0x0ffff397
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH408
CYREG_SFLASH_MACRO_0_FREE_SFLASH408 EQU 0x0ffff398
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH409
CYREG_SFLASH_MACRO_0_FREE_SFLASH409 EQU 0x0ffff399
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH410
CYREG_SFLASH_MACRO_0_FREE_SFLASH410 EQU 0x0ffff39a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH411
CYREG_SFLASH_MACRO_0_FREE_SFLASH411 EQU 0x0ffff39b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH412
CYREG_SFLASH_MACRO_0_FREE_SFLASH412 EQU 0x0ffff39c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH413
CYREG_SFLASH_MACRO_0_FREE_SFLASH413 EQU 0x0ffff39d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH414
CYREG_SFLASH_MACRO_0_FREE_SFLASH414 EQU 0x0ffff39e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH415
CYREG_SFLASH_MACRO_0_FREE_SFLASH415 EQU 0x0ffff39f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH416
CYREG_SFLASH_MACRO_0_FREE_SFLASH416 EQU 0x0ffff3a0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH417
CYREG_SFLASH_MACRO_0_FREE_SFLASH417 EQU 0x0ffff3a1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH418
CYREG_SFLASH_MACRO_0_FREE_SFLASH418 EQU 0x0ffff3a2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH419
CYREG_SFLASH_MACRO_0_FREE_SFLASH419 EQU 0x0ffff3a3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH420
CYREG_SFLASH_MACRO_0_FREE_SFLASH420 EQU 0x0ffff3a4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH421
CYREG_SFLASH_MACRO_0_FREE_SFLASH421 EQU 0x0ffff3a5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH422
CYREG_SFLASH_MACRO_0_FREE_SFLASH422 EQU 0x0ffff3a6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH423
CYREG_SFLASH_MACRO_0_FREE_SFLASH423 EQU 0x0ffff3a7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH424
CYREG_SFLASH_MACRO_0_FREE_SFLASH424 EQU 0x0ffff3a8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH425
CYREG_SFLASH_MACRO_0_FREE_SFLASH425 EQU 0x0ffff3a9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH426
CYREG_SFLASH_MACRO_0_FREE_SFLASH426 EQU 0x0ffff3aa
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH427
CYREG_SFLASH_MACRO_0_FREE_SFLASH427 EQU 0x0ffff3ab
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH428
CYREG_SFLASH_MACRO_0_FREE_SFLASH428 EQU 0x0ffff3ac
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH429
CYREG_SFLASH_MACRO_0_FREE_SFLASH429 EQU 0x0ffff3ad
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH430
CYREG_SFLASH_MACRO_0_FREE_SFLASH430 EQU 0x0ffff3ae
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH431
CYREG_SFLASH_MACRO_0_FREE_SFLASH431 EQU 0x0ffff3af
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH432
CYREG_SFLASH_MACRO_0_FREE_SFLASH432 EQU 0x0ffff3b0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH433
CYREG_SFLASH_MACRO_0_FREE_SFLASH433 EQU 0x0ffff3b1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH434
CYREG_SFLASH_MACRO_0_FREE_SFLASH434 EQU 0x0ffff3b2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH435
CYREG_SFLASH_MACRO_0_FREE_SFLASH435 EQU 0x0ffff3b3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH436
CYREG_SFLASH_MACRO_0_FREE_SFLASH436 EQU 0x0ffff3b4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH437
CYREG_SFLASH_MACRO_0_FREE_SFLASH437 EQU 0x0ffff3b5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH438
CYREG_SFLASH_MACRO_0_FREE_SFLASH438 EQU 0x0ffff3b6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH439
CYREG_SFLASH_MACRO_0_FREE_SFLASH439 EQU 0x0ffff3b7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH440
CYREG_SFLASH_MACRO_0_FREE_SFLASH440 EQU 0x0ffff3b8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH441
CYREG_SFLASH_MACRO_0_FREE_SFLASH441 EQU 0x0ffff3b9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH442
CYREG_SFLASH_MACRO_0_FREE_SFLASH442 EQU 0x0ffff3ba
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH443
CYREG_SFLASH_MACRO_0_FREE_SFLASH443 EQU 0x0ffff3bb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH444
CYREG_SFLASH_MACRO_0_FREE_SFLASH444 EQU 0x0ffff3bc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH445
CYREG_SFLASH_MACRO_0_FREE_SFLASH445 EQU 0x0ffff3bd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH446
CYREG_SFLASH_MACRO_0_FREE_SFLASH446 EQU 0x0ffff3be
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH447
CYREG_SFLASH_MACRO_0_FREE_SFLASH447 EQU 0x0ffff3bf
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH448
CYREG_SFLASH_MACRO_0_FREE_SFLASH448 EQU 0x0ffff3c0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH449
CYREG_SFLASH_MACRO_0_FREE_SFLASH449 EQU 0x0ffff3c1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH450
CYREG_SFLASH_MACRO_0_FREE_SFLASH450 EQU 0x0ffff3c2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH451
CYREG_SFLASH_MACRO_0_FREE_SFLASH451 EQU 0x0ffff3c3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH452
CYREG_SFLASH_MACRO_0_FREE_SFLASH452 EQU 0x0ffff3c4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH453
CYREG_SFLASH_MACRO_0_FREE_SFLASH453 EQU 0x0ffff3c5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH454
CYREG_SFLASH_MACRO_0_FREE_SFLASH454 EQU 0x0ffff3c6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH455
CYREG_SFLASH_MACRO_0_FREE_SFLASH455 EQU 0x0ffff3c7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH456
CYREG_SFLASH_MACRO_0_FREE_SFLASH456 EQU 0x0ffff3c8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH457
CYREG_SFLASH_MACRO_0_FREE_SFLASH457 EQU 0x0ffff3c9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH458
CYREG_SFLASH_MACRO_0_FREE_SFLASH458 EQU 0x0ffff3ca
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH459
CYREG_SFLASH_MACRO_0_FREE_SFLASH459 EQU 0x0ffff3cb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH460
CYREG_SFLASH_MACRO_0_FREE_SFLASH460 EQU 0x0ffff3cc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH461
CYREG_SFLASH_MACRO_0_FREE_SFLASH461 EQU 0x0ffff3cd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH462
CYREG_SFLASH_MACRO_0_FREE_SFLASH462 EQU 0x0ffff3ce
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH463
CYREG_SFLASH_MACRO_0_FREE_SFLASH463 EQU 0x0ffff3cf
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH464
CYREG_SFLASH_MACRO_0_FREE_SFLASH464 EQU 0x0ffff3d0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH465
CYREG_SFLASH_MACRO_0_FREE_SFLASH465 EQU 0x0ffff3d1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH466
CYREG_SFLASH_MACRO_0_FREE_SFLASH466 EQU 0x0ffff3d2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH467
CYREG_SFLASH_MACRO_0_FREE_SFLASH467 EQU 0x0ffff3d3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH468
CYREG_SFLASH_MACRO_0_FREE_SFLASH468 EQU 0x0ffff3d4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH469
CYREG_SFLASH_MACRO_0_FREE_SFLASH469 EQU 0x0ffff3d5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH470
CYREG_SFLASH_MACRO_0_FREE_SFLASH470 EQU 0x0ffff3d6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH471
CYREG_SFLASH_MACRO_0_FREE_SFLASH471 EQU 0x0ffff3d7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH472
CYREG_SFLASH_MACRO_0_FREE_SFLASH472 EQU 0x0ffff3d8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH473
CYREG_SFLASH_MACRO_0_FREE_SFLASH473 EQU 0x0ffff3d9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH474
CYREG_SFLASH_MACRO_0_FREE_SFLASH474 EQU 0x0ffff3da
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH475
CYREG_SFLASH_MACRO_0_FREE_SFLASH475 EQU 0x0ffff3db
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH476
CYREG_SFLASH_MACRO_0_FREE_SFLASH476 EQU 0x0ffff3dc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH477
CYREG_SFLASH_MACRO_0_FREE_SFLASH477 EQU 0x0ffff3dd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH478
CYREG_SFLASH_MACRO_0_FREE_SFLASH478 EQU 0x0ffff3de
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH479
CYREG_SFLASH_MACRO_0_FREE_SFLASH479 EQU 0x0ffff3df
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH480
CYREG_SFLASH_MACRO_0_FREE_SFLASH480 EQU 0x0ffff3e0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH481
CYREG_SFLASH_MACRO_0_FREE_SFLASH481 EQU 0x0ffff3e1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH482
CYREG_SFLASH_MACRO_0_FREE_SFLASH482 EQU 0x0ffff3e2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH483
CYREG_SFLASH_MACRO_0_FREE_SFLASH483 EQU 0x0ffff3e3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH484
CYREG_SFLASH_MACRO_0_FREE_SFLASH484 EQU 0x0ffff3e4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH485
CYREG_SFLASH_MACRO_0_FREE_SFLASH485 EQU 0x0ffff3e5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH486
CYREG_SFLASH_MACRO_0_FREE_SFLASH486 EQU 0x0ffff3e6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH487
CYREG_SFLASH_MACRO_0_FREE_SFLASH487 EQU 0x0ffff3e7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH488
CYREG_SFLASH_MACRO_0_FREE_SFLASH488 EQU 0x0ffff3e8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH489
CYREG_SFLASH_MACRO_0_FREE_SFLASH489 EQU 0x0ffff3e9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH490
CYREG_SFLASH_MACRO_0_FREE_SFLASH490 EQU 0x0ffff3ea
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH491
CYREG_SFLASH_MACRO_0_FREE_SFLASH491 EQU 0x0ffff3eb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH492
CYREG_SFLASH_MACRO_0_FREE_SFLASH492 EQU 0x0ffff3ec
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH493
CYREG_SFLASH_MACRO_0_FREE_SFLASH493 EQU 0x0ffff3ed
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH494
CYREG_SFLASH_MACRO_0_FREE_SFLASH494 EQU 0x0ffff3ee
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH495
CYREG_SFLASH_MACRO_0_FREE_SFLASH495 EQU 0x0ffff3ef
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH496
CYREG_SFLASH_MACRO_0_FREE_SFLASH496 EQU 0x0ffff3f0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH497
CYREG_SFLASH_MACRO_0_FREE_SFLASH497 EQU 0x0ffff3f1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH498
CYREG_SFLASH_MACRO_0_FREE_SFLASH498 EQU 0x0ffff3f2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH499
CYREG_SFLASH_MACRO_0_FREE_SFLASH499 EQU 0x0ffff3f3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH500
CYREG_SFLASH_MACRO_0_FREE_SFLASH500 EQU 0x0ffff3f4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH501
CYREG_SFLASH_MACRO_0_FREE_SFLASH501 EQU 0x0ffff3f5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH502
CYREG_SFLASH_MACRO_0_FREE_SFLASH502 EQU 0x0ffff3f6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH503
CYREG_SFLASH_MACRO_0_FREE_SFLASH503 EQU 0x0ffff3f7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH504
CYREG_SFLASH_MACRO_0_FREE_SFLASH504 EQU 0x0ffff3f8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH505
CYREG_SFLASH_MACRO_0_FREE_SFLASH505 EQU 0x0ffff3f9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH506
CYREG_SFLASH_MACRO_0_FREE_SFLASH506 EQU 0x0ffff3fa
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH507
CYREG_SFLASH_MACRO_0_FREE_SFLASH507 EQU 0x0ffff3fb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH508
CYREG_SFLASH_MACRO_0_FREE_SFLASH508 EQU 0x0ffff3fc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH509
CYREG_SFLASH_MACRO_0_FREE_SFLASH509 EQU 0x0ffff3fd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH510
CYREG_SFLASH_MACRO_0_FREE_SFLASH510 EQU 0x0ffff3fe
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_MACRO_0_FREE_SFLASH511
CYREG_SFLASH_MACRO_0_FREE_SFLASH511 EQU 0x0ffff3ff
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW0
CYREG_SFLASH_ALT_PROT_ROW0 EQU 0x0ffff400
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW1
CYREG_SFLASH_ALT_PROT_ROW1 EQU 0x0ffff401
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW2
CYREG_SFLASH_ALT_PROT_ROW2 EQU 0x0ffff402
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW3
CYREG_SFLASH_ALT_PROT_ROW3 EQU 0x0ffff403
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW4
CYREG_SFLASH_ALT_PROT_ROW4 EQU 0x0ffff404
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW5
CYREG_SFLASH_ALT_PROT_ROW5 EQU 0x0ffff405
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW6
CYREG_SFLASH_ALT_PROT_ROW6 EQU 0x0ffff406
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW7
CYREG_SFLASH_ALT_PROT_ROW7 EQU 0x0ffff407
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW8
CYREG_SFLASH_ALT_PROT_ROW8 EQU 0x0ffff408
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW9
CYREG_SFLASH_ALT_PROT_ROW9 EQU 0x0ffff409
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW10
CYREG_SFLASH_ALT_PROT_ROW10 EQU 0x0ffff40a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW11
CYREG_SFLASH_ALT_PROT_ROW11 EQU 0x0ffff40b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW12
CYREG_SFLASH_ALT_PROT_ROW12 EQU 0x0ffff40c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW13
CYREG_SFLASH_ALT_PROT_ROW13 EQU 0x0ffff40d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW14
CYREG_SFLASH_ALT_PROT_ROW14 EQU 0x0ffff40e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW15
CYREG_SFLASH_ALT_PROT_ROW15 EQU 0x0ffff40f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW16
CYREG_SFLASH_ALT_PROT_ROW16 EQU 0x0ffff410
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW17
CYREG_SFLASH_ALT_PROT_ROW17 EQU 0x0ffff411
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW18
CYREG_SFLASH_ALT_PROT_ROW18 EQU 0x0ffff412
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW19
CYREG_SFLASH_ALT_PROT_ROW19 EQU 0x0ffff413
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW20
CYREG_SFLASH_ALT_PROT_ROW20 EQU 0x0ffff414
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW21
CYREG_SFLASH_ALT_PROT_ROW21 EQU 0x0ffff415
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW22
CYREG_SFLASH_ALT_PROT_ROW22 EQU 0x0ffff416
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW23
CYREG_SFLASH_ALT_PROT_ROW23 EQU 0x0ffff417
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW24
CYREG_SFLASH_ALT_PROT_ROW24 EQU 0x0ffff418
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW25
CYREG_SFLASH_ALT_PROT_ROW25 EQU 0x0ffff419
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW26
CYREG_SFLASH_ALT_PROT_ROW26 EQU 0x0ffff41a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW27
CYREG_SFLASH_ALT_PROT_ROW27 EQU 0x0ffff41b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW28
CYREG_SFLASH_ALT_PROT_ROW28 EQU 0x0ffff41c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW29
CYREG_SFLASH_ALT_PROT_ROW29 EQU 0x0ffff41d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW30
CYREG_SFLASH_ALT_PROT_ROW30 EQU 0x0ffff41e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW31
CYREG_SFLASH_ALT_PROT_ROW31 EQU 0x0ffff41f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW32
CYREG_SFLASH_ALT_PROT_ROW32 EQU 0x0ffff420
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW33
CYREG_SFLASH_ALT_PROT_ROW33 EQU 0x0ffff421
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW34
CYREG_SFLASH_ALT_PROT_ROW34 EQU 0x0ffff422
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW35
CYREG_SFLASH_ALT_PROT_ROW35 EQU 0x0ffff423
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW36
CYREG_SFLASH_ALT_PROT_ROW36 EQU 0x0ffff424
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW37
CYREG_SFLASH_ALT_PROT_ROW37 EQU 0x0ffff425
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW38
CYREG_SFLASH_ALT_PROT_ROW38 EQU 0x0ffff426
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW39
CYREG_SFLASH_ALT_PROT_ROW39 EQU 0x0ffff427
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW40
CYREG_SFLASH_ALT_PROT_ROW40 EQU 0x0ffff428
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW41
CYREG_SFLASH_ALT_PROT_ROW41 EQU 0x0ffff429
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW42
CYREG_SFLASH_ALT_PROT_ROW42 EQU 0x0ffff42a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW43
CYREG_SFLASH_ALT_PROT_ROW43 EQU 0x0ffff42b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW44
CYREG_SFLASH_ALT_PROT_ROW44 EQU 0x0ffff42c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW45
CYREG_SFLASH_ALT_PROT_ROW45 EQU 0x0ffff42d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW46
CYREG_SFLASH_ALT_PROT_ROW46 EQU 0x0ffff42e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW47
CYREG_SFLASH_ALT_PROT_ROW47 EQU 0x0ffff42f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW48
CYREG_SFLASH_ALT_PROT_ROW48 EQU 0x0ffff430
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW49
CYREG_SFLASH_ALT_PROT_ROW49 EQU 0x0ffff431
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW50
CYREG_SFLASH_ALT_PROT_ROW50 EQU 0x0ffff432
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW51
CYREG_SFLASH_ALT_PROT_ROW51 EQU 0x0ffff433
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW52
CYREG_SFLASH_ALT_PROT_ROW52 EQU 0x0ffff434
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW53
CYREG_SFLASH_ALT_PROT_ROW53 EQU 0x0ffff435
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW54
CYREG_SFLASH_ALT_PROT_ROW54 EQU 0x0ffff436
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW55
CYREG_SFLASH_ALT_PROT_ROW55 EQU 0x0ffff437
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW56
CYREG_SFLASH_ALT_PROT_ROW56 EQU 0x0ffff438
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW57
CYREG_SFLASH_ALT_PROT_ROW57 EQU 0x0ffff439
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW58
CYREG_SFLASH_ALT_PROT_ROW58 EQU 0x0ffff43a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW59
CYREG_SFLASH_ALT_PROT_ROW59 EQU 0x0ffff43b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW60
CYREG_SFLASH_ALT_PROT_ROW60 EQU 0x0ffff43c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW61
CYREG_SFLASH_ALT_PROT_ROW61 EQU 0x0ffff43d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW62
CYREG_SFLASH_ALT_PROT_ROW62 EQU 0x0ffff43e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW63
CYREG_SFLASH_ALT_PROT_ROW63 EQU 0x0ffff43f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW64
CYREG_SFLASH_ALT_PROT_ROW64 EQU 0x0ffff440
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW65
CYREG_SFLASH_ALT_PROT_ROW65 EQU 0x0ffff441
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW66
CYREG_SFLASH_ALT_PROT_ROW66 EQU 0x0ffff442
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW67
CYREG_SFLASH_ALT_PROT_ROW67 EQU 0x0ffff443
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW68
CYREG_SFLASH_ALT_PROT_ROW68 EQU 0x0ffff444
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW69
CYREG_SFLASH_ALT_PROT_ROW69 EQU 0x0ffff445
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW70
CYREG_SFLASH_ALT_PROT_ROW70 EQU 0x0ffff446
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW71
CYREG_SFLASH_ALT_PROT_ROW71 EQU 0x0ffff447
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW72
CYREG_SFLASH_ALT_PROT_ROW72 EQU 0x0ffff448
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW73
CYREG_SFLASH_ALT_PROT_ROW73 EQU 0x0ffff449
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW74
CYREG_SFLASH_ALT_PROT_ROW74 EQU 0x0ffff44a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW75
CYREG_SFLASH_ALT_PROT_ROW75 EQU 0x0ffff44b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW76
CYREG_SFLASH_ALT_PROT_ROW76 EQU 0x0ffff44c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW77
CYREG_SFLASH_ALT_PROT_ROW77 EQU 0x0ffff44d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW78
CYREG_SFLASH_ALT_PROT_ROW78 EQU 0x0ffff44e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW79
CYREG_SFLASH_ALT_PROT_ROW79 EQU 0x0ffff44f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW80
CYREG_SFLASH_ALT_PROT_ROW80 EQU 0x0ffff450
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW81
CYREG_SFLASH_ALT_PROT_ROW81 EQU 0x0ffff451
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW82
CYREG_SFLASH_ALT_PROT_ROW82 EQU 0x0ffff452
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW83
CYREG_SFLASH_ALT_PROT_ROW83 EQU 0x0ffff453
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW84
CYREG_SFLASH_ALT_PROT_ROW84 EQU 0x0ffff454
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW85
CYREG_SFLASH_ALT_PROT_ROW85 EQU 0x0ffff455
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW86
CYREG_SFLASH_ALT_PROT_ROW86 EQU 0x0ffff456
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW87
CYREG_SFLASH_ALT_PROT_ROW87 EQU 0x0ffff457
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW88
CYREG_SFLASH_ALT_PROT_ROW88 EQU 0x0ffff458
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW89
CYREG_SFLASH_ALT_PROT_ROW89 EQU 0x0ffff459
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW90
CYREG_SFLASH_ALT_PROT_ROW90 EQU 0x0ffff45a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW91
CYREG_SFLASH_ALT_PROT_ROW91 EQU 0x0ffff45b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW92
CYREG_SFLASH_ALT_PROT_ROW92 EQU 0x0ffff45c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW93
CYREG_SFLASH_ALT_PROT_ROW93 EQU 0x0ffff45d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW94
CYREG_SFLASH_ALT_PROT_ROW94 EQU 0x0ffff45e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW95
CYREG_SFLASH_ALT_PROT_ROW95 EQU 0x0ffff45f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW96
CYREG_SFLASH_ALT_PROT_ROW96 EQU 0x0ffff460
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW97
CYREG_SFLASH_ALT_PROT_ROW97 EQU 0x0ffff461
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW98
CYREG_SFLASH_ALT_PROT_ROW98 EQU 0x0ffff462
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW99
CYREG_SFLASH_ALT_PROT_ROW99 EQU 0x0ffff463
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW100
CYREG_SFLASH_ALT_PROT_ROW100 EQU 0x0ffff464
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW101
CYREG_SFLASH_ALT_PROT_ROW101 EQU 0x0ffff465
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW102
CYREG_SFLASH_ALT_PROT_ROW102 EQU 0x0ffff466
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW103
CYREG_SFLASH_ALT_PROT_ROW103 EQU 0x0ffff467
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW104
CYREG_SFLASH_ALT_PROT_ROW104 EQU 0x0ffff468
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW105
CYREG_SFLASH_ALT_PROT_ROW105 EQU 0x0ffff469
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW106
CYREG_SFLASH_ALT_PROT_ROW106 EQU 0x0ffff46a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW107
CYREG_SFLASH_ALT_PROT_ROW107 EQU 0x0ffff46b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW108
CYREG_SFLASH_ALT_PROT_ROW108 EQU 0x0ffff46c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW109
CYREG_SFLASH_ALT_PROT_ROW109 EQU 0x0ffff46d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW110
CYREG_SFLASH_ALT_PROT_ROW110 EQU 0x0ffff46e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW111
CYREG_SFLASH_ALT_PROT_ROW111 EQU 0x0ffff46f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW112
CYREG_SFLASH_ALT_PROT_ROW112 EQU 0x0ffff470
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW113
CYREG_SFLASH_ALT_PROT_ROW113 EQU 0x0ffff471
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW114
CYREG_SFLASH_ALT_PROT_ROW114 EQU 0x0ffff472
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW115
CYREG_SFLASH_ALT_PROT_ROW115 EQU 0x0ffff473
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW116
CYREG_SFLASH_ALT_PROT_ROW116 EQU 0x0ffff474
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW117
CYREG_SFLASH_ALT_PROT_ROW117 EQU 0x0ffff475
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW118
CYREG_SFLASH_ALT_PROT_ROW118 EQU 0x0ffff476
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW119
CYREG_SFLASH_ALT_PROT_ROW119 EQU 0x0ffff477
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW120
CYREG_SFLASH_ALT_PROT_ROW120 EQU 0x0ffff478
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW121
CYREG_SFLASH_ALT_PROT_ROW121 EQU 0x0ffff479
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW122
CYREG_SFLASH_ALT_PROT_ROW122 EQU 0x0ffff47a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW123
CYREG_SFLASH_ALT_PROT_ROW123 EQU 0x0ffff47b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW124
CYREG_SFLASH_ALT_PROT_ROW124 EQU 0x0ffff47c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW125
CYREG_SFLASH_ALT_PROT_ROW125 EQU 0x0ffff47d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW126
CYREG_SFLASH_ALT_PROT_ROW126 EQU 0x0ffff47e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW127
CYREG_SFLASH_ALT_PROT_ROW127 EQU 0x0ffff47f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW128
CYREG_SFLASH_ALT_PROT_ROW128 EQU 0x0ffff480
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW129
CYREG_SFLASH_ALT_PROT_ROW129 EQU 0x0ffff481
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW130
CYREG_SFLASH_ALT_PROT_ROW130 EQU 0x0ffff482
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW131
CYREG_SFLASH_ALT_PROT_ROW131 EQU 0x0ffff483
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW132
CYREG_SFLASH_ALT_PROT_ROW132 EQU 0x0ffff484
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW133
CYREG_SFLASH_ALT_PROT_ROW133 EQU 0x0ffff485
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW134
CYREG_SFLASH_ALT_PROT_ROW134 EQU 0x0ffff486
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW135
CYREG_SFLASH_ALT_PROT_ROW135 EQU 0x0ffff487
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW136
CYREG_SFLASH_ALT_PROT_ROW136 EQU 0x0ffff488
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW137
CYREG_SFLASH_ALT_PROT_ROW137 EQU 0x0ffff489
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW138
CYREG_SFLASH_ALT_PROT_ROW138 EQU 0x0ffff48a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW139
CYREG_SFLASH_ALT_PROT_ROW139 EQU 0x0ffff48b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW140
CYREG_SFLASH_ALT_PROT_ROW140 EQU 0x0ffff48c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW141
CYREG_SFLASH_ALT_PROT_ROW141 EQU 0x0ffff48d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW142
CYREG_SFLASH_ALT_PROT_ROW142 EQU 0x0ffff48e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW143
CYREG_SFLASH_ALT_PROT_ROW143 EQU 0x0ffff48f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW144
CYREG_SFLASH_ALT_PROT_ROW144 EQU 0x0ffff490
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW145
CYREG_SFLASH_ALT_PROT_ROW145 EQU 0x0ffff491
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW146
CYREG_SFLASH_ALT_PROT_ROW146 EQU 0x0ffff492
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW147
CYREG_SFLASH_ALT_PROT_ROW147 EQU 0x0ffff493
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW148
CYREG_SFLASH_ALT_PROT_ROW148 EQU 0x0ffff494
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW149
CYREG_SFLASH_ALT_PROT_ROW149 EQU 0x0ffff495
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW150
CYREG_SFLASH_ALT_PROT_ROW150 EQU 0x0ffff496
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW151
CYREG_SFLASH_ALT_PROT_ROW151 EQU 0x0ffff497
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW152
CYREG_SFLASH_ALT_PROT_ROW152 EQU 0x0ffff498
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW153
CYREG_SFLASH_ALT_PROT_ROW153 EQU 0x0ffff499
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW154
CYREG_SFLASH_ALT_PROT_ROW154 EQU 0x0ffff49a
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW155
CYREG_SFLASH_ALT_PROT_ROW155 EQU 0x0ffff49b
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW156
CYREG_SFLASH_ALT_PROT_ROW156 EQU 0x0ffff49c
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW157
CYREG_SFLASH_ALT_PROT_ROW157 EQU 0x0ffff49d
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW158
CYREG_SFLASH_ALT_PROT_ROW158 EQU 0x0ffff49e
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW159
CYREG_SFLASH_ALT_PROT_ROW159 EQU 0x0ffff49f
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW160
CYREG_SFLASH_ALT_PROT_ROW160 EQU 0x0ffff4a0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW161
CYREG_SFLASH_ALT_PROT_ROW161 EQU 0x0ffff4a1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW162
CYREG_SFLASH_ALT_PROT_ROW162 EQU 0x0ffff4a2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW163
CYREG_SFLASH_ALT_PROT_ROW163 EQU 0x0ffff4a3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW164
CYREG_SFLASH_ALT_PROT_ROW164 EQU 0x0ffff4a4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW165
CYREG_SFLASH_ALT_PROT_ROW165 EQU 0x0ffff4a5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW166
CYREG_SFLASH_ALT_PROT_ROW166 EQU 0x0ffff4a6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW167
CYREG_SFLASH_ALT_PROT_ROW167 EQU 0x0ffff4a7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW168
CYREG_SFLASH_ALT_PROT_ROW168 EQU 0x0ffff4a8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW169
CYREG_SFLASH_ALT_PROT_ROW169 EQU 0x0ffff4a9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW170
CYREG_SFLASH_ALT_PROT_ROW170 EQU 0x0ffff4aa
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW171
CYREG_SFLASH_ALT_PROT_ROW171 EQU 0x0ffff4ab
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW172
CYREG_SFLASH_ALT_PROT_ROW172 EQU 0x0ffff4ac
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW173
CYREG_SFLASH_ALT_PROT_ROW173 EQU 0x0ffff4ad
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW174
CYREG_SFLASH_ALT_PROT_ROW174 EQU 0x0ffff4ae
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW175
CYREG_SFLASH_ALT_PROT_ROW175 EQU 0x0ffff4af
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW176
CYREG_SFLASH_ALT_PROT_ROW176 EQU 0x0ffff4b0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW177
CYREG_SFLASH_ALT_PROT_ROW177 EQU 0x0ffff4b1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW178
CYREG_SFLASH_ALT_PROT_ROW178 EQU 0x0ffff4b2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW179
CYREG_SFLASH_ALT_PROT_ROW179 EQU 0x0ffff4b3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW180
CYREG_SFLASH_ALT_PROT_ROW180 EQU 0x0ffff4b4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW181
CYREG_SFLASH_ALT_PROT_ROW181 EQU 0x0ffff4b5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW182
CYREG_SFLASH_ALT_PROT_ROW182 EQU 0x0ffff4b6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW183
CYREG_SFLASH_ALT_PROT_ROW183 EQU 0x0ffff4b7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW184
CYREG_SFLASH_ALT_PROT_ROW184 EQU 0x0ffff4b8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW185
CYREG_SFLASH_ALT_PROT_ROW185 EQU 0x0ffff4b9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW186
CYREG_SFLASH_ALT_PROT_ROW186 EQU 0x0ffff4ba
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW187
CYREG_SFLASH_ALT_PROT_ROW187 EQU 0x0ffff4bb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW188
CYREG_SFLASH_ALT_PROT_ROW188 EQU 0x0ffff4bc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW189
CYREG_SFLASH_ALT_PROT_ROW189 EQU 0x0ffff4bd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW190
CYREG_SFLASH_ALT_PROT_ROW190 EQU 0x0ffff4be
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW191
CYREG_SFLASH_ALT_PROT_ROW191 EQU 0x0ffff4bf
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW192
CYREG_SFLASH_ALT_PROT_ROW192 EQU 0x0ffff4c0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW193
CYREG_SFLASH_ALT_PROT_ROW193 EQU 0x0ffff4c1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW194
CYREG_SFLASH_ALT_PROT_ROW194 EQU 0x0ffff4c2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW195
CYREG_SFLASH_ALT_PROT_ROW195 EQU 0x0ffff4c3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW196
CYREG_SFLASH_ALT_PROT_ROW196 EQU 0x0ffff4c4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW197
CYREG_SFLASH_ALT_PROT_ROW197 EQU 0x0ffff4c5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW198
CYREG_SFLASH_ALT_PROT_ROW198 EQU 0x0ffff4c6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW199
CYREG_SFLASH_ALT_PROT_ROW199 EQU 0x0ffff4c7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW200
CYREG_SFLASH_ALT_PROT_ROW200 EQU 0x0ffff4c8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW201
CYREG_SFLASH_ALT_PROT_ROW201 EQU 0x0ffff4c9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW202
CYREG_SFLASH_ALT_PROT_ROW202 EQU 0x0ffff4ca
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW203
CYREG_SFLASH_ALT_PROT_ROW203 EQU 0x0ffff4cb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW204
CYREG_SFLASH_ALT_PROT_ROW204 EQU 0x0ffff4cc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW205
CYREG_SFLASH_ALT_PROT_ROW205 EQU 0x0ffff4cd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW206
CYREG_SFLASH_ALT_PROT_ROW206 EQU 0x0ffff4ce
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW207
CYREG_SFLASH_ALT_PROT_ROW207 EQU 0x0ffff4cf
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW208
CYREG_SFLASH_ALT_PROT_ROW208 EQU 0x0ffff4d0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW209
CYREG_SFLASH_ALT_PROT_ROW209 EQU 0x0ffff4d1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW210
CYREG_SFLASH_ALT_PROT_ROW210 EQU 0x0ffff4d2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW211
CYREG_SFLASH_ALT_PROT_ROW211 EQU 0x0ffff4d3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW212
CYREG_SFLASH_ALT_PROT_ROW212 EQU 0x0ffff4d4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW213
CYREG_SFLASH_ALT_PROT_ROW213 EQU 0x0ffff4d5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW214
CYREG_SFLASH_ALT_PROT_ROW214 EQU 0x0ffff4d6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW215
CYREG_SFLASH_ALT_PROT_ROW215 EQU 0x0ffff4d7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW216
CYREG_SFLASH_ALT_PROT_ROW216 EQU 0x0ffff4d8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW217
CYREG_SFLASH_ALT_PROT_ROW217 EQU 0x0ffff4d9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW218
CYREG_SFLASH_ALT_PROT_ROW218 EQU 0x0ffff4da
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW219
CYREG_SFLASH_ALT_PROT_ROW219 EQU 0x0ffff4db
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW220
CYREG_SFLASH_ALT_PROT_ROW220 EQU 0x0ffff4dc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW221
CYREG_SFLASH_ALT_PROT_ROW221 EQU 0x0ffff4dd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW222
CYREG_SFLASH_ALT_PROT_ROW222 EQU 0x0ffff4de
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW223
CYREG_SFLASH_ALT_PROT_ROW223 EQU 0x0ffff4df
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW224
CYREG_SFLASH_ALT_PROT_ROW224 EQU 0x0ffff4e0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW225
CYREG_SFLASH_ALT_PROT_ROW225 EQU 0x0ffff4e1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW226
CYREG_SFLASH_ALT_PROT_ROW226 EQU 0x0ffff4e2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW227
CYREG_SFLASH_ALT_PROT_ROW227 EQU 0x0ffff4e3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW228
CYREG_SFLASH_ALT_PROT_ROW228 EQU 0x0ffff4e4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW229
CYREG_SFLASH_ALT_PROT_ROW229 EQU 0x0ffff4e5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW230
CYREG_SFLASH_ALT_PROT_ROW230 EQU 0x0ffff4e6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW231
CYREG_SFLASH_ALT_PROT_ROW231 EQU 0x0ffff4e7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW232
CYREG_SFLASH_ALT_PROT_ROW232 EQU 0x0ffff4e8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW233
CYREG_SFLASH_ALT_PROT_ROW233 EQU 0x0ffff4e9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW234
CYREG_SFLASH_ALT_PROT_ROW234 EQU 0x0ffff4ea
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW235
CYREG_SFLASH_ALT_PROT_ROW235 EQU 0x0ffff4eb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW236
CYREG_SFLASH_ALT_PROT_ROW236 EQU 0x0ffff4ec
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW237
CYREG_SFLASH_ALT_PROT_ROW237 EQU 0x0ffff4ed
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW238
CYREG_SFLASH_ALT_PROT_ROW238 EQU 0x0ffff4ee
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW239
CYREG_SFLASH_ALT_PROT_ROW239 EQU 0x0ffff4ef
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW240
CYREG_SFLASH_ALT_PROT_ROW240 EQU 0x0ffff4f0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW241
CYREG_SFLASH_ALT_PROT_ROW241 EQU 0x0ffff4f1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW242
CYREG_SFLASH_ALT_PROT_ROW242 EQU 0x0ffff4f2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW243
CYREG_SFLASH_ALT_PROT_ROW243 EQU 0x0ffff4f3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW244
CYREG_SFLASH_ALT_PROT_ROW244 EQU 0x0ffff4f4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW245
CYREG_SFLASH_ALT_PROT_ROW245 EQU 0x0ffff4f5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW246
CYREG_SFLASH_ALT_PROT_ROW246 EQU 0x0ffff4f6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW247
CYREG_SFLASH_ALT_PROT_ROW247 EQU 0x0ffff4f7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW248
CYREG_SFLASH_ALT_PROT_ROW248 EQU 0x0ffff4f8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW249
CYREG_SFLASH_ALT_PROT_ROW249 EQU 0x0ffff4f9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW250
CYREG_SFLASH_ALT_PROT_ROW250 EQU 0x0ffff4fa
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW251
CYREG_SFLASH_ALT_PROT_ROW251 EQU 0x0ffff4fb
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW252
CYREG_SFLASH_ALT_PROT_ROW252 EQU 0x0ffff4fc
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW253
CYREG_SFLASH_ALT_PROT_ROW253 EQU 0x0ffff4fd
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW254
CYREG_SFLASH_ALT_PROT_ROW254 EQU 0x0ffff4fe
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW255
CYREG_SFLASH_ALT_PROT_ROW255 EQU 0x0ffff4ff
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PP
CYREG_SFLASH_ALT_PP EQU 0x0ffff5a0
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_PERIOD__OFFSET
CYFLD_SFLASH_PERIOD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_PERIOD__SIZE
CYFLD_SFLASH_PERIOD__SIZE EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_PDAC__OFFSET
CYFLD_SFLASH_PDAC__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_PDAC__SIZE
CYFLD_SFLASH_PDAC__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_NDAC__OFFSET
CYFLD_SFLASH_NDAC__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_NDAC__SIZE
CYFLD_SFLASH_NDAC__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_E
CYREG_SFLASH_ALT_E EQU 0x0ffff5a4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_P
CYREG_SFLASH_ALT_P EQU 0x0ffff5a8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_EA_E
CYREG_SFLASH_ALT_EA_E EQU 0x0ffff5ac
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_EA_P
CYREG_SFLASH_ALT_EA_P EQU 0x0ffff5b0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_ES_E
CYREG_SFLASH_ALT_ES_E EQU 0x0ffff5b4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_ES_P_EO
CYREG_SFLASH_ALT_ES_P_EO EQU 0x0ffff5b8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_E_VCTAT
CYREG_SFLASH_ALT_E_VCTAT EQU 0x0ffff5bc
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_SLOPE__OFFSET
CYFLD_SFLASH_VCTAT_SLOPE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_SLOPE__SIZE
CYFLD_SFLASH_VCTAT_SLOPE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_VOLTAGE__OFFSET
CYFLD_SFLASH_VCTAT_VOLTAGE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_VOLTAGE__SIZE
CYFLD_SFLASH_VCTAT_VOLTAGE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_ENABLE__OFFSET
CYFLD_SFLASH_VCTAT_ENABLE__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SFLASH_VCTAT_ENABLE__SIZE
CYFLD_SFLASH_VCTAT_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_P_VCTAT
CYREG_SFLASH_ALT_P_VCTAT EQU 0x0ffff5bd
    ENDIF
    IF :LNOT::DEF:CYDEV_ROM_BASE
CYDEV_ROM_BASE EQU 0x10000000
    ENDIF
    IF :LNOT::DEF:CYDEV_ROM_SIZE
CYDEV_ROM_SIZE EQU 0x00002000
    ENDIF
    IF :LNOT::DEF:CYREG_ROM_DATA_MBASE
CYREG_ROM_DATA_MBASE EQU 0x10000000
    ENDIF
    IF :LNOT::DEF:CYREG_ROM_DATA_MSIZE
CYREG_ROM_DATA_MSIZE EQU 0x00002000
    ENDIF
    IF :LNOT::DEF:CYDEV_SRAM_BASE
CYDEV_SRAM_BASE EQU 0x20000000
    ENDIF
    IF :LNOT::DEF:CYDEV_SRAM_SIZE
CYDEV_SRAM_SIZE EQU 0x00004000
    ENDIF
    IF :LNOT::DEF:CYREG_SRAM_DATA_MBASE
CYREG_SRAM_DATA_MBASE EQU 0x20000000
    ENDIF
    IF :LNOT::DEF:CYREG_SRAM_DATA_MSIZE
CYREG_SRAM_DATA_MSIZE EQU 0x00004000
    ENDIF
    IF :LNOT::DEF:CYDEV_PERI_BASE
CYDEV_PERI_BASE EQU 0x40010000
    ENDIF
    IF :LNOT::DEF:CYDEV_PERI_SIZE
CYDEV_PERI_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_CMD
CYREG_PERI_DIV_CMD EQU 0x40010000
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_SEL_DIV__OFFSET
CYFLD_PERI_SEL_DIV__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_SEL_DIV__SIZE
CYFLD_PERI_SEL_DIV__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_SEL_TYPE__OFFSET
CYFLD_PERI_SEL_TYPE__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_SEL_TYPE__SIZE
CYFLD_PERI_SEL_TYPE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_PA_SEL_DIV__OFFSET
CYFLD_PERI_PA_SEL_DIV__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_PA_SEL_DIV__SIZE
CYFLD_PERI_PA_SEL_DIV__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_PA_SEL_TYPE__OFFSET
CYFLD_PERI_PA_SEL_TYPE__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_PA_SEL_TYPE__SIZE
CYFLD_PERI_PA_SEL_TYPE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_DISABLE__OFFSET
CYFLD_PERI_DISABLE__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_DISABLE__SIZE
CYFLD_PERI_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_ENABLE__OFFSET
CYFLD_PERI_ENABLE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_ENABLE__SIZE
CYFLD_PERI_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL0
CYREG_PERI_PCLK_CTL0 EQU 0x40010100
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL1
CYREG_PERI_PCLK_CTL1 EQU 0x40010104
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL2
CYREG_PERI_PCLK_CTL2 EQU 0x40010108
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL3
CYREG_PERI_PCLK_CTL3 EQU 0x4001010c
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL4
CYREG_PERI_PCLK_CTL4 EQU 0x40010110
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL5
CYREG_PERI_PCLK_CTL5 EQU 0x40010114
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL6
CYREG_PERI_PCLK_CTL6 EQU 0x40010118
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL7
CYREG_PERI_PCLK_CTL7 EQU 0x4001011c
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL8
CYREG_PERI_PCLK_CTL8 EQU 0x40010120
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL9
CYREG_PERI_PCLK_CTL9 EQU 0x40010124
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL10
CYREG_PERI_PCLK_CTL10 EQU 0x40010128
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL11
CYREG_PERI_PCLK_CTL11 EQU 0x4001012c
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL12
CYREG_PERI_PCLK_CTL12 EQU 0x40010130
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL13
CYREG_PERI_PCLK_CTL13 EQU 0x40010134
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL14
CYREG_PERI_PCLK_CTL14 EQU 0x40010138
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL15
CYREG_PERI_PCLK_CTL15 EQU 0x4001013c
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL0
CYREG_PERI_DIV_16_CTL0 EQU 0x40010300
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_EN__OFFSET
CYFLD_PERI_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_EN__SIZE
CYFLD_PERI_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_INT16_DIV__OFFSET
CYFLD_PERI_INT16_DIV__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_INT16_DIV__SIZE
CYFLD_PERI_INT16_DIV__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL1
CYREG_PERI_DIV_16_CTL1 EQU 0x40010304
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL2
CYREG_PERI_DIV_16_CTL2 EQU 0x40010308
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL3
CYREG_PERI_DIV_16_CTL3 EQU 0x4001030c
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL4
CYREG_PERI_DIV_16_CTL4 EQU 0x40010310
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL5
CYREG_PERI_DIV_16_CTL5 EQU 0x40010314
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL6
CYREG_PERI_DIV_16_CTL6 EQU 0x40010318
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL7
CYREG_PERI_DIV_16_CTL7 EQU 0x4001031c
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL8
CYREG_PERI_DIV_16_CTL8 EQU 0x40010320
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL9
CYREG_PERI_DIV_16_CTL9 EQU 0x40010324
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_5_CTL0
CYREG_PERI_DIV_16_5_CTL0 EQU 0x40010400
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_FRAC5_DIV__OFFSET
CYFLD_PERI_FRAC5_DIV__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_PERI_FRAC5_DIV__SIZE
CYFLD_PERI_FRAC5_DIV__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_5_CTL1
CYREG_PERI_DIV_16_5_CTL1 EQU 0x40010404
    ENDIF
    IF :LNOT::DEF:CYDEV_HSIOM_BASE
CYDEV_HSIOM_BASE EQU 0x40020000
    ENDIF
    IF :LNOT::DEF:CYDEV_HSIOM_SIZE
CYDEV_HSIOM_SIZE EQU 0x00004000
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL0
CYREG_HSIOM_PORT_SEL0 EQU 0x40020000
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO0_SEL__OFFSET
CYFLD_HSIOM_IO0_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO0_SEL__SIZE
CYFLD_HSIOM_IO0_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_GPIO
CYVAL_HSIOM_IO0_SEL_GPIO EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_GPIO_DSI
CYVAL_HSIOM_IO0_SEL_GPIO_DSI EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_DSI_DSI
CYVAL_HSIOM_IO0_SEL_DSI_DSI EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_DSI_GPIO
CYVAL_HSIOM_IO0_SEL_DSI_GPIO EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_CSD_SENSE
CYVAL_HSIOM_IO0_SEL_CSD_SENSE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_CSD_SHIELD
CYVAL_HSIOM_IO0_SEL_CSD_SHIELD EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_AMUXA
CYVAL_HSIOM_IO0_SEL_AMUXA EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_AMUXB
CYVAL_HSIOM_IO0_SEL_AMUXB EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_ACT_0
CYVAL_HSIOM_IO0_SEL_ACT_0 EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_ACT_1
CYVAL_HSIOM_IO0_SEL_ACT_1 EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_ACT_2
CYVAL_HSIOM_IO0_SEL_ACT_2 EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_ACT_3
CYVAL_HSIOM_IO0_SEL_ACT_3 EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_LCD_COM
CYVAL_HSIOM_IO0_SEL_LCD_COM EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_LCD_SEG
CYVAL_HSIOM_IO0_SEL_LCD_SEG EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_DS_0
CYVAL_HSIOM_IO0_SEL_DS_0 EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_DS_1
CYVAL_HSIOM_IO0_SEL_DS_1 EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_DS_2
CYVAL_HSIOM_IO0_SEL_DS_2 EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL_HSIOM_IO0_SEL_DS_3
CYVAL_HSIOM_IO0_SEL_DS_3 EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO1_SEL__OFFSET
CYFLD_HSIOM_IO1_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO1_SEL__SIZE
CYFLD_HSIOM_IO1_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO2_SEL__OFFSET
CYFLD_HSIOM_IO2_SEL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO2_SEL__SIZE
CYFLD_HSIOM_IO2_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO3_SEL__OFFSET
CYFLD_HSIOM_IO3_SEL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO3_SEL__SIZE
CYFLD_HSIOM_IO3_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO4_SEL__OFFSET
CYFLD_HSIOM_IO4_SEL__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO4_SEL__SIZE
CYFLD_HSIOM_IO4_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO5_SEL__OFFSET
CYFLD_HSIOM_IO5_SEL__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO5_SEL__SIZE
CYFLD_HSIOM_IO5_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO6_SEL__OFFSET
CYFLD_HSIOM_IO6_SEL__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO6_SEL__SIZE
CYFLD_HSIOM_IO6_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO7_SEL__OFFSET
CYFLD_HSIOM_IO7_SEL__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_IO7_SEL__SIZE
CYFLD_HSIOM_IO7_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL1
CYREG_HSIOM_PORT_SEL1 EQU 0x40020100
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL2
CYREG_HSIOM_PORT_SEL2 EQU 0x40020200
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL3
CYREG_HSIOM_PORT_SEL3 EQU 0x40020300
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL4
CYREG_HSIOM_PORT_SEL4 EQU 0x40020400
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL5
CYREG_HSIOM_PORT_SEL5 EQU 0x40020500
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_PORT_SEL6
CYREG_HSIOM_PORT_SEL6 EQU 0x40020600
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_AMUX_SPLIT_CTL0
CYREG_HSIOM_AMUX_SPLIT_CTL0 EQU 0x40022100
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_AA_SL__OFFSET
CYFLD_HSIOM_SWITCH_AA_SL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_AA_SL__SIZE
CYFLD_HSIOM_SWITCH_AA_SL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_AA_SR__OFFSET
CYFLD_HSIOM_SWITCH_AA_SR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_AA_SR__SIZE
CYFLD_HSIOM_SWITCH_AA_SR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_AA_S0__OFFSET
CYFLD_HSIOM_SWITCH_AA_S0__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_AA_S0__SIZE
CYFLD_HSIOM_SWITCH_AA_S0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_BB_SL__OFFSET
CYFLD_HSIOM_SWITCH_BB_SL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_BB_SL__SIZE
CYFLD_HSIOM_SWITCH_BB_SL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_BB_SR__OFFSET
CYFLD_HSIOM_SWITCH_BB_SR__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_BB_SR__SIZE
CYFLD_HSIOM_SWITCH_BB_SR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_BB_S0__OFFSET
CYFLD_HSIOM_SWITCH_BB_S0__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_HSIOM_SWITCH_BB_S0__SIZE
CYFLD_HSIOM_SWITCH_BB_S0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_AMUX_SPLIT_CTL1
CYREG_HSIOM_AMUX_SPLIT_CTL1 EQU 0x40022104
    ENDIF
    IF :LNOT::DEF:CYREG_HSIOM_AMUX_SPLIT_CTL2
CYREG_HSIOM_AMUX_SPLIT_CTL2 EQU 0x40022108
    ENDIF
    IF :LNOT::DEF:CYDEV_TST_BASE
CYDEV_TST_BASE EQU 0x40030000
    ENDIF
    IF :LNOT::DEF:CYDEV_TST_SIZE
CYDEV_TST_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_TST_CTRL
CYREG_TST_CTRL EQU 0x40030000
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_SCAN_MODE__OFFSET
CYFLD_TST_SCAN_MODE__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_SCAN_MODE__SIZE
CYFLD_TST_SCAN_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_TST_ADFT_CTRL
CYREG_TST_ADFT_CTRL EQU 0x40030004
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ADFT_MUX_SEL_0A__OFFSET
CYFLD_TST_ADFT_MUX_SEL_0A__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ADFT_MUX_SEL_0A__SIZE
CYFLD_TST_ADFT_MUX_SEL_0A__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_TST_ADFT_MUX_SEL_0A_NC0
CYVAL_TST_ADFT_MUX_SEL_0A_NC0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TST_ADFT_MUX_SEL_0A_IN1
CYVAL_TST_ADFT_MUX_SEL_0A_IN1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TST_ADFT_MUX_SEL_0A_IN2
CYVAL_TST_ADFT_MUX_SEL_0A_IN2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TST_ADFT_MUX_SEL_0A_IN3
CYVAL_TST_ADFT_MUX_SEL_0A_IN3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_TST_ADFT_MUX_SEL_0A_IN4
CYVAL_TST_ADFT_MUX_SEL_0A_IN4 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_TST_ADFT_MUX_SEL_0A_IN5
CYVAL_TST_ADFT_MUX_SEL_0A_IN5 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_TST_ADFT_MUX_SEL_0A_IN6
CYVAL_TST_ADFT_MUX_SEL_0A_IN6 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_TST_ADFT_MUX_SEL_0A_NC7
CYVAL_TST_ADFT_MUX_SEL_0A_NC7 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ADFT_MUX_SEL_1A__OFFSET
CYFLD_TST_ADFT_MUX_SEL_1A__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ADFT_MUX_SEL_1A__SIZE
CYFLD_TST_ADFT_MUX_SEL_1A__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ADFT_MUX_SEL_0B__OFFSET
CYFLD_TST_ADFT_MUX_SEL_0B__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ADFT_MUX_SEL_0B__SIZE
CYFLD_TST_ADFT_MUX_SEL_0B__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ADFT_MUX_SEL_1B__OFFSET
CYFLD_TST_ADFT_MUX_SEL_1B__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ADFT_MUX_SEL_1B__SIZE
CYFLD_TST_ADFT_MUX_SEL_1B__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ENABLE__OFFSET
CYFLD_TST_ENABLE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_ENABLE__SIZE
CYFLD_TST_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_TST_DDFT_CTRL
CYREG_TST_DDFT_CTRL EQU 0x40030008
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_DFT_SEL0__OFFSET
CYFLD_TST_DFT_SEL0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_DFT_SEL0__SIZE
CYFLD_TST_DFT_SEL0__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_DFT_SEL1__OFFSET
CYFLD_TST_DFT_SEL1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_DFT_SEL1__SIZE
CYFLD_TST_DFT_SEL1__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_TST_MODE
CYREG_TST_MODE EQU 0x40030014
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_SWD_CONNECTED__OFFSET
CYFLD_TST_SWD_CONNECTED__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_SWD_CONNECTED__SIZE
CYFLD_TST_SWD_CONNECTED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_POR_BYPASS__OFFSET
CYFLD_TST_POR_BYPASS__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_POR_BYPASS__SIZE
CYFLD_TST_POR_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_TEST_MODE__OFFSET
CYFLD_TST_TEST_MODE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_TEST_MODE__SIZE
CYFLD_TST_TEST_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_TST_TRIM_CNTR1
CYREG_TST_TRIM_CNTR1 EQU 0x40030018
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_COUNTER__OFFSET
CYFLD_TST_COUNTER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_COUNTER__SIZE
CYFLD_TST_COUNTER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_COUNTER_DONE__OFFSET
CYFLD_TST_COUNTER_DONE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_TST_COUNTER_DONE__SIZE
CYFLD_TST_COUNTER_DONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_TST_TRIM_CNTR2
CYREG_TST_TRIM_CNTR2 EQU 0x4003001c
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_BASE
CYDEV_GPIO_BASE EQU 0x40040000
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_SIZE
CYDEV_GPIO_SIZE EQU 0x00004000
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT0_BASE
CYDEV_GPIO_PRT0_BASE EQU 0x40040000
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT0_SIZE
CYDEV_GPIO_PRT0_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT0_DR
CYREG_GPIO_PRT0_DR EQU 0x40040000
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA0__OFFSET
CYFLD_GPIO_PRT_DATA0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA0__SIZE
CYFLD_GPIO_PRT_DATA0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA1__OFFSET
CYFLD_GPIO_PRT_DATA1__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA1__SIZE
CYFLD_GPIO_PRT_DATA1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA2__OFFSET
CYFLD_GPIO_PRT_DATA2__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA2__SIZE
CYFLD_GPIO_PRT_DATA2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA3__OFFSET
CYFLD_GPIO_PRT_DATA3__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA3__SIZE
CYFLD_GPIO_PRT_DATA3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA4__OFFSET
CYFLD_GPIO_PRT_DATA4__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA4__SIZE
CYFLD_GPIO_PRT_DATA4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA5__OFFSET
CYFLD_GPIO_PRT_DATA5__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA5__SIZE
CYFLD_GPIO_PRT_DATA5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA6__OFFSET
CYFLD_GPIO_PRT_DATA6__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA6__SIZE
CYFLD_GPIO_PRT_DATA6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA7__OFFSET
CYFLD_GPIO_PRT_DATA7__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA7__SIZE
CYFLD_GPIO_PRT_DATA7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT0_PS
CYREG_GPIO_PRT0_PS EQU 0x40040004
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_FLT_DATA__OFFSET
CYFLD_GPIO_PRT_FLT_DATA__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_FLT_DATA__SIZE
CYFLD_GPIO_PRT_FLT_DATA__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT0_PC
CYREG_GPIO_PRT0_PC EQU 0x40040008
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM0__OFFSET
CYFLD_GPIO_PRT_DM0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM0__SIZE
CYFLD_GPIO_PRT_DM0__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_DM0_OFF
CYVAL_GPIO_PRT_DM0_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_DM0_INPUT
CYVAL_GPIO_PRT_DM0_INPUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_DM0_0_PU
CYVAL_GPIO_PRT_DM0_0_PU EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_DM0_PD_1
CYVAL_GPIO_PRT_DM0_PD_1 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_DM0_0_Z
CYVAL_GPIO_PRT_DM0_0_Z EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_DM0_Z_1
CYVAL_GPIO_PRT_DM0_Z_1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_DM0_0_1
CYVAL_GPIO_PRT_DM0_0_1 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_DM0_PD_PU
CYVAL_GPIO_PRT_DM0_PD_PU EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM1__OFFSET
CYFLD_GPIO_PRT_DM1__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM1__SIZE
CYFLD_GPIO_PRT_DM1__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM2__OFFSET
CYFLD_GPIO_PRT_DM2__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM2__SIZE
CYFLD_GPIO_PRT_DM2__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM3__OFFSET
CYFLD_GPIO_PRT_DM3__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM3__SIZE
CYFLD_GPIO_PRT_DM3__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM4__OFFSET
CYFLD_GPIO_PRT_DM4__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM4__SIZE
CYFLD_GPIO_PRT_DM4__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM5__OFFSET
CYFLD_GPIO_PRT_DM5__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM5__SIZE
CYFLD_GPIO_PRT_DM5__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM6__OFFSET
CYFLD_GPIO_PRT_DM6__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM6__SIZE
CYFLD_GPIO_PRT_DM6__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM7__OFFSET
CYFLD_GPIO_PRT_DM7__OFFSET EQU 0x00000015
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DM7__SIZE
CYFLD_GPIO_PRT_DM7__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_VTRIP_SEL__OFFSET
CYFLD_GPIO_PRT_PORT_VTRIP_SEL__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_VTRIP_SEL__SIZE
CYFLD_GPIO_PRT_PORT_VTRIP_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_SLOW__OFFSET
CYFLD_GPIO_PRT_PORT_SLOW__OFFSET EQU 0x00000019
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_SLOW__SIZE
CYFLD_GPIO_PRT_PORT_SLOW__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_IB_MODE_SEL__OFFSET
CYFLD_GPIO_PRT_PORT_IB_MODE_SEL__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_IB_MODE_SEL__SIZE
CYFLD_GPIO_PRT_PORT_IB_MODE_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT0_INTR_CFG
CYREG_GPIO_PRT0_INTR_CFG EQU 0x4004000c
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE0_SEL__OFFSET
CYFLD_GPIO_PRT_EDGE0_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE0_SEL__SIZE
CYFLD_GPIO_PRT_EDGE0_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_EDGE0_SEL_DISABLE
CYVAL_GPIO_PRT_EDGE0_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_EDGE0_SEL_RISING
CYVAL_GPIO_PRT_EDGE0_SEL_RISING EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_EDGE0_SEL_FALLING
CYVAL_GPIO_PRT_EDGE0_SEL_FALLING EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_EDGE0_SEL_BOTH
CYVAL_GPIO_PRT_EDGE0_SEL_BOTH EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE1_SEL__OFFSET
CYFLD_GPIO_PRT_EDGE1_SEL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE1_SEL__SIZE
CYFLD_GPIO_PRT_EDGE1_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE2_SEL__OFFSET
CYFLD_GPIO_PRT_EDGE2_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE2_SEL__SIZE
CYFLD_GPIO_PRT_EDGE2_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE3_SEL__OFFSET
CYFLD_GPIO_PRT_EDGE3_SEL__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE3_SEL__SIZE
CYFLD_GPIO_PRT_EDGE3_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE4_SEL__OFFSET
CYFLD_GPIO_PRT_EDGE4_SEL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE4_SEL__SIZE
CYFLD_GPIO_PRT_EDGE4_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE5_SEL__OFFSET
CYFLD_GPIO_PRT_EDGE5_SEL__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE5_SEL__SIZE
CYFLD_GPIO_PRT_EDGE5_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE6_SEL__OFFSET
CYFLD_GPIO_PRT_EDGE6_SEL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE6_SEL__SIZE
CYFLD_GPIO_PRT_EDGE6_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE7_SEL__OFFSET
CYFLD_GPIO_PRT_EDGE7_SEL__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_EDGE7_SEL__SIZE
CYFLD_GPIO_PRT_EDGE7_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_FLT_EDGE_SEL__OFFSET
CYFLD_GPIO_PRT_FLT_EDGE_SEL__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_FLT_EDGE_SEL__SIZE
CYFLD_GPIO_PRT_FLT_EDGE_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_FLT_EDGE_SEL_DISABLE
CYVAL_GPIO_PRT_FLT_EDGE_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_FLT_EDGE_SEL_RISING
CYVAL_GPIO_PRT_FLT_EDGE_SEL_RISING EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_FLT_EDGE_SEL_FALLING
CYVAL_GPIO_PRT_FLT_EDGE_SEL_FALLING EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_FLT_EDGE_SEL_BOTH
CYVAL_GPIO_PRT_FLT_EDGE_SEL_BOTH EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_FLT_SEL__OFFSET
CYFLD_GPIO_PRT_FLT_SEL__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_FLT_SEL__SIZE
CYFLD_GPIO_PRT_FLT_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT0_INTR
CYREG_GPIO_PRT0_INTR EQU 0x40040010
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA0__OFFSET
CYFLD_GPIO_PRT_PS_DATA0__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA0__SIZE
CYFLD_GPIO_PRT_PS_DATA0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA1__OFFSET
CYFLD_GPIO_PRT_PS_DATA1__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA1__SIZE
CYFLD_GPIO_PRT_PS_DATA1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA2__OFFSET
CYFLD_GPIO_PRT_PS_DATA2__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA2__SIZE
CYFLD_GPIO_PRT_PS_DATA2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA3__OFFSET
CYFLD_GPIO_PRT_PS_DATA3__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA3__SIZE
CYFLD_GPIO_PRT_PS_DATA3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA4__OFFSET
CYFLD_GPIO_PRT_PS_DATA4__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA4__SIZE
CYFLD_GPIO_PRT_PS_DATA4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA5__OFFSET
CYFLD_GPIO_PRT_PS_DATA5__OFFSET EQU 0x00000015
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA5__SIZE
CYFLD_GPIO_PRT_PS_DATA5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA6__OFFSET
CYFLD_GPIO_PRT_PS_DATA6__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA6__SIZE
CYFLD_GPIO_PRT_PS_DATA6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA7__OFFSET
CYFLD_GPIO_PRT_PS_DATA7__OFFSET EQU 0x00000017
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_DATA7__SIZE
CYFLD_GPIO_PRT_PS_DATA7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_FLT_DATA__OFFSET
CYFLD_GPIO_PRT_PS_FLT_DATA__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PS_FLT_DATA__SIZE
CYFLD_GPIO_PRT_PS_FLT_DATA__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT0_PC2
CYREG_GPIO_PRT0_PC2 EQU 0x40040018
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS0__OFFSET
CYFLD_GPIO_PRT_INP_DIS0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS0__SIZE
CYFLD_GPIO_PRT_INP_DIS0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS1__OFFSET
CYFLD_GPIO_PRT_INP_DIS1__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS1__SIZE
CYFLD_GPIO_PRT_INP_DIS1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS2__OFFSET
CYFLD_GPIO_PRT_INP_DIS2__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS2__SIZE
CYFLD_GPIO_PRT_INP_DIS2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS3__OFFSET
CYFLD_GPIO_PRT_INP_DIS3__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS3__SIZE
CYFLD_GPIO_PRT_INP_DIS3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS4__OFFSET
CYFLD_GPIO_PRT_INP_DIS4__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS4__SIZE
CYFLD_GPIO_PRT_INP_DIS4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS5__OFFSET
CYFLD_GPIO_PRT_INP_DIS5__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS5__SIZE
CYFLD_GPIO_PRT_INP_DIS5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS6__OFFSET
CYFLD_GPIO_PRT_INP_DIS6__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS6__SIZE
CYFLD_GPIO_PRT_INP_DIS6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS7__OFFSET
CYFLD_GPIO_PRT_INP_DIS7__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_INP_DIS7__SIZE
CYFLD_GPIO_PRT_INP_DIS7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT0_DR_SET
CYREG_GPIO_PRT0_DR_SET EQU 0x40040040
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA__OFFSET
CYFLD_GPIO_PRT_DATA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_DATA__SIZE
CYFLD_GPIO_PRT_DATA__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT0_DR_CLR
CYREG_GPIO_PRT0_DR_CLR EQU 0x40040044
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT0_DR_INV
CYREG_GPIO_PRT0_DR_INV EQU 0x40040048
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT1_BASE
CYDEV_GPIO_PRT1_BASE EQU 0x40040100
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT1_SIZE
CYDEV_GPIO_PRT1_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT1_DR
CYREG_GPIO_PRT1_DR EQU 0x40040100
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT1_PS
CYREG_GPIO_PRT1_PS EQU 0x40040104
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT1_PC
CYREG_GPIO_PRT1_PC EQU 0x40040108
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT1_INTR_CFG
CYREG_GPIO_PRT1_INTR_CFG EQU 0x4004010c
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT1_INTR
CYREG_GPIO_PRT1_INTR EQU 0x40040110
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT1_PC2
CYREG_GPIO_PRT1_PC2 EQU 0x40040118
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT1_DR_SET
CYREG_GPIO_PRT1_DR_SET EQU 0x40040140
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT1_DR_CLR
CYREG_GPIO_PRT1_DR_CLR EQU 0x40040144
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT1_DR_INV
CYREG_GPIO_PRT1_DR_INV EQU 0x40040148
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT2_BASE
CYDEV_GPIO_PRT2_BASE EQU 0x40040200
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT2_SIZE
CYDEV_GPIO_PRT2_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT2_DR
CYREG_GPIO_PRT2_DR EQU 0x40040200
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT2_PS
CYREG_GPIO_PRT2_PS EQU 0x40040204
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT2_PC
CYREG_GPIO_PRT2_PC EQU 0x40040208
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT2_INTR_CFG
CYREG_GPIO_PRT2_INTR_CFG EQU 0x4004020c
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT2_INTR
CYREG_GPIO_PRT2_INTR EQU 0x40040210
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT2_PC2
CYREG_GPIO_PRT2_PC2 EQU 0x40040218
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT2_DR_SET
CYREG_GPIO_PRT2_DR_SET EQU 0x40040240
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT2_DR_CLR
CYREG_GPIO_PRT2_DR_CLR EQU 0x40040244
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT2_DR_INV
CYREG_GPIO_PRT2_DR_INV EQU 0x40040248
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT3_BASE
CYDEV_GPIO_PRT3_BASE EQU 0x40040300
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT3_SIZE
CYDEV_GPIO_PRT3_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT3_DR
CYREG_GPIO_PRT3_DR EQU 0x40040300
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT3_PS
CYREG_GPIO_PRT3_PS EQU 0x40040304
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT3_PC
CYREG_GPIO_PRT3_PC EQU 0x40040308
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT3_INTR_CFG
CYREG_GPIO_PRT3_INTR_CFG EQU 0x4004030c
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT3_INTR
CYREG_GPIO_PRT3_INTR EQU 0x40040310
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT3_PC2
CYREG_GPIO_PRT3_PC2 EQU 0x40040318
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT3_DR_SET
CYREG_GPIO_PRT3_DR_SET EQU 0x40040340
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT3_DR_CLR
CYREG_GPIO_PRT3_DR_CLR EQU 0x40040344
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT3_DR_INV
CYREG_GPIO_PRT3_DR_INV EQU 0x40040348
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT4_BASE
CYDEV_GPIO_PRT4_BASE EQU 0x40040400
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT4_SIZE
CYDEV_GPIO_PRT4_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT4_DR
CYREG_GPIO_PRT4_DR EQU 0x40040400
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT4_PS
CYREG_GPIO_PRT4_PS EQU 0x40040404
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT4_PC
CYREG_GPIO_PRT4_PC EQU 0x40040408
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT4_INTR_CFG
CYREG_GPIO_PRT4_INTR_CFG EQU 0x4004040c
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT4_INTR
CYREG_GPIO_PRT4_INTR EQU 0x40040410
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT4_PC2
CYREG_GPIO_PRT4_PC2 EQU 0x40040418
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT4_DR_SET
CYREG_GPIO_PRT4_DR_SET EQU 0x40040440
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT4_DR_CLR
CYREG_GPIO_PRT4_DR_CLR EQU 0x40040444
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT4_DR_INV
CYREG_GPIO_PRT4_DR_INV EQU 0x40040448
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT5_BASE
CYDEV_GPIO_PRT5_BASE EQU 0x40040500
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT5_SIZE
CYDEV_GPIO_PRT5_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT5_DR
CYREG_GPIO_PRT5_DR EQU 0x40040500
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT5_PS
CYREG_GPIO_PRT5_PS EQU 0x40040504
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT5_PC
CYREG_GPIO_PRT5_PC EQU 0x40040508
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_HYST_TRIM__OFFSET
CYFLD_GPIO_PRT_PORT_HYST_TRIM__OFFSET EQU 0x0000001b
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_HYST_TRIM__SIZE
CYFLD_GPIO_PRT_PORT_HYST_TRIM__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_SLEW_CTL__OFFSET
CYFLD_GPIO_PRT_PORT_SLEW_CTL__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PRT_PORT_SLEW_CTL__SIZE
CYFLD_GPIO_PRT_PORT_SLEW_CTL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_0
CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_1
CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_2
CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_3
CYVAL_GPIO_PRT_PORT_SLEW_CTL_PORT_SLEW_CTL_3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT5_INTR_CFG
CYREG_GPIO_PRT5_INTR_CFG EQU 0x4004050c
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT5_INTR
CYREG_GPIO_PRT5_INTR EQU 0x40040510
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT5_PC2
CYREG_GPIO_PRT5_PC2 EQU 0x40040518
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT5_DR_SET
CYREG_GPIO_PRT5_DR_SET EQU 0x40040540
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT5_DR_CLR
CYREG_GPIO_PRT5_DR_CLR EQU 0x40040544
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT5_DR_INV
CYREG_GPIO_PRT5_DR_INV EQU 0x40040548
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT6_BASE
CYDEV_GPIO_PRT6_BASE EQU 0x40040600
    ENDIF
    IF :LNOT::DEF:CYDEV_GPIO_PRT6_SIZE
CYDEV_GPIO_PRT6_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT6_DR
CYREG_GPIO_PRT6_DR EQU 0x40040600
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT6_PS
CYREG_GPIO_PRT6_PS EQU 0x40040604
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT6_PC
CYREG_GPIO_PRT6_PC EQU 0x40040608
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT6_INTR_CFG
CYREG_GPIO_PRT6_INTR_CFG EQU 0x4004060c
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT6_INTR
CYREG_GPIO_PRT6_INTR EQU 0x40040610
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT6_PC2
CYREG_GPIO_PRT6_PC2 EQU 0x40040618
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT6_DR_SET
CYREG_GPIO_PRT6_DR_SET EQU 0x40040640
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT6_DR_CLR
CYREG_GPIO_PRT6_DR_CLR EQU 0x40040644
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_PRT6_DR_INV
CYREG_GPIO_PRT6_DR_INV EQU 0x40040648
    ENDIF
    IF :LNOT::DEF:CYREG_GPIO_INTR_CAUSE
CYREG_GPIO_INTR_CAUSE EQU 0x40041000
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PORT_INT__OFFSET
CYFLD_GPIO_PORT_INT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_GPIO_PORT_INT__SIZE
CYFLD_GPIO_PORT_INT__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_CONTROL
CYREG_PWR_CONTROL EQU 0x400b0000
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_MODE__OFFSET
CYFLD__POWER_MODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_MODE__SIZE
CYFLD__POWER_MODE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__POWER_MODE_RESET
CYVAL__POWER_MODE_RESET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__POWER_MODE_ACTIVE
CYVAL__POWER_MODE_ACTIVE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__POWER_MODE_SLEEP
CYVAL__POWER_MODE_SLEEP EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__POWER_MODE_DEEP_SLEEP
CYVAL__POWER_MODE_DEEP_SLEEP EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__POWER_MODE_HIBERNATE
CYVAL__POWER_MODE_HIBERNATE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__DEBUG_SESSION__OFFSET
CYFLD__DEBUG_SESSION__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__DEBUG_SESSION__SIZE
CYFLD__DEBUG_SESSION__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__DEBUG_SESSION_NO_SESSION
CYVAL__DEBUG_SESSION_NO_SESSION EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__DEBUG_SESSION_SESSION_ACTIVE
CYVAL__DEBUG_SESSION_SESSION_ACTIVE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__LPM_READY__OFFSET
CYFLD__LPM_READY__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD__LPM_READY__SIZE
CYFLD__LPM_READY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__EXT_VCCD__OFFSET
CYFLD__EXT_VCCD__OFFSET EQU 0x00000017
    ENDIF
    IF :LNOT::DEF:CYFLD__EXT_VCCD__SIZE
CYFLD__EXT_VCCD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__HVMON_ENABLE__OFFSET
CYFLD__HVMON_ENABLE__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD__HVMON_ENABLE__SIZE
CYFLD__HVMON_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__HVMON_RELOAD__OFFSET
CYFLD__HVMON_RELOAD__OFFSET EQU 0x00000019
    ENDIF
    IF :LNOT::DEF:CYFLD__HVMON_RELOAD__SIZE
CYFLD__HVMON_RELOAD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__FIMO_DISABLE__OFFSET
CYFLD__FIMO_DISABLE__OFFSET EQU 0x0000001b
    ENDIF
    IF :LNOT::DEF:CYFLD__FIMO_DISABLE__SIZE
CYFLD__FIMO_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__HIBERNATE_DISABLE__OFFSET
CYFLD__HIBERNATE_DISABLE__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD__HIBERNATE_DISABLE__SIZE
CYFLD__HIBERNATE_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_SHORT__OFFSET
CYFLD__LFCLK_SHORT__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_SHORT__SIZE
CYFLD__LFCLK_SHORT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__HIBERNATE__OFFSET
CYFLD__HIBERNATE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD__HIBERNATE__SIZE
CYFLD__HIBERNATE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__HIBERNATE_DEEP_SLEEP
CYVAL__HIBERNATE_DEEP_SLEEP EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__HIBERNATE_HIBERNATE
CYVAL__HIBERNATE_HIBERNATE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_INTR
CYREG_PWR_INTR EQU 0x400b0004
    ENDIF
    IF :LNOT::DEF:CYFLD__LVD__OFFSET
CYFLD__LVD__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__LVD__SIZE
CYFLD__LVD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_INTR_MASK
CYREG_PWR_INTR_MASK EQU 0x400b0008
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_KEY_DELAY
CYREG_PWR_KEY_DELAY EQU 0x400b000c
    ENDIF
    IF :LNOT::DEF:CYFLD__WAKEUP_HOLDOFF__OFFSET
CYFLD__WAKEUP_HOLDOFF__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__WAKEUP_HOLDOFF__SIZE
CYFLD__WAKEUP_HOLDOFF__SIZE EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_PWRSYS_CONFIG
CYREG_PWR_PWRSYS_CONFIG EQU 0x400b0010
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TEST_EN__OFFSET
CYFLD__HIB_TEST_EN__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TEST_EN__SIZE
CYFLD__HIB_TEST_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TEST_REP__OFFSET
CYFLD__HIB_TEST_REP__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TEST_REP__SIZE
CYFLD__HIB_TEST_REP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_BG_CONFIG
CYREG_PWR_BG_CONFIG EQU 0x400b0014
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_EN__OFFSET
CYFLD__BG_DFT_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_EN__SIZE
CYFLD__BG_DFT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_VREF_SEL__OFFSET
CYFLD__BG_DFT_VREF_SEL__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_VREF_SEL__SIZE
CYFLD__BG_DFT_VREF_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_CORE_SEL__OFFSET
CYFLD__BG_DFT_CORE_SEL__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_CORE_SEL__SIZE
CYFLD__BG_DFT_CORE_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_ICORE_SEL__OFFSET
CYFLD__BG_DFT_ICORE_SEL__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_ICORE_SEL__SIZE
CYFLD__BG_DFT_ICORE_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_VCORE_SEL__OFFSET
CYFLD__BG_DFT_VCORE_SEL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__BG_DFT_VCORE_SEL__SIZE
CYFLD__BG_DFT_VCORE_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__VREF_EN__OFFSET
CYFLD__VREF_EN__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__VREF_EN__SIZE
CYFLD__VREF_EN__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_VMON_CONFIG
CYREG_PWR_VMON_CONFIG EQU 0x400b0018
    ENDIF
    IF :LNOT::DEF:CYFLD__LVD_EN__OFFSET
CYFLD__LVD_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__LVD_EN__SIZE
CYFLD__LVD_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__LVD_SEL__OFFSET
CYFLD__LVD_SEL__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__LVD_SEL__SIZE
CYFLD__LVD_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__VMON_DDFT_SEL__OFFSET
CYFLD__VMON_DDFT_SEL__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD__VMON_DDFT_SEL__SIZE
CYFLD__VMON_DDFT_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__VMON_ADFT_SEL__OFFSET
CYFLD__VMON_ADFT_SEL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__VMON_ADFT_SEL__SIZE
CYFLD__VMON_ADFT_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_DFT_SELECT
CYREG_PWR_DFT_SELECT EQU 0x400b001c
    ENDIF
    IF :LNOT::DEF:CYFLD__TVMON1_SEL__OFFSET
CYFLD__TVMON1_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__TVMON1_SEL__SIZE
CYFLD__TVMON1_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__TVMON2_SEL__OFFSET
CYFLD__TVMON2_SEL__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__TVMON2_SEL__SIZE
CYFLD__TVMON2_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__BYPASS__OFFSET
CYFLD__BYPASS__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD__BYPASS__SIZE
CYFLD__BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__ACTIVE_EN__OFFSET
CYFLD__ACTIVE_EN__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD__ACTIVE_EN__SIZE
CYFLD__ACTIVE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__ACTIVE_INRUSH_DIS__OFFSET
CYFLD__ACTIVE_INRUSH_DIS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__ACTIVE_INRUSH_DIS__SIZE
CYFLD__ACTIVE_INRUSH_DIS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__LPCOMP_DIS__OFFSET
CYFLD__LPCOMP_DIS__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD__LPCOMP_DIS__SIZE
CYFLD__LPCOMP_DIS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BLEED_EN__OFFSET
CYFLD__BLEED_EN__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD__BLEED_EN__SIZE
CYFLD__BLEED_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__IPOR_EN__OFFSET
CYFLD__IPOR_EN__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD__IPOR_EN__SIZE
CYFLD__IPOR_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_UP_RAW_BYP__OFFSET
CYFLD__POWER_UP_RAW_BYP__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_UP_RAW_BYP__SIZE
CYFLD__POWER_UP_RAW_BYP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_UP_RAW_CTL__OFFSET
CYFLD__POWER_UP_RAW_CTL__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_UP_RAW_CTL__SIZE
CYFLD__POWER_UP_RAW_CTL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__DEEPSLEEP_EN__OFFSET
CYFLD__DEEPSLEEP_EN__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD__DEEPSLEEP_EN__SIZE
CYFLD__DEEPSLEEP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__RSVD_BYPASS__OFFSET
CYFLD__RSVD_BYPASS__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD__RSVD_BYPASS__SIZE
CYFLD__RSVD_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__NWELL_OPEN__OFFSET
CYFLD__NWELL_OPEN__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__NWELL_OPEN__SIZE
CYFLD__NWELL_OPEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__HIBERNATE_OPEN__OFFSET
CYFLD__HIBERNATE_OPEN__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD__HIBERNATE_OPEN__SIZE
CYFLD__HIBERNATE_OPEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__DEEPSLEEP_OPEN__OFFSET
CYFLD__DEEPSLEEP_OPEN__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD__DEEPSLEEP_OPEN__SIZE
CYFLD__DEEPSLEEP_OPEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__QUIET_OPEN__OFFSET
CYFLD__QUIET_OPEN__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD__QUIET_OPEN__SIZE
CYFLD__QUIET_OPEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_OPEN__OFFSET
CYFLD__LFCLK_OPEN__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_OPEN__SIZE
CYFLD__LFCLK_OPEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__QUIET_EN__OFFSET
CYFLD__QUIET_EN__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD__QUIET_EN__SIZE
CYFLD__QUIET_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BREF_EN__OFFSET
CYFLD__BREF_EN__OFFSET EQU 0x00000017
    ENDIF
    IF :LNOT::DEF:CYFLD__BREF_EN__SIZE
CYFLD__BREF_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BREF_OUTEN__OFFSET
CYFLD__BREF_OUTEN__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD__BREF_OUTEN__SIZE
CYFLD__BREF_OUTEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BREF_REFSW__OFFSET
CYFLD__BREF_REFSW__OFFSET EQU 0x00000019
    ENDIF
    IF :LNOT::DEF:CYFLD__BREF_REFSW__SIZE
CYFLD__BREF_REFSW__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BREF_TESTMODE__OFFSET
CYFLD__BREF_TESTMODE__OFFSET EQU 0x0000001a
    ENDIF
    IF :LNOT::DEF:CYFLD__BREF_TESTMODE__SIZE
CYFLD__BREF_TESTMODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__NWELL_DIS__OFFSET
CYFLD__NWELL_DIS__OFFSET EQU 0x0000001b
    ENDIF
    IF :LNOT::DEF:CYFLD__NWELL_DIS__SIZE
CYFLD__NWELL_DIS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__HVMON_DFT_OVR__OFFSET
CYFLD__HVMON_DFT_OVR__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD__HVMON_DFT_OVR__SIZE
CYFLD__HVMON_DFT_OVR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__IMO_REFGEN_DIS__OFFSET
CYFLD__IMO_REFGEN_DIS__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD__IMO_REFGEN_DIS__SIZE
CYFLD__IMO_REFGEN_DIS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_UP_ACTIVE__OFFSET
CYFLD__POWER_UP_ACTIVE__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_UP_ACTIVE__SIZE
CYFLD__POWER_UP_ACTIVE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_UP_HIBDPSLP__OFFSET
CYFLD__POWER_UP_HIBDPSLP__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD__POWER_UP_HIBDPSLP__SIZE
CYFLD__POWER_UP_HIBDPSLP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_DDFT_SELECT
CYREG_PWR_DDFT_SELECT EQU 0x400b0020
    ENDIF
    IF :LNOT::DEF:CYFLD__DDFT1_SEL__OFFSET
CYFLD__DDFT1_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__DDFT1_SEL__SIZE
CYFLD__DDFT1_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__DDFT2_SEL__OFFSET
CYFLD__DDFT2_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__DDFT2_SEL__SIZE
CYFLD__DDFT2_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_DFT_KEY
CYREG_PWR_DFT_KEY EQU 0x400b0024
    ENDIF
    IF :LNOT::DEF:CYFLD__KEY16__OFFSET
CYFLD__KEY16__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__KEY16__SIZE
CYFLD__KEY16__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__HBOD_OFF_AWAKE__OFFSET
CYFLD__HBOD_OFF_AWAKE__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__HBOD_OFF_AWAKE__SIZE
CYFLD__HBOD_OFF_AWAKE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BODS_OFF__OFFSET
CYFLD__BODS_OFF__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD__BODS_OFF__SIZE
CYFLD__BODS_OFF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_MODE__OFFSET
CYFLD__DFT_MODE__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_MODE__SIZE
CYFLD__DFT_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__IO_DISABLE_BYPASS__OFFSET
CYFLD__IO_DISABLE_BYPASS__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD__IO_DISABLE_BYPASS__SIZE
CYFLD__IO_DISABLE_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__VMON_PD__OFFSET
CYFLD__VMON_PD__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD__VMON_PD__SIZE
CYFLD__VMON_PD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_BOD_KEY
CYREG_PWR_BOD_KEY EQU 0x400b0028
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_STOP
CYREG_PWR_STOP EQU 0x400b002c
    ENDIF
    IF :LNOT::DEF:CYFLD__TOKEN__OFFSET
CYFLD__TOKEN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__TOKEN__SIZE
CYFLD__TOKEN__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__UNLOCK__OFFSET
CYFLD__UNLOCK__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__UNLOCK__SIZE
CYFLD__UNLOCK__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__POLARITY__OFFSET
CYFLD__POLARITY__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__POLARITY__SIZE
CYFLD__POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__FREEZE__OFFSET
CYFLD__FREEZE__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD__FREEZE__SIZE
CYFLD__FREEZE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__STOP__OFFSET
CYFLD__STOP__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD__STOP__SIZE
CYFLD__STOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_SELECT
CYREG_CLK_SELECT EQU 0x400b0100
    ENDIF
    IF :LNOT::DEF:CYFLD__DIRECT_SEL__OFFSET
CYFLD__DIRECT_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__DIRECT_SEL__SIZE
CYFLD__DIRECT_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__DIRECT_SEL_IMO
CYVAL__DIRECT_SEL_IMO EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__DIRECT_SEL_EXTCLK
CYVAL__DIRECT_SEL_EXTCLK EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__DIRECT_SEL_ECO
CYVAL__DIRECT_SEL_ECO EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DIRECT_SEL_DSI0
CYVAL__DIRECT_SEL_DSI0 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__DIRECT_SEL_DSI1
CYVAL__DIRECT_SEL_DSI1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL__DIRECT_SEL_DSI2
CYVAL__DIRECT_SEL_DSI2 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL__DIRECT_SEL_DSI3
CYVAL__DIRECT_SEL_DSI3 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD__DBL_SEL__OFFSET
CYFLD__DBL_SEL__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__DBL_SEL__SIZE
CYFLD__DBL_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__DBL_SEL_IMO
CYVAL__DBL_SEL_IMO EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__DBL_SEL_EXTCLK
CYVAL__DBL_SEL_EXTCLK EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__DBL_SEL_ECO
CYVAL__DBL_SEL_ECO EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DBL_SEL_DSI0
CYVAL__DBL_SEL_DSI0 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__DBL_SEL_DSI1
CYVAL__DBL_SEL_DSI1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL__DBL_SEL_DSI2
CYVAL__DBL_SEL_DSI2 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL__DBL_SEL_DSI3
CYVAL__DBL_SEL_DSI3 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD__PLL_SEL__OFFSET
CYFLD__PLL_SEL__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD__PLL_SEL__SIZE
CYFLD__PLL_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__PLL_SEL_IMO
CYVAL__PLL_SEL_IMO EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__PLL_SEL_EXTCLK
CYVAL__PLL_SEL_EXTCLK EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__PLL_SEL_ECO
CYVAL__PLL_SEL_ECO EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__PLL_SEL_DPLL
CYVAL__PLL_SEL_DPLL EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__PLL_SEL_DSI0
CYVAL__PLL_SEL_DSI0 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__PLL_SEL_DSI1
CYVAL__PLL_SEL_DSI1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL__PLL_SEL_DSI2
CYVAL__PLL_SEL_DSI2 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL__PLL_SEL_DSI3
CYVAL__PLL_SEL_DSI3 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD__DPLLIN_SEL__OFFSET
CYFLD__DPLLIN_SEL__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD__DPLLIN_SEL__SIZE
CYFLD__DPLLIN_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLIN_SEL_IMO
CYVAL__DPLLIN_SEL_IMO EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLIN_SEL_EXTCLK
CYVAL__DPLLIN_SEL_EXTCLK EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLIN_SEL_ECO
CYVAL__DPLLIN_SEL_ECO EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLIN_SEL_DSI0
CYVAL__DPLLIN_SEL_DSI0 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLIN_SEL_DSI1
CYVAL__DPLLIN_SEL_DSI1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLIN_SEL_DSI2
CYVAL__DPLLIN_SEL_DSI2 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLIN_SEL_DSI3
CYVAL__DPLLIN_SEL_DSI3 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD__DPLLREF_SEL__OFFSET
CYFLD__DPLLREF_SEL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD__DPLLREF_SEL__SIZE
CYFLD__DPLLREF_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLREF_SEL_DSI0
CYVAL__DPLLREF_SEL_DSI0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLREF_SEL_DSI1
CYVAL__DPLLREF_SEL_DSI1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLREF_SEL_DSI2
CYVAL__DPLLREF_SEL_DSI2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DPLLREF_SEL_DSI3
CYVAL__DPLLREF_SEL_DSI3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_LOCK__OFFSET
CYFLD__WDT_LOCK__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_LOCK__SIZE
CYFLD__WDT_LOCK__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_LOCK_NO_CHG
CYVAL__WDT_LOCK_NO_CHG EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_LOCK_CLR0
CYVAL__WDT_LOCK_CLR0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_LOCK_CLR1
CYVAL__WDT_LOCK_CLR1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_LOCK_SET01
CYVAL__WDT_LOCK_SET01 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__HFCLK_SEL__OFFSET
CYFLD__HFCLK_SEL__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__HFCLK_SEL__SIZE
CYFLD__HFCLK_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__HFCLK_SEL_DIRECT_SEL
CYVAL__HFCLK_SEL_DIRECT_SEL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__HFCLK_SEL_DBL
CYVAL__HFCLK_SEL_DBL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__HFCLK_SEL_PLL
CYVAL__HFCLK_SEL_PLL EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__HALF_EN__OFFSET
CYFLD__HALF_EN__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD__HALF_EN__SIZE
CYFLD__HALF_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__SYSCLK_DIV__OFFSET
CYFLD__SYSCLK_DIV__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD__SYSCLK_DIV__SIZE
CYFLD__SYSCLK_DIV__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__SYSCLK_DIV_NO_DIV
CYVAL__SYSCLK_DIV_NO_DIV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_2
CYVAL__SYSCLK_DIV_DIV_BY_2 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_4
CYVAL__SYSCLK_DIV_DIV_BY_4 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_8
CYVAL__SYSCLK_DIV_DIV_BY_8 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_16
CYVAL__SYSCLK_DIV_DIV_BY_16 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_32
CYVAL__SYSCLK_DIV_DIV_BY_32 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_64
CYVAL__SYSCLK_DIV_DIV_BY_64 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL__SYSCLK_DIV_DIV_BY_128
CYVAL__SYSCLK_DIV_DIV_BY_128 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_ILO_CONFIG
CYREG_CLK_ILO_CONFIG EQU 0x400b0104
    ENDIF
    IF :LNOT::DEF:CYFLD__PD_MODE__OFFSET
CYFLD__PD_MODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__PD_MODE__SIZE
CYFLD__PD_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__PD_MODE_SLEEP
CYVAL__PD_MODE_SLEEP EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__PD_MODE_COMA
CYVAL__PD_MODE_COMA EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__TURBO__OFFSET
CYFLD__TURBO__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__TURBO__SIZE
CYFLD__TURBO__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__SATBIAS__OFFSET
CYFLD__SATBIAS__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__SATBIAS__SIZE
CYFLD__SATBIAS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__SATBIAS_SATURATED
CYVAL__SATBIAS_SATURATED EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__SATBIAS_SUBTHRESHOLD
CYVAL__SATBIAS_SUBTHRESHOLD EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__ENABLE__OFFSET
CYFLD__ENABLE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD__ENABLE__SIZE
CYFLD__ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_IMO_CONFIG
CYREG_CLK_IMO_CONFIG EQU 0x400b0108
    ENDIF
    IF :LNOT::DEF:CYFLD__FLASHPUMP_SEL__OFFSET
CYFLD__FLASHPUMP_SEL__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD__FLASHPUMP_SEL__SIZE
CYFLD__FLASHPUMP_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__FLASHPUMP_SEL_GND
CYVAL__FLASHPUMP_SEL_GND EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__FLASHPUMP_SEL_CLK36
CYVAL__FLASHPUMP_SEL_CLK36 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__EN_FASTBIAS__OFFSET
CYFLD__EN_FASTBIAS__OFFSET EQU 0x00000017
    ENDIF
    IF :LNOT::DEF:CYFLD__EN_FASTBIAS__SIZE
CYFLD__EN_FASTBIAS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__TEST_FASTBIAS__OFFSET
CYFLD__TEST_FASTBIAS__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD__TEST_FASTBIAS__SIZE
CYFLD__TEST_FASTBIAS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__PUMP_SEL__OFFSET
CYFLD__PUMP_SEL__OFFSET EQU 0x00000019
    ENDIF
    IF :LNOT::DEF:CYFLD__PUMP_SEL__SIZE
CYFLD__PUMP_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__PUMP_SEL_GND
CYVAL__PUMP_SEL_GND EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__PUMP_SEL_IMO
CYVAL__PUMP_SEL_IMO EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__PUMP_SEL_DBL
CYVAL__PUMP_SEL_DBL EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__PUMP_SEL_CLK36
CYVAL__PUMP_SEL_CLK36 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__PUMP_SEL_FF1
CYVAL__PUMP_SEL_FF1 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__TEST_USB_MODE__OFFSET
CYFLD__TEST_USB_MODE__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD__TEST_USB_MODE__SIZE
CYFLD__TEST_USB_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__EN_CLK36__OFFSET
CYFLD__EN_CLK36__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD__EN_CLK36__SIZE
CYFLD__EN_CLK36__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__EN_CLK2X__OFFSET
CYFLD__EN_CLK2X__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD__EN_CLK2X__SIZE
CYFLD__EN_CLK2X__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_IMO_SPREAD
CYREG_CLK_IMO_SPREAD EQU 0x400b010c
    ENDIF
    IF :LNOT::DEF:CYFLD__SS_VALUE__OFFSET
CYFLD__SS_VALUE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__SS_VALUE__SIZE
CYFLD__SS_VALUE__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD__SS_MAX__OFFSET
CYFLD__SS_MAX__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__SS_MAX__SIZE
CYFLD__SS_MAX__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD__SS_RANGE__OFFSET
CYFLD__SS_RANGE__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD__SS_RANGE__SIZE
CYFLD__SS_RANGE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__SS_RANGE_M1
CYVAL__SS_RANGE_M1 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__SS_RANGE_M2
CYVAL__SS_RANGE_M2 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__SS_RANGE_M4
CYVAL__SS_RANGE_M4 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__SS_MODE__OFFSET
CYFLD__SS_MODE__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD__SS_MODE__SIZE
CYFLD__SS_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__SS_MODE_OFF
CYVAL__SS_MODE_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__SS_MODE_TRIANGLE
CYVAL__SS_MODE_TRIANGLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__SS_MODE_LFSR
CYVAL__SS_MODE_LFSR EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__SS_MODE_DSI
CYVAL__SS_MODE_DSI EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_DFT_SELECT
CYREG_CLK_DFT_SELECT EQU 0x400b0110
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_SEL1__OFFSET
CYFLD__DFT_SEL1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_SEL1__SIZE
CYFLD__DFT_SEL1__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_NC
CYVAL__DFT_SEL1_NC EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_ILO
CYVAL__DFT_SEL1_ILO EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_WCO
CYVAL__DFT_SEL1_WCO EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_IMO
CYVAL__DFT_SEL1_IMO EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_ECO
CYVAL__DFT_SEL1_ECO EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_PLL
CYVAL__DFT_SEL1_PLL EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_DPLL_OUT
CYVAL__DFT_SEL1_DPLL_OUT EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_DPLL_REF
CYVAL__DFT_SEL1_DPLL_REF EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_DBL
CYVAL__DFT_SEL1_DBL EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_IMO2X
CYVAL__DFT_SEL1_IMO2X EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_IMO36
CYVAL__DFT_SEL1_IMO36 EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_HFCLK
CYVAL__DFT_SEL1_HFCLK EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_LFCLK
CYVAL__DFT_SEL1_LFCLK EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_SYSCLK
CYVAL__DFT_SEL1_SYSCLK EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_EXTCLK
CYVAL__DFT_SEL1_EXTCLK EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL1_HALFSYSCLK
CYVAL__DFT_SEL1_HALFSYSCLK EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_DIV1__OFFSET
CYFLD__DFT_DIV1__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_DIV1__SIZE
CYFLD__DFT_DIV1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_DIV1_NO_DIV
CYVAL__DFT_DIV1_NO_DIV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_DIV1_DIV_BY_2
CYVAL__DFT_DIV1_DIV_BY_2 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_DIV1_DIV_BY_4
CYVAL__DFT_DIV1_DIV_BY_4 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_DIV1_DIV_BY_8
CYVAL__DFT_DIV1_DIV_BY_8 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_SEL2__OFFSET
CYFLD__DFT_SEL2__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_SEL2__SIZE
CYFLD__DFT_SEL2__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_NC
CYVAL__DFT_SEL2_NC EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_ILO
CYVAL__DFT_SEL2_ILO EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_WCO
CYVAL__DFT_SEL2_WCO EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_IMO
CYVAL__DFT_SEL2_IMO EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_ECO
CYVAL__DFT_SEL2_ECO EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_PLL
CYVAL__DFT_SEL2_PLL EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_DPLL_OUT
CYVAL__DFT_SEL2_DPLL_OUT EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_DPLL_REF
CYVAL__DFT_SEL2_DPLL_REF EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_DBL
CYVAL__DFT_SEL2_DBL EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_IMO2X
CYVAL__DFT_SEL2_IMO2X EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_IMO36
CYVAL__DFT_SEL2_IMO36 EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_HFCLK
CYVAL__DFT_SEL2_HFCLK EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_LFCLK
CYVAL__DFT_SEL2_LFCLK EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_SYSCLK
CYVAL__DFT_SEL2_SYSCLK EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_EXTCLK
CYVAL__DFT_SEL2_EXTCLK EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_SEL2_HALFSYSCLK
CYVAL__DFT_SEL2_HALFSYSCLK EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_DIV2__OFFSET
CYFLD__DFT_DIV2__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD__DFT_DIV2__SIZE
CYFLD__DFT_DIV2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_DIV2_NO_DIV
CYVAL__DFT_DIV2_NO_DIV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_DIV2_DIV_BY_2
CYVAL__DFT_DIV2_DIV_BY_2 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_DIV2_DIV_BY_4
CYVAL__DFT_DIV2_DIV_BY_4 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__DFT_DIV2_DIV_BY_8
CYVAL__DFT_DIV2_DIV_BY_8 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_WDT_CTRLOW
CYREG_WDT_CTRLOW EQU 0x400b0200
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CTR0__OFFSET
CYFLD__WDT_CTR0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CTR0__SIZE
CYFLD__WDT_CTR0__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CTR1__OFFSET
CYFLD__WDT_CTR1__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CTR1__SIZE
CYFLD__WDT_CTR1__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_WDT_CTRHIGH
CYREG_WDT_CTRHIGH EQU 0x400b0204
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CTR2__OFFSET
CYFLD__WDT_CTR2__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CTR2__SIZE
CYFLD__WDT_CTR2__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_WDT_MATCH
CYREG_WDT_MATCH EQU 0x400b0208
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MATCH0__OFFSET
CYFLD__WDT_MATCH0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MATCH0__SIZE
CYFLD__WDT_MATCH0__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MATCH1__OFFSET
CYFLD__WDT_MATCH1__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MATCH1__SIZE
CYFLD__WDT_MATCH1__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_WDT_CONFIG
CYREG_WDT_CONFIG EQU 0x400b020c
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MODE0__OFFSET
CYFLD__WDT_MODE0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MODE0__SIZE
CYFLD__WDT_MODE0__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE0_NOTHING
CYVAL__WDT_MODE0_NOTHING EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE0_INT
CYVAL__WDT_MODE0_INT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE0_RESET
CYVAL__WDT_MODE0_RESET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE0_INT_THEN_RESET
CYVAL__WDT_MODE0_INT_THEN_RESET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CLEAR0__OFFSET
CYFLD__WDT_CLEAR0__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CLEAR0__SIZE
CYFLD__WDT_CLEAR0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CASCADE0_1__OFFSET
CYFLD__WDT_CASCADE0_1__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CASCADE0_1__SIZE
CYFLD__WDT_CASCADE0_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MODE1__OFFSET
CYFLD__WDT_MODE1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MODE1__SIZE
CYFLD__WDT_MODE1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE1_NOTHING
CYVAL__WDT_MODE1_NOTHING EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE1_INT
CYVAL__WDT_MODE1_INT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE1_RESET
CYVAL__WDT_MODE1_RESET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE1_INT_THEN_RESET
CYVAL__WDT_MODE1_INT_THEN_RESET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CLEAR1__OFFSET
CYFLD__WDT_CLEAR1__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CLEAR1__SIZE
CYFLD__WDT_CLEAR1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CASCADE1_2__OFFSET
CYFLD__WDT_CASCADE1_2__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_CASCADE1_2__SIZE
CYFLD__WDT_CASCADE1_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MODE2__OFFSET
CYFLD__WDT_MODE2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_MODE2__SIZE
CYFLD__WDT_MODE2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE2_NOTHING
CYVAL__WDT_MODE2_NOTHING EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL__WDT_MODE2_INT
CYVAL__WDT_MODE2_INT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_BITS2__OFFSET
CYFLD__WDT_BITS2__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_BITS2__SIZE
CYFLD__WDT_BITS2__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_SEL__OFFSET
CYFLD__LFCLK_SEL__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_SEL__SIZE
CYFLD__LFCLK_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_WDT_CONTROL
CYREG_WDT_CONTROL EQU 0x400b0210
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLE0__OFFSET
CYFLD__WDT_ENABLE0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLE0__SIZE
CYFLD__WDT_ENABLE0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLED0__OFFSET
CYFLD__WDT_ENABLED0__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLED0__SIZE
CYFLD__WDT_ENABLED0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_INT0__OFFSET
CYFLD__WDT_INT0__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_INT0__SIZE
CYFLD__WDT_INT0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_RESET0__OFFSET
CYFLD__WDT_RESET0__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_RESET0__SIZE
CYFLD__WDT_RESET0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLE1__OFFSET
CYFLD__WDT_ENABLE1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLE1__SIZE
CYFLD__WDT_ENABLE1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLED1__OFFSET
CYFLD__WDT_ENABLED1__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLED1__SIZE
CYFLD__WDT_ENABLED1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_INT1__OFFSET
CYFLD__WDT_INT1__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_INT1__SIZE
CYFLD__WDT_INT1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_RESET1__OFFSET
CYFLD__WDT_RESET1__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_RESET1__SIZE
CYFLD__WDT_RESET1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLE2__OFFSET
CYFLD__WDT_ENABLE2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLE2__SIZE
CYFLD__WDT_ENABLE2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLED2__OFFSET
CYFLD__WDT_ENABLED2__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_ENABLED2__SIZE
CYFLD__WDT_ENABLED2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_INT2__OFFSET
CYFLD__WDT_INT2__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_INT2__SIZE
CYFLD__WDT_INT2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_RESET2__OFFSET
CYFLD__WDT_RESET2__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD__WDT_RESET2__SIZE
CYFLD__WDT_RESET2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_RES_CAUSE
CYREG_RES_CAUSE EQU 0x400b0300
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_WDT__OFFSET
CYFLD__RESET_WDT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_WDT__SIZE
CYFLD__RESET_WDT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_DSBOD__OFFSET
CYFLD__RESET_DSBOD__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_DSBOD__SIZE
CYFLD__RESET_DSBOD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_LOCKUP__OFFSET
CYFLD__RESET_LOCKUP__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_LOCKUP__SIZE
CYFLD__RESET_LOCKUP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_PROT_FAULT__OFFSET
CYFLD__RESET_PROT_FAULT__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_PROT_FAULT__SIZE
CYFLD__RESET_PROT_FAULT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_SOFT__OFFSET
CYFLD__RESET_SOFT__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_SOFT__SIZE
CYFLD__RESET_SOFT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_HVBOD__OFFSET
CYFLD__RESET_HVBOD__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_HVBOD__SIZE
CYFLD__RESET_HVBOD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_PBOD__OFFSET
CYFLD__RESET_PBOD__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_PBOD__SIZE
CYFLD__RESET_PBOD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_XRES__OFFSET
CYFLD__RESET_XRES__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD__RESET_XRES__SIZE
CYFLD__RESET_XRES__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_PWRSYS_TRIM1
CYREG_PWR_PWRSYS_TRIM1 EQU 0x400bff00
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_BIAS_TRIM__OFFSET
CYFLD__HIB_BIAS_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_BIAS_TRIM__SIZE
CYFLD__HIB_BIAS_TRIM__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__BOD_TURBO_THRESH__OFFSET
CYFLD__BOD_TURBO_THRESH__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__BOD_TURBO_THRESH__SIZE
CYFLD__BOD_TURBO_THRESH__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__BOD_TRIM_TRIP__OFFSET
CYFLD__BOD_TRIM_TRIP__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__BOD_TRIM_TRIP__SIZE
CYFLD__BOD_TRIM_TRIP__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_PWRSYS_TRIM2
CYREG_PWR_PWRSYS_TRIM2 EQU 0x400bff04
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_TRIM_LOAD__OFFSET
CYFLD__LFCLK_TRIM_LOAD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_TRIM_LOAD__SIZE
CYFLD__LFCLK_TRIM_LOAD__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_TRIM_VOLTAGE__OFFSET
CYFLD__LFCLK_TRIM_VOLTAGE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__LFCLK_TRIM_VOLTAGE__SIZE
CYFLD__LFCLK_TRIM_VOLTAGE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__DPSLP_TRIM_LOAD__OFFSET
CYFLD__DPSLP_TRIM_LOAD__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__DPSLP_TRIM_LOAD__SIZE
CYFLD__DPSLP_TRIM_LOAD__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__DPSLP_TRIM_LEAKAGE__OFFSET
CYFLD__DPSLP_TRIM_LEAKAGE__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD__DPSLP_TRIM_LEAKAGE__SIZE
CYFLD__DPSLP_TRIM_LEAKAGE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__DPSLP_TRIM_VOLTAGE__OFFSET
CYFLD__DPSLP_TRIM_VOLTAGE__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD__DPSLP_TRIM_VOLTAGE__SIZE
CYFLD__DPSLP_TRIM_VOLTAGE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_PWRSYS_TRIM3
CYREG_PWR_PWRSYS_TRIM3 EQU 0x400bff08
    ENDIF
    IF :LNOT::DEF:CYFLD__NWELL_TRIM__OFFSET
CYFLD__NWELL_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__NWELL_TRIM__SIZE
CYFLD__NWELL_TRIM__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__QUIET_TRIM__OFFSET
CYFLD__QUIET_TRIM__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__QUIET_TRIM__SIZE
CYFLD__QUIET_TRIM__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_PWRSYS_TRIM4
CYREG_PWR_PWRSYS_TRIM4 EQU 0x400bff0c
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TRIM_NWELL__OFFSET
CYFLD__HIB_TRIM_NWELL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TRIM_NWELL__SIZE
CYFLD__HIB_TRIM_NWELL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TRIM_LEAKAGE__OFFSET
CYFLD__HIB_TRIM_LEAKAGE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TRIM_LEAKAGE__SIZE
CYFLD__HIB_TRIM_LEAKAGE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TRIM_VOLTAGE__OFFSET
CYFLD__HIB_TRIM_VOLTAGE__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TRIM_VOLTAGE__SIZE
CYFLD__HIB_TRIM_VOLTAGE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TRIM_REFERENCE__OFFSET
CYFLD__HIB_TRIM_REFERENCE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__HIB_TRIM_REFERENCE__SIZE
CYFLD__HIB_TRIM_REFERENCE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_BG_TRIM1
CYREG_PWR_BG_TRIM1 EQU 0x400bff10
    ENDIF
    IF :LNOT::DEF:CYFLD__INL_TRIM_MAIN__OFFSET
CYFLD__INL_TRIM_MAIN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__INL_TRIM_MAIN__SIZE
CYFLD__INL_TRIM_MAIN__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__INL_CROSS_MAIN__OFFSET
CYFLD__INL_CROSS_MAIN__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__INL_CROSS_MAIN__SIZE
CYFLD__INL_CROSS_MAIN__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_BG_TRIM2
CYREG_PWR_BG_TRIM2 EQU 0x400bff14
    ENDIF
    IF :LNOT::DEF:CYFLD__VCTAT_SLOPE__OFFSET
CYFLD__VCTAT_SLOPE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__VCTAT_SLOPE__SIZE
CYFLD__VCTAT_SLOPE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__VCTAT_VOLTAGE__OFFSET
CYFLD__VCTAT_VOLTAGE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__VCTAT_VOLTAGE__SIZE
CYFLD__VCTAT_VOLTAGE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD__VCTAT_ENABLE__OFFSET
CYFLD__VCTAT_ENABLE__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD__VCTAT_ENABLE__SIZE
CYFLD__VCTAT_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD__VCTAT_VOLTAGE_MSB__OFFSET
CYFLD__VCTAT_VOLTAGE_MSB__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD__VCTAT_VOLTAGE_MSB__SIZE
CYFLD__VCTAT_VOLTAGE_MSB__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_BG_TRIM3
CYREG_PWR_BG_TRIM3 EQU 0x400bff18
    ENDIF
    IF :LNOT::DEF:CYFLD__INL_TRIM_IMO__OFFSET
CYFLD__INL_TRIM_IMO__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__INL_TRIM_IMO__SIZE
CYFLD__INL_TRIM_IMO__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__INL_CROSS_IMO__OFFSET
CYFLD__INL_CROSS_IMO__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD__INL_CROSS_IMO__SIZE
CYFLD__INL_CROSS_IMO__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_BG_TRIM4
CYREG_PWR_BG_TRIM4 EQU 0x400bff1c
    ENDIF
    IF :LNOT::DEF:CYFLD__ABS_TRIM_IMO__OFFSET
CYFLD__ABS_TRIM_IMO__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__ABS_TRIM_IMO__SIZE
CYFLD__ABS_TRIM_IMO__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_BG_TRIM5
CYREG_PWR_BG_TRIM5 EQU 0x400bff20
    ENDIF
    IF :LNOT::DEF:CYFLD__TMPCO_TRIM_IMO__OFFSET
CYFLD__TMPCO_TRIM_IMO__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__TMPCO_TRIM_IMO__SIZE
CYFLD__TMPCO_TRIM_IMO__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_ILO_TRIM
CYREG_CLK_ILO_TRIM EQU 0x400bff24
    ENDIF
    IF :LNOT::DEF:CYFLD__TRIM__OFFSET
CYFLD__TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__TRIM__SIZE
CYFLD__TRIM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__COARSE_TRIM__OFFSET
CYFLD__COARSE_TRIM__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD__COARSE_TRIM__SIZE
CYFLD__COARSE_TRIM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_IMO_TRIM1
CYREG_CLK_IMO_TRIM1 EQU 0x400bff28
    ENDIF
    IF :LNOT::DEF:CYFLD__OFFSET__OFFSET
CYFLD__OFFSET__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__OFFSET__SIZE
CYFLD__OFFSET__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_IMO_TRIM2
CYREG_CLK_IMO_TRIM2 EQU 0x400bff2c
    ENDIF
    IF :LNOT::DEF:CYFLD__FREQ__OFFSET
CYFLD__FREQ__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__FREQ__SIZE
CYFLD__FREQ__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_IMO_TRIM3
CYREG_CLK_IMO_TRIM3 EQU 0x400bff30
    ENDIF
    IF :LNOT::DEF:CYFLD__TRIM_CLK36__OFFSET
CYFLD__TRIM_CLK36__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__TRIM_CLK36__SIZE
CYFLD__TRIM_CLK36__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_CLK_IMO_TRIM4
CYREG_CLK_IMO_TRIM4 EQU 0x400bff34
    ENDIF
    IF :LNOT::DEF:CYFLD__GAIN__OFFSET
CYFLD__GAIN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__GAIN__SIZE
CYFLD__GAIN__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD__FSOFFSET__OFFSET
CYFLD__FSOFFSET__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD__FSOFFSET__SIZE
CYFLD__FSOFFSET__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_PWR_RSVD_TRIM
CYREG_PWR_RSVD_TRIM EQU 0x400bff38
    ENDIF
    IF :LNOT::DEF:CYFLD__RSVD_TRIM__OFFSET
CYFLD__RSVD_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD__RSVD_TRIM__SIZE
CYFLD__RSVD_TRIM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_BASE
CYDEV_UDB_BASE EQU 0x400f0000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_SIZE
CYDEV_UDB_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_W8_BASE
CYDEV_UDB_W8_BASE EQU 0x400f0000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_W8_SIZE
CYDEV_UDB_W8_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A00
CYREG_UDB_W8_A00 EQU 0x400f0000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_A0__OFFSET
CYFLD_UDB_W8_A0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_A0__SIZE
CYFLD_UDB_W8_A0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A01
CYREG_UDB_W8_A01 EQU 0x400f0001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A02
CYREG_UDB_W8_A02 EQU 0x400f0002
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A03
CYREG_UDB_W8_A03 EQU 0x400f0003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A10
CYREG_UDB_W8_A10 EQU 0x400f0010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_A1__OFFSET
CYFLD_UDB_W8_A1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_A1__SIZE
CYFLD_UDB_W8_A1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A11
CYREG_UDB_W8_A11 EQU 0x400f0011
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A12
CYREG_UDB_W8_A12 EQU 0x400f0012
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A13
CYREG_UDB_W8_A13 EQU 0x400f0013
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D00
CYREG_UDB_W8_D00 EQU 0x400f0020
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_D0__OFFSET
CYFLD_UDB_W8_D0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_D0__SIZE
CYFLD_UDB_W8_D0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D01
CYREG_UDB_W8_D01 EQU 0x400f0021
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D02
CYREG_UDB_W8_D02 EQU 0x400f0022
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D03
CYREG_UDB_W8_D03 EQU 0x400f0023
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D10
CYREG_UDB_W8_D10 EQU 0x400f0030
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_D1__OFFSET
CYFLD_UDB_W8_D1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_D1__SIZE
CYFLD_UDB_W8_D1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D11
CYREG_UDB_W8_D11 EQU 0x400f0031
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D12
CYREG_UDB_W8_D12 EQU 0x400f0032
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D13
CYREG_UDB_W8_D13 EQU 0x400f0033
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F00
CYREG_UDB_W8_F00 EQU 0x400f0040
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_F0__OFFSET
CYFLD_UDB_W8_F0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_F0__SIZE
CYFLD_UDB_W8_F0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F01
CYREG_UDB_W8_F01 EQU 0x400f0041
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F02
CYREG_UDB_W8_F02 EQU 0x400f0042
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F03
CYREG_UDB_W8_F03 EQU 0x400f0043
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F10
CYREG_UDB_W8_F10 EQU 0x400f0050
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_F1__OFFSET
CYFLD_UDB_W8_F1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_F1__SIZE
CYFLD_UDB_W8_F1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F11
CYREG_UDB_W8_F11 EQU 0x400f0051
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F12
CYREG_UDB_W8_F12 EQU 0x400f0052
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F13
CYREG_UDB_W8_F13 EQU 0x400f0053
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ST0
CYREG_UDB_W8_ST0 EQU 0x400f0060
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_ST__OFFSET
CYFLD_UDB_W8_ST__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_ST__SIZE
CYFLD_UDB_W8_ST__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ST1
CYREG_UDB_W8_ST1 EQU 0x400f0061
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ST2
CYREG_UDB_W8_ST2 EQU 0x400f0062
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ST3
CYREG_UDB_W8_ST3 EQU 0x400f0063
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_CTL0
CYREG_UDB_W8_CTL0 EQU 0x400f0070
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_CTL__OFFSET
CYFLD_UDB_W8_CTL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_CTL__SIZE
CYFLD_UDB_W8_CTL__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_CTL1
CYREG_UDB_W8_CTL1 EQU 0x400f0071
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_CTL2
CYREG_UDB_W8_CTL2 EQU 0x400f0072
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_CTL3
CYREG_UDB_W8_CTL3 EQU 0x400f0073
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MSK0
CYREG_UDB_W8_MSK0 EQU 0x400f0080
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_MSK__OFFSET
CYFLD_UDB_W8_MSK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_MSK__SIZE
CYFLD_UDB_W8_MSK__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MSK1
CYREG_UDB_W8_MSK1 EQU 0x400f0081
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MSK2
CYREG_UDB_W8_MSK2 EQU 0x400f0082
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MSK3
CYREG_UDB_W8_MSK3 EQU 0x400f0083
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ACTL0
CYREG_UDB_W8_ACTL0 EQU 0x400f0090
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_FIFO0_CLR__OFFSET
CYFLD_UDB_W8_FIFO0_CLR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_FIFO0_CLR__SIZE
CYFLD_UDB_W8_FIFO0_CLR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_FIFO0_CLR_NORMAL
CYVAL_UDB_W8_FIFO0_CLR_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_FIFO0_CLR_CLEAR
CYVAL_UDB_W8_FIFO0_CLR_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_FIFO1_CLR__OFFSET
CYFLD_UDB_W8_FIFO1_CLR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_FIFO1_CLR__SIZE
CYFLD_UDB_W8_FIFO1_CLR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_FIFO1_CLR_NORMAL
CYVAL_UDB_W8_FIFO1_CLR_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_FIFO1_CLR_CLEAR
CYVAL_UDB_W8_FIFO1_CLR_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_FIFO0_LVL__OFFSET
CYFLD_UDB_W8_FIFO0_LVL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_FIFO0_LVL__SIZE
CYFLD_UDB_W8_FIFO0_LVL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_FIFO0_LVL_NORMAL
CYVAL_UDB_W8_FIFO0_LVL_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_FIFO0_LVL_MID
CYVAL_UDB_W8_FIFO0_LVL_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_FIFO1_LVL__OFFSET
CYFLD_UDB_W8_FIFO1_LVL__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_FIFO1_LVL__SIZE
CYFLD_UDB_W8_FIFO1_LVL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_FIFO1_LVL_NORMAL
CYVAL_UDB_W8_FIFO1_LVL_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_FIFO1_LVL_MID
CYVAL_UDB_W8_FIFO1_LVL_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_INT_EN__OFFSET
CYFLD_UDB_W8_INT_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_INT_EN__SIZE
CYFLD_UDB_W8_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_INT_EN_DISABLE
CYVAL_UDB_W8_INT_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_INT_EN_ENABLE
CYVAL_UDB_W8_INT_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_CNT_START__OFFSET
CYFLD_UDB_W8_CNT_START__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_CNT_START__SIZE
CYFLD_UDB_W8_CNT_START__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_CNT_START_DISABLE
CYVAL_UDB_W8_CNT_START_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W8_CNT_START_ENABLE
CYVAL_UDB_W8_CNT_START_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ACTL1
CYREG_UDB_W8_ACTL1 EQU 0x400f0091
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ACTL2
CYREG_UDB_W8_ACTL2 EQU 0x400f0092
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ACTL3
CYREG_UDB_W8_ACTL3 EQU 0x400f0093
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MC0
CYREG_UDB_W8_MC0 EQU 0x400f00a0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_PLD0_MC__OFFSET
CYFLD_UDB_W8_PLD0_MC__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_PLD0_MC__SIZE
CYFLD_UDB_W8_PLD0_MC__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_PLD1_MC__OFFSET
CYFLD_UDB_W8_PLD1_MC__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W8_PLD1_MC__SIZE
CYFLD_UDB_W8_PLD1_MC__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MC1
CYREG_UDB_W8_MC1 EQU 0x400f00a1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MC2
CYREG_UDB_W8_MC2 EQU 0x400f00a2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MC3
CYREG_UDB_W8_MC3 EQU 0x400f00a3
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_CAT16_BASE
CYDEV_UDB_CAT16_BASE EQU 0x400f1000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_CAT16_SIZE
CYDEV_UDB_CAT16_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_A0
CYREG_UDB_CAT16_A0 EQU 0x400f1000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_A0__OFFSET
CYFLD_UDB_CAT16_A0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_A0__SIZE
CYFLD_UDB_CAT16_A0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_A1__OFFSET
CYFLD_UDB_CAT16_A1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_A1__SIZE
CYFLD_UDB_CAT16_A1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_A1
CYREG_UDB_CAT16_A1 EQU 0x400f1002
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_A2
CYREG_UDB_CAT16_A2 EQU 0x400f1004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_A3
CYREG_UDB_CAT16_A3 EQU 0x400f1006
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_D0
CYREG_UDB_CAT16_D0 EQU 0x400f1040
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_D0__OFFSET
CYFLD_UDB_CAT16_D0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_D0__SIZE
CYFLD_UDB_CAT16_D0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_D1__OFFSET
CYFLD_UDB_CAT16_D1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_D1__SIZE
CYFLD_UDB_CAT16_D1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_D1
CYREG_UDB_CAT16_D1 EQU 0x400f1042
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_D2
CYREG_UDB_CAT16_D2 EQU 0x400f1044
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_D3
CYREG_UDB_CAT16_D3 EQU 0x400f1046
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_F0
CYREG_UDB_CAT16_F0 EQU 0x400f1080
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_F0__OFFSET
CYFLD_UDB_CAT16_F0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_F0__SIZE
CYFLD_UDB_CAT16_F0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_F1__OFFSET
CYFLD_UDB_CAT16_F1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_F1__SIZE
CYFLD_UDB_CAT16_F1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_F1
CYREG_UDB_CAT16_F1 EQU 0x400f1082
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_F2
CYREG_UDB_CAT16_F2 EQU 0x400f1084
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_F3
CYREG_UDB_CAT16_F3 EQU 0x400f1086
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST0
CYREG_UDB_CAT16_CTL_ST0 EQU 0x400f10c0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_ST__OFFSET
CYFLD_UDB_CAT16_ST__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_ST__SIZE
CYFLD_UDB_CAT16_ST__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_CTL__OFFSET
CYFLD_UDB_CAT16_CTL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_CTL__SIZE
CYFLD_UDB_CAT16_CTL__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST1
CYREG_UDB_CAT16_CTL_ST1 EQU 0x400f10c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST2
CYREG_UDB_CAT16_CTL_ST2 EQU 0x400f10c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST3
CYREG_UDB_CAT16_CTL_ST3 EQU 0x400f10c6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK0
CYREG_UDB_CAT16_ACTL_MSK0 EQU 0x400f1100
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_MSK__OFFSET
CYFLD_UDB_CAT16_MSK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_MSK__SIZE
CYFLD_UDB_CAT16_MSK__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO0_CLR__OFFSET
CYFLD_UDB_CAT16_FIFO0_CLR__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO0_CLR__SIZE
CYFLD_UDB_CAT16_FIFO0_CLR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO0_CLR_NORMAL
CYVAL_UDB_CAT16_FIFO0_CLR_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO0_CLR_CLEAR
CYVAL_UDB_CAT16_FIFO0_CLR_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO1_CLR__OFFSET
CYFLD_UDB_CAT16_FIFO1_CLR__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO1_CLR__SIZE
CYFLD_UDB_CAT16_FIFO1_CLR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO1_CLR_NORMAL
CYVAL_UDB_CAT16_FIFO1_CLR_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO1_CLR_CLEAR
CYVAL_UDB_CAT16_FIFO1_CLR_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO0_LVL__OFFSET
CYFLD_UDB_CAT16_FIFO0_LVL__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO0_LVL__SIZE
CYFLD_UDB_CAT16_FIFO0_LVL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO0_LVL_NORMAL
CYVAL_UDB_CAT16_FIFO0_LVL_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO0_LVL_MID
CYVAL_UDB_CAT16_FIFO0_LVL_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO1_LVL__OFFSET
CYFLD_UDB_CAT16_FIFO1_LVL__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_FIFO1_LVL__SIZE
CYFLD_UDB_CAT16_FIFO1_LVL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO1_LVL_NORMAL
CYVAL_UDB_CAT16_FIFO1_LVL_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_FIFO1_LVL_MID
CYVAL_UDB_CAT16_FIFO1_LVL_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_INT_EN__OFFSET
CYFLD_UDB_CAT16_INT_EN__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_INT_EN__SIZE
CYFLD_UDB_CAT16_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_INT_EN_DISABLE
CYVAL_UDB_CAT16_INT_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_INT_EN_ENABLE
CYVAL_UDB_CAT16_INT_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_CNT_START__OFFSET
CYFLD_UDB_CAT16_CNT_START__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_CNT_START__SIZE
CYFLD_UDB_CAT16_CNT_START__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_CNT_START_DISABLE
CYVAL_UDB_CAT16_CNT_START_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_CAT16_CNT_START_ENABLE
CYVAL_UDB_CAT16_CNT_START_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK1
CYREG_UDB_CAT16_ACTL_MSK1 EQU 0x400f1102
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK2
CYREG_UDB_CAT16_ACTL_MSK2 EQU 0x400f1104
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK3
CYREG_UDB_CAT16_ACTL_MSK3 EQU 0x400f1106
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_MC0
CYREG_UDB_CAT16_MC0 EQU 0x400f1140
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_PLD0_MC__OFFSET
CYFLD_UDB_CAT16_PLD0_MC__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_PLD0_MC__SIZE
CYFLD_UDB_CAT16_PLD0_MC__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_PLD1_MC__OFFSET
CYFLD_UDB_CAT16_PLD1_MC__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_CAT16_PLD1_MC__SIZE
CYFLD_UDB_CAT16_PLD1_MC__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_MC1
CYREG_UDB_CAT16_MC1 EQU 0x400f1142
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_MC2
CYREG_UDB_CAT16_MC2 EQU 0x400f1144
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_MC3
CYREG_UDB_CAT16_MC3 EQU 0x400f1146
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_W16_BASE
CYDEV_UDB_W16_BASE EQU 0x400f1000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_W16_SIZE
CYDEV_UDB_W16_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A00
CYREG_UDB_W16_A00 EQU 0x400f1000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_A0_LS__OFFSET
CYFLD_UDB_W16_A0_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_A0_LS__SIZE
CYFLD_UDB_W16_A0_LS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_A0_MS__OFFSET
CYFLD_UDB_W16_A0_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_A0_MS__SIZE
CYFLD_UDB_W16_A0_MS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A01
CYREG_UDB_W16_A01 EQU 0x400f1002
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A02
CYREG_UDB_W16_A02 EQU 0x400f1004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A10
CYREG_UDB_W16_A10 EQU 0x400f1020
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_A1_LS__OFFSET
CYFLD_UDB_W16_A1_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_A1_LS__SIZE
CYFLD_UDB_W16_A1_LS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_A1_MS__OFFSET
CYFLD_UDB_W16_A1_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_A1_MS__SIZE
CYFLD_UDB_W16_A1_MS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A11
CYREG_UDB_W16_A11 EQU 0x400f1022
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A12
CYREG_UDB_W16_A12 EQU 0x400f1024
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D00
CYREG_UDB_W16_D00 EQU 0x400f1040
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_D0_LS__OFFSET
CYFLD_UDB_W16_D0_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_D0_LS__SIZE
CYFLD_UDB_W16_D0_LS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_D0_MS__OFFSET
CYFLD_UDB_W16_D0_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_D0_MS__SIZE
CYFLD_UDB_W16_D0_MS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D01
CYREG_UDB_W16_D01 EQU 0x400f1042
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D02
CYREG_UDB_W16_D02 EQU 0x400f1044
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D10
CYREG_UDB_W16_D10 EQU 0x400f1060
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_D1_LS__OFFSET
CYFLD_UDB_W16_D1_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_D1_LS__SIZE
CYFLD_UDB_W16_D1_LS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_D1_MS__OFFSET
CYFLD_UDB_W16_D1_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_D1_MS__SIZE
CYFLD_UDB_W16_D1_MS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D11
CYREG_UDB_W16_D11 EQU 0x400f1062
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D12
CYREG_UDB_W16_D12 EQU 0x400f1064
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F00
CYREG_UDB_W16_F00 EQU 0x400f1080
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_F0_LS__OFFSET
CYFLD_UDB_W16_F0_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_F0_LS__SIZE
CYFLD_UDB_W16_F0_LS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_F0_MS__OFFSET
CYFLD_UDB_W16_F0_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_F0_MS__SIZE
CYFLD_UDB_W16_F0_MS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F01
CYREG_UDB_W16_F01 EQU 0x400f1082
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F02
CYREG_UDB_W16_F02 EQU 0x400f1084
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F10
CYREG_UDB_W16_F10 EQU 0x400f10a0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_F1_LS__OFFSET
CYFLD_UDB_W16_F1_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_F1_LS__SIZE
CYFLD_UDB_W16_F1_LS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_F1_MS__OFFSET
CYFLD_UDB_W16_F1_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_F1_MS__SIZE
CYFLD_UDB_W16_F1_MS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F11
CYREG_UDB_W16_F11 EQU 0x400f10a2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F12
CYREG_UDB_W16_F12 EQU 0x400f10a4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ST0
CYREG_UDB_W16_ST0 EQU 0x400f10c0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_ST_LS__OFFSET
CYFLD_UDB_W16_ST_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_ST_LS__SIZE
CYFLD_UDB_W16_ST_LS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_ST_MS__OFFSET
CYFLD_UDB_W16_ST_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_ST_MS__SIZE
CYFLD_UDB_W16_ST_MS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ST1
CYREG_UDB_W16_ST1 EQU 0x400f10c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ST2
CYREG_UDB_W16_ST2 EQU 0x400f10c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_CTL0
CYREG_UDB_W16_CTL0 EQU 0x400f10e0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_CTL_LS__OFFSET
CYFLD_UDB_W16_CTL_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_CTL_LS__SIZE
CYFLD_UDB_W16_CTL_LS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_CTL_MS__OFFSET
CYFLD_UDB_W16_CTL_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_CTL_MS__SIZE
CYFLD_UDB_W16_CTL_MS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_CTL1
CYREG_UDB_W16_CTL1 EQU 0x400f10e2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_CTL2
CYREG_UDB_W16_CTL2 EQU 0x400f10e4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MSK0
CYREG_UDB_W16_MSK0 EQU 0x400f1100
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_MSK_LS__OFFSET
CYFLD_UDB_W16_MSK_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_MSK_LS__SIZE
CYFLD_UDB_W16_MSK_LS__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_MSK_MS__OFFSET
CYFLD_UDB_W16_MSK_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_MSK_MS__SIZE
CYFLD_UDB_W16_MSK_MS__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MSK1
CYREG_UDB_W16_MSK1 EQU 0x400f1102
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MSK2
CYREG_UDB_W16_MSK2 EQU 0x400f1104
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ACTL0
CYREG_UDB_W16_ACTL0 EQU 0x400f1120
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_CLR_LS__OFFSET
CYFLD_UDB_W16_FIFO0_CLR_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_CLR_LS__SIZE
CYFLD_UDB_W16_FIFO0_CLR_LS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_CLR_LS_NORMAL
CYVAL_UDB_W16_FIFO0_CLR_LS_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_CLR_LS_CLEAR
CYVAL_UDB_W16_FIFO0_CLR_LS_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_CLR_LS__OFFSET
CYFLD_UDB_W16_FIFO1_CLR_LS__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_CLR_LS__SIZE
CYFLD_UDB_W16_FIFO1_CLR_LS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_CLR_LS_NORMAL
CYVAL_UDB_W16_FIFO1_CLR_LS_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_CLR_LS_CLEAR
CYVAL_UDB_W16_FIFO1_CLR_LS_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_LVL_LS__OFFSET
CYFLD_UDB_W16_FIFO0_LVL_LS__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_LVL_LS__SIZE
CYFLD_UDB_W16_FIFO0_LVL_LS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_LVL_LS_NORMAL
CYVAL_UDB_W16_FIFO0_LVL_LS_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_LVL_LS_MID
CYVAL_UDB_W16_FIFO0_LVL_LS_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_LVL_LS__OFFSET
CYFLD_UDB_W16_FIFO1_LVL_LS__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_LVL_LS__SIZE
CYFLD_UDB_W16_FIFO1_LVL_LS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_LVL_LS_NORMAL
CYVAL_UDB_W16_FIFO1_LVL_LS_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_LVL_LS_MID
CYVAL_UDB_W16_FIFO1_LVL_LS_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_INT_EN_LS__OFFSET
CYFLD_UDB_W16_INT_EN_LS__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_INT_EN_LS__SIZE
CYFLD_UDB_W16_INT_EN_LS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_INT_EN_LS_DISABLE
CYVAL_UDB_W16_INT_EN_LS_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_INT_EN_LS_ENABLE
CYVAL_UDB_W16_INT_EN_LS_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_CNT_START_LS__OFFSET
CYFLD_UDB_W16_CNT_START_LS__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_CNT_START_LS__SIZE
CYFLD_UDB_W16_CNT_START_LS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_CNT_START_LS_DISABLE
CYVAL_UDB_W16_CNT_START_LS_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_CNT_START_LS_ENABLE
CYVAL_UDB_W16_CNT_START_LS_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_CLR_MS__OFFSET
CYFLD_UDB_W16_FIFO0_CLR_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_CLR_MS__SIZE
CYFLD_UDB_W16_FIFO0_CLR_MS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_CLR_MS_NORMAL
CYVAL_UDB_W16_FIFO0_CLR_MS_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_CLR_MS_CLEAR
CYVAL_UDB_W16_FIFO0_CLR_MS_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_CLR_MS__OFFSET
CYFLD_UDB_W16_FIFO1_CLR_MS__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_CLR_MS__SIZE
CYFLD_UDB_W16_FIFO1_CLR_MS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_CLR_MS_NORMAL
CYVAL_UDB_W16_FIFO1_CLR_MS_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_CLR_MS_CLEAR
CYVAL_UDB_W16_FIFO1_CLR_MS_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_LVL_MS__OFFSET
CYFLD_UDB_W16_FIFO0_LVL_MS__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO0_LVL_MS__SIZE
CYFLD_UDB_W16_FIFO0_LVL_MS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_LVL_MS_NORMAL
CYVAL_UDB_W16_FIFO0_LVL_MS_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO0_LVL_MS_MID
CYVAL_UDB_W16_FIFO0_LVL_MS_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_LVL_MS__OFFSET
CYFLD_UDB_W16_FIFO1_LVL_MS__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_FIFO1_LVL_MS__SIZE
CYFLD_UDB_W16_FIFO1_LVL_MS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_LVL_MS_NORMAL
CYVAL_UDB_W16_FIFO1_LVL_MS_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_FIFO1_LVL_MS_MID
CYVAL_UDB_W16_FIFO1_LVL_MS_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_INT_EN_MS__OFFSET
CYFLD_UDB_W16_INT_EN_MS__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_INT_EN_MS__SIZE
CYFLD_UDB_W16_INT_EN_MS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_INT_EN_MS_DISABLE
CYVAL_UDB_W16_INT_EN_MS_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_INT_EN_MS_ENABLE
CYVAL_UDB_W16_INT_EN_MS_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_CNT_START_MS__OFFSET
CYFLD_UDB_W16_CNT_START_MS__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_CNT_START_MS__SIZE
CYFLD_UDB_W16_CNT_START_MS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_CNT_START_MS_DISABLE
CYVAL_UDB_W16_CNT_START_MS_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W16_CNT_START_MS_ENABLE
CYVAL_UDB_W16_CNT_START_MS_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ACTL1
CYREG_UDB_W16_ACTL1 EQU 0x400f1122
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ACTL2
CYREG_UDB_W16_ACTL2 EQU 0x400f1124
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MC0
CYREG_UDB_W16_MC0 EQU 0x400f1140
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_PLD0_MC_LS__OFFSET
CYFLD_UDB_W16_PLD0_MC_LS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_PLD0_MC_LS__SIZE
CYFLD_UDB_W16_PLD0_MC_LS__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_PLD1_MC_LS__OFFSET
CYFLD_UDB_W16_PLD1_MC_LS__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_PLD1_MC_LS__SIZE
CYFLD_UDB_W16_PLD1_MC_LS__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_PLD0_MC_MS__OFFSET
CYFLD_UDB_W16_PLD0_MC_MS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_PLD0_MC_MS__SIZE
CYFLD_UDB_W16_PLD0_MC_MS__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_PLD1_MC_MS__OFFSET
CYFLD_UDB_W16_PLD1_MC_MS__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W16_PLD1_MC_MS__SIZE
CYFLD_UDB_W16_PLD1_MC_MS__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MC1
CYREG_UDB_W16_MC1 EQU 0x400f1142
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MC2
CYREG_UDB_W16_MC2 EQU 0x400f1144
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_W32_BASE
CYDEV_UDB_W32_BASE EQU 0x400f2000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_W32_SIZE
CYDEV_UDB_W32_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_A0
CYREG_UDB_W32_A0 EQU 0x400f2000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A0_0__OFFSET
CYFLD_UDB_W32_A0_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A0_0__SIZE
CYFLD_UDB_W32_A0_0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A0_1__OFFSET
CYFLD_UDB_W32_A0_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A0_1__SIZE
CYFLD_UDB_W32_A0_1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A0_2__OFFSET
CYFLD_UDB_W32_A0_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A0_2__SIZE
CYFLD_UDB_W32_A0_2__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A0_3__OFFSET
CYFLD_UDB_W32_A0_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A0_3__SIZE
CYFLD_UDB_W32_A0_3__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_A1
CYREG_UDB_W32_A1 EQU 0x400f2040
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A1_0__OFFSET
CYFLD_UDB_W32_A1_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A1_0__SIZE
CYFLD_UDB_W32_A1_0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A1_1__OFFSET
CYFLD_UDB_W32_A1_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A1_1__SIZE
CYFLD_UDB_W32_A1_1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A1_2__OFFSET
CYFLD_UDB_W32_A1_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A1_2__SIZE
CYFLD_UDB_W32_A1_2__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A1_3__OFFSET
CYFLD_UDB_W32_A1_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_A1_3__SIZE
CYFLD_UDB_W32_A1_3__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_D0
CYREG_UDB_W32_D0 EQU 0x400f2080
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D0_0__OFFSET
CYFLD_UDB_W32_D0_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D0_0__SIZE
CYFLD_UDB_W32_D0_0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D0_1__OFFSET
CYFLD_UDB_W32_D0_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D0_1__SIZE
CYFLD_UDB_W32_D0_1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D0_2__OFFSET
CYFLD_UDB_W32_D0_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D0_2__SIZE
CYFLD_UDB_W32_D0_2__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D0_3__OFFSET
CYFLD_UDB_W32_D0_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D0_3__SIZE
CYFLD_UDB_W32_D0_3__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_D1
CYREG_UDB_W32_D1 EQU 0x400f20c0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D1_0__OFFSET
CYFLD_UDB_W32_D1_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D1_0__SIZE
CYFLD_UDB_W32_D1_0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D1_1__OFFSET
CYFLD_UDB_W32_D1_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D1_1__SIZE
CYFLD_UDB_W32_D1_1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D1_2__OFFSET
CYFLD_UDB_W32_D1_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D1_2__SIZE
CYFLD_UDB_W32_D1_2__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D1_3__OFFSET
CYFLD_UDB_W32_D1_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_D1_3__SIZE
CYFLD_UDB_W32_D1_3__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_F0
CYREG_UDB_W32_F0 EQU 0x400f2100
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F0_0__OFFSET
CYFLD_UDB_W32_F0_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F0_0__SIZE
CYFLD_UDB_W32_F0_0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F0_1__OFFSET
CYFLD_UDB_W32_F0_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F0_1__SIZE
CYFLD_UDB_W32_F0_1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F0_2__OFFSET
CYFLD_UDB_W32_F0_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F0_2__SIZE
CYFLD_UDB_W32_F0_2__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F0_3__OFFSET
CYFLD_UDB_W32_F0_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F0_3__SIZE
CYFLD_UDB_W32_F0_3__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_F1
CYREG_UDB_W32_F1 EQU 0x400f2140
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F1_0__OFFSET
CYFLD_UDB_W32_F1_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F1_0__SIZE
CYFLD_UDB_W32_F1_0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F1_1__OFFSET
CYFLD_UDB_W32_F1_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F1_1__SIZE
CYFLD_UDB_W32_F1_1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F1_2__OFFSET
CYFLD_UDB_W32_F1_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F1_2__SIZE
CYFLD_UDB_W32_F1_2__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F1_3__OFFSET
CYFLD_UDB_W32_F1_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_F1_3__SIZE
CYFLD_UDB_W32_F1_3__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_ST
CYREG_UDB_W32_ST EQU 0x400f2180
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_ST_0__OFFSET
CYFLD_UDB_W32_ST_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_ST_0__SIZE
CYFLD_UDB_W32_ST_0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_ST_1__OFFSET
CYFLD_UDB_W32_ST_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_ST_1__SIZE
CYFLD_UDB_W32_ST_1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_ST_2__OFFSET
CYFLD_UDB_W32_ST_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_ST_2__SIZE
CYFLD_UDB_W32_ST_2__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_ST_3__OFFSET
CYFLD_UDB_W32_ST_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_ST_3__SIZE
CYFLD_UDB_W32_ST_3__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_CTL
CYREG_UDB_W32_CTL EQU 0x400f21c0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CTL_0__OFFSET
CYFLD_UDB_W32_CTL_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CTL_0__SIZE
CYFLD_UDB_W32_CTL_0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CTL_1__OFFSET
CYFLD_UDB_W32_CTL_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CTL_1__SIZE
CYFLD_UDB_W32_CTL_1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CTL_2__OFFSET
CYFLD_UDB_W32_CTL_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CTL_2__SIZE
CYFLD_UDB_W32_CTL_2__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CTL_3__OFFSET
CYFLD_UDB_W32_CTL_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CTL_3__SIZE
CYFLD_UDB_W32_CTL_3__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_MSK
CYREG_UDB_W32_MSK EQU 0x400f2200
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_MSK_0__OFFSET
CYFLD_UDB_W32_MSK_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_MSK_0__SIZE
CYFLD_UDB_W32_MSK_0__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_MSK_1__OFFSET
CYFLD_UDB_W32_MSK_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_MSK_1__SIZE
CYFLD_UDB_W32_MSK_1__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_MSK_2__OFFSET
CYFLD_UDB_W32_MSK_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_MSK_2__SIZE
CYFLD_UDB_W32_MSK_2__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_MSK_3__OFFSET
CYFLD_UDB_W32_MSK_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_MSK_3__SIZE
CYFLD_UDB_W32_MSK_3__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_ACTL
CYREG_UDB_W32_ACTL EQU 0x400f2240
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_0__OFFSET
CYFLD_UDB_W32_FIFO0_CLR_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_0__SIZE
CYFLD_UDB_W32_FIFO0_CLR_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_0_NORMAL
CYVAL_UDB_W32_FIFO0_CLR_0_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_0_CLEAR
CYVAL_UDB_W32_FIFO0_CLR_0_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_0__OFFSET
CYFLD_UDB_W32_FIFO1_CLR_0__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_0__SIZE
CYFLD_UDB_W32_FIFO1_CLR_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_0_NORMAL
CYVAL_UDB_W32_FIFO1_CLR_0_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_0_CLEAR
CYVAL_UDB_W32_FIFO1_CLR_0_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_0__OFFSET
CYFLD_UDB_W32_FIFO0_LVL_0__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_0__SIZE
CYFLD_UDB_W32_FIFO0_LVL_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_0_NORMAL
CYVAL_UDB_W32_FIFO0_LVL_0_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_0_MID
CYVAL_UDB_W32_FIFO0_LVL_0_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_0__OFFSET
CYFLD_UDB_W32_FIFO1_LVL_0__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_0__SIZE
CYFLD_UDB_W32_FIFO1_LVL_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_0_NORMAL
CYVAL_UDB_W32_FIFO1_LVL_0_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_0_MID
CYVAL_UDB_W32_FIFO1_LVL_0_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_0__OFFSET
CYFLD_UDB_W32_INT_EN_0__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_0__SIZE
CYFLD_UDB_W32_INT_EN_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_0_DISABLE
CYVAL_UDB_W32_INT_EN_0_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_0_ENABLE
CYVAL_UDB_W32_INT_EN_0_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_0__OFFSET
CYFLD_UDB_W32_CNT_START_0__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_0__SIZE
CYFLD_UDB_W32_CNT_START_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_0_DISABLE
CYVAL_UDB_W32_CNT_START_0_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_0_ENABLE
CYVAL_UDB_W32_CNT_START_0_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_1__OFFSET
CYFLD_UDB_W32_FIFO0_CLR_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_1__SIZE
CYFLD_UDB_W32_FIFO0_CLR_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_1_NORMAL
CYVAL_UDB_W32_FIFO0_CLR_1_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_1_CLEAR
CYVAL_UDB_W32_FIFO0_CLR_1_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_1__OFFSET
CYFLD_UDB_W32_FIFO1_CLR_1__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_1__SIZE
CYFLD_UDB_W32_FIFO1_CLR_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_1_NORMAL
CYVAL_UDB_W32_FIFO1_CLR_1_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_1_CLEAR
CYVAL_UDB_W32_FIFO1_CLR_1_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_1__OFFSET
CYFLD_UDB_W32_FIFO0_LVL_1__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_1__SIZE
CYFLD_UDB_W32_FIFO0_LVL_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_1_NORMAL
CYVAL_UDB_W32_FIFO0_LVL_1_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_1_MID
CYVAL_UDB_W32_FIFO0_LVL_1_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_1__OFFSET
CYFLD_UDB_W32_FIFO1_LVL_1__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_1__SIZE
CYFLD_UDB_W32_FIFO1_LVL_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_1_NORMAL
CYVAL_UDB_W32_FIFO1_LVL_1_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_1_MID
CYVAL_UDB_W32_FIFO1_LVL_1_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_1__OFFSET
CYFLD_UDB_W32_INT_EN_1__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_1__SIZE
CYFLD_UDB_W32_INT_EN_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_1_DISABLE
CYVAL_UDB_W32_INT_EN_1_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_1_ENABLE
CYVAL_UDB_W32_INT_EN_1_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_1__OFFSET
CYFLD_UDB_W32_CNT_START_1__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_1__SIZE
CYFLD_UDB_W32_CNT_START_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_1_DISABLE
CYVAL_UDB_W32_CNT_START_1_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_1_ENABLE
CYVAL_UDB_W32_CNT_START_1_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_2__OFFSET
CYFLD_UDB_W32_FIFO0_CLR_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_2__SIZE
CYFLD_UDB_W32_FIFO0_CLR_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_2_NORMAL
CYVAL_UDB_W32_FIFO0_CLR_2_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_2_CLEAR
CYVAL_UDB_W32_FIFO0_CLR_2_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_2__OFFSET
CYFLD_UDB_W32_FIFO1_CLR_2__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_2__SIZE
CYFLD_UDB_W32_FIFO1_CLR_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_2_NORMAL
CYVAL_UDB_W32_FIFO1_CLR_2_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_2_CLEAR
CYVAL_UDB_W32_FIFO1_CLR_2_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_2__OFFSET
CYFLD_UDB_W32_FIFO0_LVL_2__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_2__SIZE
CYFLD_UDB_W32_FIFO0_LVL_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_2_NORMAL
CYVAL_UDB_W32_FIFO0_LVL_2_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_2_MID
CYVAL_UDB_W32_FIFO0_LVL_2_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_2__OFFSET
CYFLD_UDB_W32_FIFO1_LVL_2__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_2__SIZE
CYFLD_UDB_W32_FIFO1_LVL_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_2_NORMAL
CYVAL_UDB_W32_FIFO1_LVL_2_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_2_MID
CYVAL_UDB_W32_FIFO1_LVL_2_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_2__OFFSET
CYFLD_UDB_W32_INT_EN_2__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_2__SIZE
CYFLD_UDB_W32_INT_EN_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_2_DISABLE
CYVAL_UDB_W32_INT_EN_2_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_2_ENABLE
CYVAL_UDB_W32_INT_EN_2_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_2__OFFSET
CYFLD_UDB_W32_CNT_START_2__OFFSET EQU 0x00000015
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_2__SIZE
CYFLD_UDB_W32_CNT_START_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_2_DISABLE
CYVAL_UDB_W32_CNT_START_2_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_2_ENABLE
CYVAL_UDB_W32_CNT_START_2_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_3__OFFSET
CYFLD_UDB_W32_FIFO0_CLR_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_CLR_3__SIZE
CYFLD_UDB_W32_FIFO0_CLR_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_3_NORMAL
CYVAL_UDB_W32_FIFO0_CLR_3_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_CLR_3_CLEAR
CYVAL_UDB_W32_FIFO0_CLR_3_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_3__OFFSET
CYFLD_UDB_W32_FIFO1_CLR_3__OFFSET EQU 0x00000019
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_CLR_3__SIZE
CYFLD_UDB_W32_FIFO1_CLR_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_3_NORMAL
CYVAL_UDB_W32_FIFO1_CLR_3_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_CLR_3_CLEAR
CYVAL_UDB_W32_FIFO1_CLR_3_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_3__OFFSET
CYFLD_UDB_W32_FIFO0_LVL_3__OFFSET EQU 0x0000001a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO0_LVL_3__SIZE
CYFLD_UDB_W32_FIFO0_LVL_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_3_NORMAL
CYVAL_UDB_W32_FIFO0_LVL_3_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO0_LVL_3_MID
CYVAL_UDB_W32_FIFO0_LVL_3_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_3__OFFSET
CYFLD_UDB_W32_FIFO1_LVL_3__OFFSET EQU 0x0000001b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_FIFO1_LVL_3__SIZE
CYFLD_UDB_W32_FIFO1_LVL_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_3_NORMAL
CYVAL_UDB_W32_FIFO1_LVL_3_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_FIFO1_LVL_3_MID
CYVAL_UDB_W32_FIFO1_LVL_3_MID EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_3__OFFSET
CYFLD_UDB_W32_INT_EN_3__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_INT_EN_3__SIZE
CYFLD_UDB_W32_INT_EN_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_3_DISABLE
CYVAL_UDB_W32_INT_EN_3_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_INT_EN_3_ENABLE
CYVAL_UDB_W32_INT_EN_3_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_3__OFFSET
CYFLD_UDB_W32_CNT_START_3__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_CNT_START_3__SIZE
CYFLD_UDB_W32_CNT_START_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_3_DISABLE
CYVAL_UDB_W32_CNT_START_3_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_W32_CNT_START_3_ENABLE
CYVAL_UDB_W32_CNT_START_3_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_MC
CYREG_UDB_W32_MC EQU 0x400f2280
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_0__OFFSET
CYFLD_UDB_W32_PLD0_MC_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_0__SIZE
CYFLD_UDB_W32_PLD0_MC_0__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_0__OFFSET
CYFLD_UDB_W32_PLD1_MC_0__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_0__SIZE
CYFLD_UDB_W32_PLD1_MC_0__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_1__OFFSET
CYFLD_UDB_W32_PLD0_MC_1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_1__SIZE
CYFLD_UDB_W32_PLD0_MC_1__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_1__OFFSET
CYFLD_UDB_W32_PLD1_MC_1__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_1__SIZE
CYFLD_UDB_W32_PLD1_MC_1__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_2__OFFSET
CYFLD_UDB_W32_PLD0_MC_2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_2__SIZE
CYFLD_UDB_W32_PLD0_MC_2__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_2__OFFSET
CYFLD_UDB_W32_PLD1_MC_2__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_2__SIZE
CYFLD_UDB_W32_PLD1_MC_2__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_3__OFFSET
CYFLD_UDB_W32_PLD0_MC_3__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD0_MC_3__SIZE
CYFLD_UDB_W32_PLD0_MC_3__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_3__OFFSET
CYFLD_UDB_W32_PLD1_MC_3__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_W32_PLD1_MC_3__SIZE
CYFLD_UDB_W32_PLD1_MC_3__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P0_BASE
CYDEV_UDB_P0_BASE EQU 0x400f3000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P0_SIZE
CYDEV_UDB_P0_SIZE EQU 0x00000200
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P0_U0_BASE
CYDEV_UDB_P0_U0_BASE EQU 0x400f3000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P0_U0_SIZE
CYDEV_UDB_P0_U0_SIZE EQU 0x00000080
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT0
CYREG_UDB_P0_U0_PLD_IT0 EQU 0x400f3000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_0__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_0__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_1__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_1__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_1__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_2__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_2__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_2__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_3__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_3__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_3__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_4__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_4__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_4__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_5__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_5__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_5__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_6__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_6__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_6__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_7__OFFSET
CYFLD_UDB_P_U_PLD0_ITxC_7__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxC_7__SIZE
CYFLD_UDB_P_U_PLD0_ITxC_7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_0__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_0__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_0__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_1__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_1__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_1__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_2__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_2__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_2__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_3__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_3__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_3__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_4__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_4__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_4__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_5__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_5__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_5__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_6__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_6__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_6__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_7__OFFSET
CYFLD_UDB_P_U_PLD1_ITxC_7__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxC_7__SIZE
CYFLD_UDB_P_U_PLD1_ITxC_7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_0__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_0__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_0__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_1__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_1__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_1__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_2__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_2__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_2__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_3__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_3__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_3__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_4__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_4__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_4__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_5__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_5__OFFSET EQU 0x00000015
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_5__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_6__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_6__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_6__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_7__OFFSET
CYFLD_UDB_P_U_PLD0_ITxT_7__OFFSET EQU 0x00000017
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ITxT_7__SIZE
CYFLD_UDB_P_U_PLD0_ITxT_7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_0__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_0__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_0__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_1__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_1__OFFSET EQU 0x00000019
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_1__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_2__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_2__OFFSET EQU 0x0000001a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_2__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_3__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_3__OFFSET EQU 0x0000001b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_3__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_4__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_4__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_4__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_5__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_5__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_5__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_6__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_6__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_6__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_7__OFFSET
CYFLD_UDB_P_U_PLD1_ITxT_7__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ITxT_7__SIZE
CYFLD_UDB_P_U_PLD1_ITxT_7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT1
CYREG_UDB_P0_U0_PLD_IT1 EQU 0x400f3004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT2
CYREG_UDB_P0_U0_PLD_IT2 EQU 0x400f3008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT3
CYREG_UDB_P0_U0_PLD_IT3 EQU 0x400f300c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT4
CYREG_UDB_P0_U0_PLD_IT4 EQU 0x400f3010
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT5
CYREG_UDB_P0_U0_PLD_IT5 EQU 0x400f3014
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT6
CYREG_UDB_P0_U0_PLD_IT6 EQU 0x400f3018
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT7
CYREG_UDB_P0_U0_PLD_IT7 EQU 0x400f301c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT8
CYREG_UDB_P0_U0_PLD_IT8 EQU 0x400f3020
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT9
CYREG_UDB_P0_U0_PLD_IT9 EQU 0x400f3024
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT10
CYREG_UDB_P0_U0_PLD_IT10 EQU 0x400f3028
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_IT11
CYREG_UDB_P0_U0_PLD_IT11 EQU 0x400f302c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_ORT0
CYREG_UDB_P0_U0_PLD_ORT0 EQU 0x400f3030
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_0__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_0__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_1__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_1__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_1__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_2__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_2__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_2__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_3__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_3__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_3__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_4__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_4__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_4__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_5__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_5__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_5__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_6__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_6__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_6__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_7__OFFSET
CYFLD_UDB_P_U_PLD0_ORT_PTx_7__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_ORT_PTx_7__SIZE
CYFLD_UDB_P_U_PLD0_ORT_PTx_7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_0__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_0__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_0__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_1__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_1__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_1__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_2__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_2__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_2__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_3__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_3__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_3__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_4__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_4__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_4__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_5__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_5__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_5__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_6__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_6__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_6__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_7__OFFSET
CYFLD_UDB_P_U_PLD1_ORT_PTx_7__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_ORT_PTx_7__SIZE
CYFLD_UDB_P_U_PLD1_ORT_PTx_7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_ORT1
CYREG_UDB_P0_U0_PLD_ORT1 EQU 0x400f3032
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_ORT2
CYREG_UDB_P0_U0_PLD_ORT2 EQU 0x400f3034
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_ORT3
CYREG_UDB_P0_U0_PLD_ORT3 EQU 0x400f3036
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_MC_CFG_CEN_CONST
CYREG_UDB_P0_U0_PLD_MC_CFG_CEN_CONST EQU 0x400f3038
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_CEN__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_CEN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_CEN__SIZE
CYFLD_UDB_P_U_PLD0_MC0_CEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_CEN_DISABLE
CYVAL_UDB_P_U_PLD0_MC0_CEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_CEN_ENABLE
CYVAL_UDB_P_U_PLD0_MC0_CEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_DFF_C__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_DFF_C__SIZE
CYFLD_UDB_P_U_PLD0_MC0_DFF_C__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_DFF_C_NOINV
CYVAL_UDB_P_U_PLD0_MC0_DFF_C_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD0_MC0_DFF_C_INVERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_CEN__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_CEN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_CEN__SIZE
CYFLD_UDB_P_U_PLD0_MC1_CEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_CEN_DISABLE
CYVAL_UDB_P_U_PLD0_MC1_CEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_CEN_ENABLE
CYVAL_UDB_P_U_PLD0_MC1_CEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_DFF_C__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_DFF_C__SIZE
CYFLD_UDB_P_U_PLD0_MC1_DFF_C__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_DFF_C_NOINV
CYVAL_UDB_P_U_PLD0_MC1_DFF_C_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD0_MC1_DFF_C_INVERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_CEN__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_CEN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_CEN__SIZE
CYFLD_UDB_P_U_PLD0_MC2_CEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_CEN_DISABLE
CYVAL_UDB_P_U_PLD0_MC2_CEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_CEN_ENABLE
CYVAL_UDB_P_U_PLD0_MC2_CEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_DFF_C__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_DFF_C__SIZE
CYFLD_UDB_P_U_PLD0_MC2_DFF_C__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_DFF_C_NOINV
CYVAL_UDB_P_U_PLD0_MC2_DFF_C_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD0_MC2_DFF_C_INVERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_CEN__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_CEN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_CEN__SIZE
CYFLD_UDB_P_U_PLD0_MC3_CEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_CEN_DISABLE
CYVAL_UDB_P_U_PLD0_MC3_CEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_CEN_ENABLE
CYVAL_UDB_P_U_PLD0_MC3_CEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_DFF_C__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_DFF_C__SIZE
CYFLD_UDB_P_U_PLD0_MC3_DFF_C__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_DFF_C_NOINV
CYVAL_UDB_P_U_PLD0_MC3_DFF_C_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD0_MC3_DFF_C_INVERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_CEN__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_CEN__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_CEN__SIZE
CYFLD_UDB_P_U_PLD1_MC0_CEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_CEN_DISABLE
CYVAL_UDB_P_U_PLD1_MC0_CEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_CEN_ENABLE
CYVAL_UDB_P_U_PLD1_MC0_CEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_DFF_C__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_DFF_C__SIZE
CYFLD_UDB_P_U_PLD1_MC0_DFF_C__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_DFF_C_NOINV
CYVAL_UDB_P_U_PLD1_MC0_DFF_C_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD1_MC0_DFF_C_INVERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_CEN__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_CEN__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_CEN__SIZE
CYFLD_UDB_P_U_PLD1_MC1_CEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_CEN_DISABLE
CYVAL_UDB_P_U_PLD1_MC1_CEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_CEN_ENABLE
CYVAL_UDB_P_U_PLD1_MC1_CEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_DFF_C__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_DFF_C__SIZE
CYFLD_UDB_P_U_PLD1_MC1_DFF_C__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_DFF_C_NOINV
CYVAL_UDB_P_U_PLD1_MC1_DFF_C_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD1_MC1_DFF_C_INVERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_CEN__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_CEN__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_CEN__SIZE
CYFLD_UDB_P_U_PLD1_MC2_CEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_CEN_DISABLE
CYVAL_UDB_P_U_PLD1_MC2_CEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_CEN_ENABLE
CYVAL_UDB_P_U_PLD1_MC2_CEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_DFF_C__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_DFF_C__SIZE
CYFLD_UDB_P_U_PLD1_MC2_DFF_C__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_DFF_C_NOINV
CYVAL_UDB_P_U_PLD1_MC2_DFF_C_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD1_MC2_DFF_C_INVERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_CEN__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_CEN__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_CEN__SIZE
CYFLD_UDB_P_U_PLD1_MC3_CEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_CEN_DISABLE
CYVAL_UDB_P_U_PLD1_MC3_CEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_CEN_ENABLE
CYVAL_UDB_P_U_PLD1_MC3_CEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_DFF_C__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_DFF_C__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_DFF_C__SIZE
CYFLD_UDB_P_U_PLD1_MC3_DFF_C__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_DFF_C_NOINV
CYVAL_UDB_P_U_PLD1_MC3_DFF_C_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_DFF_C_INVERTED
CYVAL_UDB_P_U_PLD1_MC3_DFF_C_INVERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_MC_CFG_XORFB
CYREG_UDB_P0_U0_PLD_MC_CFG_XORFB EQU 0x400f303a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_XORFB__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_XORFB__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_XORFB__SIZE
CYFLD_UDB_P_U_PLD0_MC0_XORFB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_XORFB_DFF
CYVAL_UDB_P_U_PLD0_MC0_XORFB_DFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_XORFB_CARRY
CYVAL_UDB_P_U_PLD0_MC0_XORFB_CARRY EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_XORFB_TFF_H
CYVAL_UDB_P_U_PLD0_MC0_XORFB_TFF_H EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_XORFB_TFF_L
CYVAL_UDB_P_U_PLD0_MC0_XORFB_TFF_L EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_XORFB__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_XORFB__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_XORFB__SIZE
CYFLD_UDB_P_U_PLD0_MC1_XORFB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_XORFB_DFF
CYVAL_UDB_P_U_PLD0_MC1_XORFB_DFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_XORFB_CARRY
CYVAL_UDB_P_U_PLD0_MC1_XORFB_CARRY EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_XORFB_TFF_H
CYVAL_UDB_P_U_PLD0_MC1_XORFB_TFF_H EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_XORFB_TFF_L
CYVAL_UDB_P_U_PLD0_MC1_XORFB_TFF_L EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_XORFB__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_XORFB__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_XORFB__SIZE
CYFLD_UDB_P_U_PLD0_MC2_XORFB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_XORFB_DFF
CYVAL_UDB_P_U_PLD0_MC2_XORFB_DFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_XORFB_CARRY
CYVAL_UDB_P_U_PLD0_MC2_XORFB_CARRY EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_XORFB_TFF_H
CYVAL_UDB_P_U_PLD0_MC2_XORFB_TFF_H EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_XORFB_TFF_L
CYVAL_UDB_P_U_PLD0_MC2_XORFB_TFF_L EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_XORFB__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_XORFB__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_XORFB__SIZE
CYFLD_UDB_P_U_PLD0_MC3_XORFB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_XORFB_DFF
CYVAL_UDB_P_U_PLD0_MC3_XORFB_DFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_XORFB_CARRY
CYVAL_UDB_P_U_PLD0_MC3_XORFB_CARRY EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_XORFB_TFF_H
CYVAL_UDB_P_U_PLD0_MC3_XORFB_TFF_H EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_XORFB_TFF_L
CYVAL_UDB_P_U_PLD0_MC3_XORFB_TFF_L EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_XORFB__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_XORFB__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_XORFB__SIZE
CYFLD_UDB_P_U_PLD1_MC0_XORFB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_XORFB_DFF
CYVAL_UDB_P_U_PLD1_MC0_XORFB_DFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_XORFB_CARRY
CYVAL_UDB_P_U_PLD1_MC0_XORFB_CARRY EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_XORFB_TFF_H
CYVAL_UDB_P_U_PLD1_MC0_XORFB_TFF_H EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_XORFB_TFF_L
CYVAL_UDB_P_U_PLD1_MC0_XORFB_TFF_L EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_XORFB__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_XORFB__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_XORFB__SIZE
CYFLD_UDB_P_U_PLD1_MC1_XORFB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_XORFB_DFF
CYVAL_UDB_P_U_PLD1_MC1_XORFB_DFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_XORFB_CARRY
CYVAL_UDB_P_U_PLD1_MC1_XORFB_CARRY EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_XORFB_TFF_H
CYVAL_UDB_P_U_PLD1_MC1_XORFB_TFF_H EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_XORFB_TFF_L
CYVAL_UDB_P_U_PLD1_MC1_XORFB_TFF_L EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_XORFB__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_XORFB__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_XORFB__SIZE
CYFLD_UDB_P_U_PLD1_MC2_XORFB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_XORFB_DFF
CYVAL_UDB_P_U_PLD1_MC2_XORFB_DFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_XORFB_CARRY
CYVAL_UDB_P_U_PLD1_MC2_XORFB_CARRY EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_XORFB_TFF_H
CYVAL_UDB_P_U_PLD1_MC2_XORFB_TFF_H EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_XORFB_TFF_L
CYVAL_UDB_P_U_PLD1_MC2_XORFB_TFF_L EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_XORFB__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_XORFB__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_XORFB__SIZE
CYFLD_UDB_P_U_PLD1_MC3_XORFB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_XORFB_DFF
CYVAL_UDB_P_U_PLD1_MC3_XORFB_DFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_XORFB_CARRY
CYVAL_UDB_P_U_PLD1_MC3_XORFB_CARRY EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_XORFB_TFF_H
CYVAL_UDB_P_U_PLD1_MC3_XORFB_TFF_H EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_XORFB_TFF_L
CYVAL_UDB_P_U_PLD1_MC3_XORFB_TFF_L EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_MC_SET_RESET
CYREG_UDB_P0_U0_PLD_MC_SET_RESET EQU 0x400f303c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_SET_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC0_SET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC0_SET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC0_SET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_RESET_SEL__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC0_RESET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC0_RESET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC0_RESET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_SET_SEL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC1_SET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC1_SET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC1_SET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_RESET_SEL__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC1_RESET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC1_RESET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC1_RESET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_SET_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC2_SET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC2_SET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC2_SET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_RESET_SEL__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC2_RESET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC2_RESET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC2_RESET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_SET_SEL__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC3_SET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC3_SET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC3_SET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_RESET_SEL__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD0_MC3_RESET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD0_MC3_RESET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD0_MC3_RESET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_SET_SEL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC0_SET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC0_SET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC0_SET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_RESET_SEL__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC0_RESET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC0_RESET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC0_RESET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_SET_SEL__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC1_SET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC1_SET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC1_SET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_RESET_SEL__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC1_RESET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC1_RESET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC1_RESET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_SET_SEL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC2_SET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC2_SET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC2_SET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_RESET_SEL__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC2_RESET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC2_RESET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC2_RESET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_SET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_SET_SEL__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_SET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC3_SET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_SET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC3_SET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_SET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC3_SET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_RESET_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_RESET_SEL__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_RESET_SEL__SIZE
CYFLD_UDB_P_U_PLD1_MC3_RESET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_RESET_SEL_DISABLE
CYVAL_UDB_P_U_PLD1_MC3_RESET_SEL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_RESET_SEL_ENABLE
CYVAL_UDB_P_U_PLD1_MC3_RESET_SEL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_PLD_MC_CFG_BYPASS
CYREG_UDB_P0_U0_PLD_MC_CFG_BYPASS EQU 0x400f303e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD0_MC0_BYPASS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC0_BYPASS__SIZE
CYFLD_UDB_P_U_PLD0_MC0_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD0_MC0_BYPASS_REGISTER EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC0_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD0_MC0_BYPASS_COMBINATIONAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC1__OFFSET
CYFLD_UDB_P_U_NC1__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC1__SIZE
CYFLD_UDB_P_U_NC1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD0_MC1_BYPASS__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC1_BYPASS__SIZE
CYFLD_UDB_P_U_PLD0_MC1_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD0_MC1_BYPASS_REGISTER EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC1_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD0_MC1_BYPASS_COMBINATIONAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC3__OFFSET
CYFLD_UDB_P_U_NC3__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC3__SIZE
CYFLD_UDB_P_U_NC3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD0_MC2_BYPASS__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC2_BYPASS__SIZE
CYFLD_UDB_P_U_PLD0_MC2_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD0_MC2_BYPASS_REGISTER EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC2_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD0_MC2_BYPASS_COMBINATIONAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC5__OFFSET
CYFLD_UDB_P_U_NC5__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC5__SIZE
CYFLD_UDB_P_U_NC5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD0_MC3_BYPASS__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_MC3_BYPASS__SIZE
CYFLD_UDB_P_U_PLD0_MC3_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD0_MC3_BYPASS_REGISTER EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_MC3_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD0_MC3_BYPASS_COMBINATIONAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC7__OFFSET
CYFLD_UDB_P_U_NC7__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC7__SIZE
CYFLD_UDB_P_U_NC7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD1_MC0_BYPASS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC0_BYPASS__SIZE
CYFLD_UDB_P_U_PLD1_MC0_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD1_MC0_BYPASS_REGISTER EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC0_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD1_MC0_BYPASS_COMBINATIONAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC9__OFFSET
CYFLD_UDB_P_U_NC9__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC9__SIZE
CYFLD_UDB_P_U_NC9__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD1_MC1_BYPASS__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC1_BYPASS__SIZE
CYFLD_UDB_P_U_PLD1_MC1_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD1_MC1_BYPASS_REGISTER EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC1_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD1_MC1_BYPASS_COMBINATIONAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC11__OFFSET
CYFLD_UDB_P_U_NC11__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC11__SIZE
CYFLD_UDB_P_U_NC11__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD1_MC2_BYPASS__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC2_BYPASS__SIZE
CYFLD_UDB_P_U_PLD1_MC2_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD1_MC2_BYPASS_REGISTER EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC2_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD1_MC2_BYPASS_COMBINATIONAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC13__OFFSET
CYFLD_UDB_P_U_NC13__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC13__SIZE
CYFLD_UDB_P_U_NC13__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_BYPASS__OFFSET
CYFLD_UDB_P_U_PLD1_MC3_BYPASS__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_MC3_BYPASS__SIZE
CYFLD_UDB_P_U_PLD1_MC3_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_BYPASS_REGISTER
CYVAL_UDB_P_U_PLD1_MC3_BYPASS_REGISTER EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_MC3_BYPASS_COMBINATIONAL
CYVAL_UDB_P_U_PLD1_MC3_BYPASS_COMBINATIONAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC15__OFFSET
CYFLD_UDB_P_U_NC15__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC15__SIZE
CYFLD_UDB_P_U_NC15__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG0
CYREG_UDB_P0_U0_CFG0 EQU 0x400f3040
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RAD0__OFFSET
CYFLD_UDB_P_U_RAD0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RAD0__SIZE
CYFLD_UDB_P_U_RAD0__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_OFF
CYVAL_UDB_P_U_RAD0_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN0
CYVAL_UDB_P_U_RAD0_DP_IN0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN1
CYVAL_UDB_P_U_RAD0_DP_IN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN2
CYVAL_UDB_P_U_RAD0_DP_IN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN3
CYVAL_UDB_P_U_RAD0_DP_IN3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN4
CYVAL_UDB_P_U_RAD0_DP_IN4 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_DP_IN5
CYVAL_UDB_P_U_RAD0_DP_IN5 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD0_RESERVED
CYVAL_UDB_P_U_RAD0_RESERVED EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RAD1__OFFSET
CYFLD_UDB_P_U_RAD1__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RAD1__SIZE
CYFLD_UDB_P_U_RAD1__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_OFF
CYVAL_UDB_P_U_RAD1_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN0
CYVAL_UDB_P_U_RAD1_DP_IN0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN1
CYVAL_UDB_P_U_RAD1_DP_IN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN2
CYVAL_UDB_P_U_RAD1_DP_IN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN3
CYVAL_UDB_P_U_RAD1_DP_IN3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN4
CYVAL_UDB_P_U_RAD1_DP_IN4 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_DP_IN5
CYVAL_UDB_P_U_RAD1_DP_IN5 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD1_RESERVED
CYVAL_UDB_P_U_RAD1_RESERVED EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG1
CYREG_UDB_P0_U0_CFG1 EQU 0x400f3041
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RAD2__OFFSET
CYFLD_UDB_P_U_RAD2__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RAD2__SIZE
CYFLD_UDB_P_U_RAD2__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_OFF
CYVAL_UDB_P_U_RAD2_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN0
CYVAL_UDB_P_U_RAD2_DP_IN0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN1
CYVAL_UDB_P_U_RAD2_DP_IN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN2
CYVAL_UDB_P_U_RAD2_DP_IN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN3
CYVAL_UDB_P_U_RAD2_DP_IN3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN4
CYVAL_UDB_P_U_RAD2_DP_IN4 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_DP_IN5
CYVAL_UDB_P_U_RAD2_DP_IN5 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RAD2_RESERVED
CYVAL_UDB_P_U_RAD2_RESERVED EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS0__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS0__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS0__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS0_DP_IN0_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS0_DP_IN0_ROUTE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS0_DP_IN0_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS0_DP_IN0_BYPASS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS1__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS1__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS1__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS1_DP_IN1_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS1_DP_IN1_ROUTE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS1_DP_IN1_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS1_DP_IN1_BYPASS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS2__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS2__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS2__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS2_DP_IN2_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS2_DP_IN2_ROUTE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS2_DP_IN2_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS2_DP_IN2_BYPASS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS3__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS3__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS3__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS3_DP_IN3_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS3_DP_IN3_ROUTE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS3_DP_IN3_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS3_DP_IN3_BYPASS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS4__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS4__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS4__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS4_DP_IN4_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS4_DP_IN4_ROUTE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS4_DP_IN4_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS4_DP_IN4_BYPASS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG2
CYREG_UDB_P0_U0_CFG2 EQU 0x400f3042
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F0_LD__OFFSET
CYFLD_UDB_P_U_F0_LD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F0_LD__SIZE
CYFLD_UDB_P_U_F0_LD__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_OFF
CYVAL_UDB_P_U_F0_LD_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN0
CYVAL_UDB_P_U_F0_LD_DP_IN0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN1
CYVAL_UDB_P_U_F0_LD_DP_IN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN2
CYVAL_UDB_P_U_F0_LD_DP_IN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN3
CYVAL_UDB_P_U_F0_LD_DP_IN3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN4
CYVAL_UDB_P_U_F0_LD_DP_IN4 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_DP_IN5
CYVAL_UDB_P_U_F0_LD_DP_IN5 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_LD_RESERVED
CYVAL_UDB_P_U_F0_LD_RESERVED EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS5__OFFSET
CYFLD_UDB_P_U_DP_RTE_BYPASS5__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RTE_BYPASS5__SIZE
CYFLD_UDB_P_U_DP_RTE_BYPASS5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS5_DP_IN5_ROUTE
CYVAL_UDB_P_U_DP_RTE_BYPASS5_DP_IN5_ROUTE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RTE_BYPASS5_DP_IN5_BYPASS
CYVAL_UDB_P_U_DP_RTE_BYPASS5_DP_IN5_BYPASS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F1_LD__OFFSET
CYFLD_UDB_P_U_F1_LD__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F1_LD__SIZE
CYFLD_UDB_P_U_F1_LD__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_OFF
CYVAL_UDB_P_U_F1_LD_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN0
CYVAL_UDB_P_U_F1_LD_DP_IN0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN1
CYVAL_UDB_P_U_F1_LD_DP_IN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN2
CYVAL_UDB_P_U_F1_LD_DP_IN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN3
CYVAL_UDB_P_U_F1_LD_DP_IN3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN4
CYVAL_UDB_P_U_F1_LD_DP_IN4 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_DP_IN5
CYVAL_UDB_P_U_F1_LD_DP_IN5 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_LD_RESERVED
CYVAL_UDB_P_U_F1_LD_RESERVED EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG3
CYREG_UDB_P0_U0_CFG3 EQU 0x400f3043
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_D0_LD__OFFSET
CYFLD_UDB_P_U_D0_LD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_D0_LD__SIZE
CYFLD_UDB_P_U_D0_LD__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_OFF
CYVAL_UDB_P_U_D0_LD_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN0
CYVAL_UDB_P_U_D0_LD_DP_IN0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN1
CYVAL_UDB_P_U_D0_LD_DP_IN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN2
CYVAL_UDB_P_U_D0_LD_DP_IN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN3
CYVAL_UDB_P_U_D0_LD_DP_IN3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN4
CYVAL_UDB_P_U_D0_LD_DP_IN4 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_DP_IN5
CYVAL_UDB_P_U_D0_LD_DP_IN5 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D0_LD_RESERVED
CYVAL_UDB_P_U_D0_LD_RESERVED EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_D1_LD__OFFSET
CYFLD_UDB_P_U_D1_LD__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_D1_LD__SIZE
CYFLD_UDB_P_U_D1_LD__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_OFF
CYVAL_UDB_P_U_D1_LD_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN0
CYVAL_UDB_P_U_D1_LD_DP_IN0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN1
CYVAL_UDB_P_U_D1_LD_DP_IN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN2
CYVAL_UDB_P_U_D1_LD_DP_IN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN3
CYVAL_UDB_P_U_D1_LD_DP_IN3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN4
CYVAL_UDB_P_U_D1_LD_DP_IN4 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_DP_IN5
CYVAL_UDB_P_U_D1_LD_DP_IN5 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_D1_LD_RESERVED
CYVAL_UDB_P_U_D1_LD_RESERVED EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG4
CYREG_UDB_P0_U0_CFG4 EQU 0x400f3044
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SI_MUX__OFFSET
CYFLD_UDB_P_U_SI_MUX__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SI_MUX__SIZE
CYFLD_UDB_P_U_SI_MUX__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_OFF
CYVAL_UDB_P_U_SI_MUX_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN0
CYVAL_UDB_P_U_SI_MUX_DP_IN0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN1
CYVAL_UDB_P_U_SI_MUX_DP_IN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN2
CYVAL_UDB_P_U_SI_MUX_DP_IN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN3
CYVAL_UDB_P_U_SI_MUX_DP_IN3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN4
CYVAL_UDB_P_U_SI_MUX_DP_IN4 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_DP_IN5
CYVAL_UDB_P_U_SI_MUX_DP_IN5 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_MUX_RESERVED
CYVAL_UDB_P_U_SI_MUX_RESERVED EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CI_MUX__OFFSET
CYFLD_UDB_P_U_CI_MUX__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CI_MUX__SIZE
CYFLD_UDB_P_U_CI_MUX__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_OFF
CYVAL_UDB_P_U_CI_MUX_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN0
CYVAL_UDB_P_U_CI_MUX_DP_IN0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN1
CYVAL_UDB_P_U_CI_MUX_DP_IN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN2
CYVAL_UDB_P_U_CI_MUX_DP_IN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN3
CYVAL_UDB_P_U_CI_MUX_DP_IN3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN4
CYVAL_UDB_P_U_CI_MUX_DP_IN4 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_DP_IN5
CYVAL_UDB_P_U_CI_MUX_DP_IN5 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_MUX_RESERVED
CYVAL_UDB_P_U_CI_MUX_RESERVED EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG5
CYREG_UDB_P0_U0_CFG5 EQU 0x400f3045
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT0__OFFSET
CYFLD_UDB_P_U_OUT0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT0__SIZE
CYFLD_UDB_P_U_OUT0__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CE0
CYVAL_UDB_P_U_OUT0_CE0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CL0
CYVAL_UDB_P_U_OUT0_CL0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_Z0
CYVAL_UDB_P_U_OUT0_Z0 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_FF0
CYVAL_UDB_P_U_OUT0_FF0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CE1
CYVAL_UDB_P_U_OUT0_CE1 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CL1
CYVAL_UDB_P_U_OUT0_CL1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_Z1
CYVAL_UDB_P_U_OUT0_Z1 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_FF1
CYVAL_UDB_P_U_OUT0_FF1 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_OV_MSB
CYVAL_UDB_P_U_OUT0_OV_MSB EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CO_MSB
CYVAL_UDB_P_U_OUT0_CO_MSB EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_CMSBO
CYVAL_UDB_P_U_OUT0_CMSBO EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_SO
CYVAL_UDB_P_U_OUT0_SO EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_F0_BLK_STAT
CYVAL_UDB_P_U_OUT0_F0_BLK_STAT EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_F1_BLK_STAT
CYVAL_UDB_P_U_OUT0_F1_BLK_STAT EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_F0_BUS_STAT
CYVAL_UDB_P_U_OUT0_F0_BUS_STAT EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT0_F1_BUS_STAT
CYVAL_UDB_P_U_OUT0_F1_BUS_STAT EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT1__OFFSET
CYFLD_UDB_P_U_OUT1__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT1__SIZE
CYFLD_UDB_P_U_OUT1__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CE0
CYVAL_UDB_P_U_OUT1_CE0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CL0
CYVAL_UDB_P_U_OUT1_CL0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_Z0
CYVAL_UDB_P_U_OUT1_Z0 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_FF0
CYVAL_UDB_P_U_OUT1_FF0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CE1
CYVAL_UDB_P_U_OUT1_CE1 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CL1
CYVAL_UDB_P_U_OUT1_CL1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_Z1
CYVAL_UDB_P_U_OUT1_Z1 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_FF1
CYVAL_UDB_P_U_OUT1_FF1 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_OV_MSB
CYVAL_UDB_P_U_OUT1_OV_MSB EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CO_MSB
CYVAL_UDB_P_U_OUT1_CO_MSB EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_CMSBO
CYVAL_UDB_P_U_OUT1_CMSBO EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_SO
CYVAL_UDB_P_U_OUT1_SO EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_F0_BLK_STAT
CYVAL_UDB_P_U_OUT1_F0_BLK_STAT EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_F1_BLK_STAT
CYVAL_UDB_P_U_OUT1_F1_BLK_STAT EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_F0_BUS_STAT
CYVAL_UDB_P_U_OUT1_F0_BUS_STAT EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT1_F1_BUS_STAT
CYVAL_UDB_P_U_OUT1_F1_BUS_STAT EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG6
CYREG_UDB_P0_U0_CFG6 EQU 0x400f3046
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT2__OFFSET
CYFLD_UDB_P_U_OUT2__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT2__SIZE
CYFLD_UDB_P_U_OUT2__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CE0
CYVAL_UDB_P_U_OUT2_CE0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CL0
CYVAL_UDB_P_U_OUT2_CL0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_Z0
CYVAL_UDB_P_U_OUT2_Z0 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_FF0
CYVAL_UDB_P_U_OUT2_FF0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CE1
CYVAL_UDB_P_U_OUT2_CE1 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CL1
CYVAL_UDB_P_U_OUT2_CL1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_Z1
CYVAL_UDB_P_U_OUT2_Z1 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_FF1
CYVAL_UDB_P_U_OUT2_FF1 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_OV_MSB
CYVAL_UDB_P_U_OUT2_OV_MSB EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CO_MSB
CYVAL_UDB_P_U_OUT2_CO_MSB EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_CMSBO
CYVAL_UDB_P_U_OUT2_CMSBO EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_SO
CYVAL_UDB_P_U_OUT2_SO EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_F0_BLK_STAT
CYVAL_UDB_P_U_OUT2_F0_BLK_STAT EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_F1_BLK_STAT
CYVAL_UDB_P_U_OUT2_F1_BLK_STAT EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_F0_BUS_STAT
CYVAL_UDB_P_U_OUT2_F0_BUS_STAT EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT2_F1_BUS_STAT
CYVAL_UDB_P_U_OUT2_F1_BUS_STAT EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT3__OFFSET
CYFLD_UDB_P_U_OUT3__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT3__SIZE
CYFLD_UDB_P_U_OUT3__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CE0
CYVAL_UDB_P_U_OUT3_CE0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CL0
CYVAL_UDB_P_U_OUT3_CL0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_Z0
CYVAL_UDB_P_U_OUT3_Z0 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_FF0
CYVAL_UDB_P_U_OUT3_FF0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CE1
CYVAL_UDB_P_U_OUT3_CE1 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CL1
CYVAL_UDB_P_U_OUT3_CL1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_Z1
CYVAL_UDB_P_U_OUT3_Z1 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_FF1
CYVAL_UDB_P_U_OUT3_FF1 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_OV_MSB
CYVAL_UDB_P_U_OUT3_OV_MSB EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CO_MSB
CYVAL_UDB_P_U_OUT3_CO_MSB EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_CMSBO
CYVAL_UDB_P_U_OUT3_CMSBO EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_SO
CYVAL_UDB_P_U_OUT3_SO EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_F0_BLK_STAT
CYVAL_UDB_P_U_OUT3_F0_BLK_STAT EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_F1_BLK_STAT
CYVAL_UDB_P_U_OUT3_F1_BLK_STAT EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_F0_BUS_STAT
CYVAL_UDB_P_U_OUT3_F0_BUS_STAT EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT3_F1_BUS_STAT
CYVAL_UDB_P_U_OUT3_F1_BUS_STAT EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG7
CYREG_UDB_P0_U0_CFG7 EQU 0x400f3047
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT4__OFFSET
CYFLD_UDB_P_U_OUT4__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT4__SIZE
CYFLD_UDB_P_U_OUT4__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CE0
CYVAL_UDB_P_U_OUT4_CE0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CL0
CYVAL_UDB_P_U_OUT4_CL0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_Z0
CYVAL_UDB_P_U_OUT4_Z0 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_FF0
CYVAL_UDB_P_U_OUT4_FF0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CE1
CYVAL_UDB_P_U_OUT4_CE1 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CL1
CYVAL_UDB_P_U_OUT4_CL1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_Z1
CYVAL_UDB_P_U_OUT4_Z1 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_FF1
CYVAL_UDB_P_U_OUT4_FF1 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_OV_MSB
CYVAL_UDB_P_U_OUT4_OV_MSB EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CO_MSB
CYVAL_UDB_P_U_OUT4_CO_MSB EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_CMSBO
CYVAL_UDB_P_U_OUT4_CMSBO EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_SO
CYVAL_UDB_P_U_OUT4_SO EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_F0_BLK_STAT
CYVAL_UDB_P_U_OUT4_F0_BLK_STAT EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_F1_BLK_STAT
CYVAL_UDB_P_U_OUT4_F1_BLK_STAT EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_F0_BUS_STAT
CYVAL_UDB_P_U_OUT4_F0_BUS_STAT EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT4_F1_BUS_STAT
CYVAL_UDB_P_U_OUT4_F1_BUS_STAT EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT5__OFFSET
CYFLD_UDB_P_U_OUT5__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT5__SIZE
CYFLD_UDB_P_U_OUT5__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CE0
CYVAL_UDB_P_U_OUT5_CE0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CL0
CYVAL_UDB_P_U_OUT5_CL0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_Z0
CYVAL_UDB_P_U_OUT5_Z0 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_FF0
CYVAL_UDB_P_U_OUT5_FF0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CE1
CYVAL_UDB_P_U_OUT5_CE1 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CL1
CYVAL_UDB_P_U_OUT5_CL1 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_Z1
CYVAL_UDB_P_U_OUT5_Z1 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_FF1
CYVAL_UDB_P_U_OUT5_FF1 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_OV_MSB
CYVAL_UDB_P_U_OUT5_OV_MSB EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CO_MSB
CYVAL_UDB_P_U_OUT5_CO_MSB EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_CMSBO
CYVAL_UDB_P_U_OUT5_CMSBO EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_SO
CYVAL_UDB_P_U_OUT5_SO EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_F0_BLK_STAT
CYVAL_UDB_P_U_OUT5_F0_BLK_STAT EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_F1_BLK_STAT
CYVAL_UDB_P_U_OUT5_F1_BLK_STAT EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_F0_BUS_STAT
CYVAL_UDB_P_U_OUT5_F0_BUS_STAT EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT5_F1_BUS_STAT
CYVAL_UDB_P_U_OUT5_F1_BUS_STAT EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG8
CYREG_UDB_P0_U0_CFG8 EQU 0x400f3048
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT_SYNC__OFFSET
CYFLD_UDB_P_U_OUT_SYNC__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_OUT_SYNC__SIZE
CYFLD_UDB_P_U_OUT_SYNC__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT_SYNC_REGISTERED
CYVAL_UDB_P_U_OUT_SYNC_REGISTERED EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_OUT_SYNC_COMBINATIONAL
CYVAL_UDB_P_U_OUT_SYNC_COMBINATIONAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC6__OFFSET
CYFLD_UDB_P_U_NC6__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC6__SIZE
CYFLD_UDB_P_U_NC6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG9
CYREG_UDB_P0_U0_CFG9 EQU 0x400f3049
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_AMASK__OFFSET
CYFLD_UDB_P_U_AMASK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_AMASK__SIZE
CYFLD_UDB_P_U_AMASK__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG10
CYREG_UDB_P0_U0_CFG10 EQU 0x400f304a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK0__OFFSET
CYFLD_UDB_P_U_CMASK0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK0__SIZE
CYFLD_UDB_P_U_CMASK0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG11
CYREG_UDB_P0_U0_CFG11 EQU 0x400f304b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG12
CYREG_UDB_P0_U0_CFG12 EQU 0x400f304c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SELA__OFFSET
CYFLD_UDB_P_U_SI_SELA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SELA__SIZE
CYFLD_UDB_P_U_SI_SELA__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELA_DEFAULT
CYVAL_UDB_P_U_SI_SELA_DEFAULT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELA_REGISTERED
CYVAL_UDB_P_U_SI_SELA_REGISTERED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELA_ROUTE
CYVAL_UDB_P_U_SI_SELA_ROUTE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELA_CHAIN
CYVAL_UDB_P_U_SI_SELA_CHAIN EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SELB__OFFSET
CYFLD_UDB_P_U_SI_SELB__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SELB__SIZE
CYFLD_UDB_P_U_SI_SELB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELB_DEFAULT
CYVAL_UDB_P_U_SI_SELB_DEFAULT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELB_REGISTERED
CYVAL_UDB_P_U_SI_SELB_REGISTERED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELB_ROUTE
CYVAL_UDB_P_U_SI_SELB_ROUTE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SELB_CHAIN
CYVAL_UDB_P_U_SI_SELB_CHAIN EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DEF_SI__OFFSET
CYFLD_UDB_P_U_DEF_SI__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DEF_SI__SIZE
CYFLD_UDB_P_U_DEF_SI__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DEF_SI_DEFAULT_0
CYVAL_UDB_P_U_DEF_SI_DEFAULT_0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DEF_SI_DEFAULT_1
CYVAL_UDB_P_U_DEF_SI_DEFAULT_1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_AMASK_EN__OFFSET
CYFLD_UDB_P_U_AMASK_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_AMASK_EN__SIZE
CYFLD_UDB_P_U_AMASK_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_AMASK_EN_DISABLE
CYVAL_UDB_P_U_AMASK_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_AMASK_EN_ENABLE
CYVAL_UDB_P_U_AMASK_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK0_EN__OFFSET
CYFLD_UDB_P_U_CMASK0_EN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK0_EN__SIZE
CYFLD_UDB_P_U_CMASK0_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMASK0_EN_DISABLE
CYVAL_UDB_P_U_CMASK0_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMASK0_EN_ENABLE
CYVAL_UDB_P_U_CMASK0_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK1_EN__OFFSET
CYFLD_UDB_P_U_CMASK1_EN__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMASK1_EN__SIZE
CYFLD_UDB_P_U_CMASK1_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMASK1_EN_DISABLE
CYVAL_UDB_P_U_CMASK1_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMASK1_EN_ENABLE
CYVAL_UDB_P_U_CMASK1_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG13
CYREG_UDB_P0_U0_CFG13 EQU 0x400f304d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SELA__OFFSET
CYFLD_UDB_P_U_CI_SELA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SELA__SIZE
CYFLD_UDB_P_U_CI_SELA__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELA_DEFAULT
CYVAL_UDB_P_U_CI_SELA_DEFAULT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELA_REGISTERED
CYVAL_UDB_P_U_CI_SELA_REGISTERED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELA_ROUTE
CYVAL_UDB_P_U_CI_SELA_ROUTE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELA_CHAIN
CYVAL_UDB_P_U_CI_SELA_CHAIN EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SELB__OFFSET
CYFLD_UDB_P_U_CI_SELB__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SELB__SIZE
CYFLD_UDB_P_U_CI_SELB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELB_DEFAULT
CYVAL_UDB_P_U_CI_SELB_DEFAULT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELB_REGISTERED
CYVAL_UDB_P_U_CI_SELB_REGISTERED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELB_ROUTE
CYVAL_UDB_P_U_CI_SELB_ROUTE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SELB_CHAIN
CYVAL_UDB_P_U_CI_SELB_CHAIN EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SELA__OFFSET
CYFLD_UDB_P_U_CMP_SELA__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SELA__SIZE
CYFLD_UDB_P_U_CMP_SELA__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELA_A1_D1
CYVAL_UDB_P_U_CMP_SELA_A1_D1 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELA_A1_A0
CYVAL_UDB_P_U_CMP_SELA_A1_A0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELA_A0_D1
CYVAL_UDB_P_U_CMP_SELA_A0_D1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELA_A0_A0
CYVAL_UDB_P_U_CMP_SELA_A0_A0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SELB__OFFSET
CYFLD_UDB_P_U_CMP_SELB__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SELB__SIZE
CYFLD_UDB_P_U_CMP_SELB__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELB_A1_D1
CYVAL_UDB_P_U_CMP_SELB_A1_D1 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELB_A1_A0
CYVAL_UDB_P_U_CMP_SELB_A1_A0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELB_A0_D1
CYVAL_UDB_P_U_CMP_SELB_A0_D1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SELB_A0_A0
CYVAL_UDB_P_U_CMP_SELB_A0_A0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG14
CYREG_UDB_P0_U0_CFG14 EQU 0x400f304e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN0__OFFSET
CYFLD_UDB_P_U_CHAIN0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN0__SIZE
CYFLD_UDB_P_U_CHAIN0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN0_DISABLE
CYVAL_UDB_P_U_CHAIN0_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN0_ENABLE
CYVAL_UDB_P_U_CHAIN0_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN1__OFFSET
CYFLD_UDB_P_U_CHAIN1__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN1__SIZE
CYFLD_UDB_P_U_CHAIN1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN1_DISABLE
CYVAL_UDB_P_U_CHAIN1_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN1_ENABLE
CYVAL_UDB_P_U_CHAIN1_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN_FB__OFFSET
CYFLD_UDB_P_U_CHAIN_FB__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN_FB__SIZE
CYFLD_UDB_P_U_CHAIN_FB__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN_FB_DISABLE
CYVAL_UDB_P_U_CHAIN_FB_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN_FB_ENABLE
CYVAL_UDB_P_U_CHAIN_FB_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN_CMSB__OFFSET
CYFLD_UDB_P_U_CHAIN_CMSB__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CHAIN_CMSB__SIZE
CYFLD_UDB_P_U_CHAIN_CMSB__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN_CMSB_DISABLE
CYVAL_UDB_P_U_CHAIN_CMSB_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CHAIN_CMSB_ENABLE
CYVAL_UDB_P_U_CHAIN_CMSB_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_SEL__OFFSET
CYFLD_UDB_P_U_MSB_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_SEL__SIZE
CYFLD_UDB_P_U_MSB_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT0
CYVAL_UDB_P_U_MSB_SEL_BIT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT1
CYVAL_UDB_P_U_MSB_SEL_BIT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT2
CYVAL_UDB_P_U_MSB_SEL_BIT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT3
CYVAL_UDB_P_U_MSB_SEL_BIT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT4
CYVAL_UDB_P_U_MSB_SEL_BIT4 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT5
CYVAL_UDB_P_U_MSB_SEL_BIT5 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT6
CYVAL_UDB_P_U_MSB_SEL_BIT6 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SEL_BIT7
CYVAL_UDB_P_U_MSB_SEL_BIT7 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_EN__OFFSET
CYFLD_UDB_P_U_MSB_EN__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_EN__SIZE
CYFLD_UDB_P_U_MSB_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_EN_DISABLE
CYVAL_UDB_P_U_MSB_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_EN_ENABLE
CYVAL_UDB_P_U_MSB_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG15
CYREG_UDB_P0_U0_CFG15 EQU 0x400f304f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F0_INSEL__OFFSET
CYFLD_UDB_P_U_F0_INSEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F0_INSEL__SIZE
CYFLD_UDB_P_U_F0_INSEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_INSEL_INPUT
CYVAL_UDB_P_U_F0_INSEL_INPUT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_INSEL_OUTPUT_A0
CYVAL_UDB_P_U_F0_INSEL_OUTPUT_A0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_INSEL_OUTPUT_A1
CYVAL_UDB_P_U_F0_INSEL_OUTPUT_A1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_INSEL_OUTPUT_ALU
CYVAL_UDB_P_U_F0_INSEL_OUTPUT_ALU EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F1_INSEL__OFFSET
CYFLD_UDB_P_U_F1_INSEL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F1_INSEL__SIZE
CYFLD_UDB_P_U_F1_INSEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_INSEL_INPUT
CYVAL_UDB_P_U_F1_INSEL_INPUT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_INSEL_OUTPUT_A0
CYVAL_UDB_P_U_F1_INSEL_OUTPUT_A0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_INSEL_OUTPUT_A1
CYVAL_UDB_P_U_F1_INSEL_OUTPUT_A1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_INSEL_OUTPUT_ALU
CYVAL_UDB_P_U_F1_INSEL_OUTPUT_ALU EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_SI__OFFSET
CYFLD_UDB_P_U_MSB_SI__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_MSB_SI__SIZE
CYFLD_UDB_P_U_MSB_SI__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SI_DEFAULT
CYVAL_UDB_P_U_MSB_SI_DEFAULT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_MSB_SI_MSB
CYVAL_UDB_P_U_MSB_SI_MSB EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PI_DYN__OFFSET
CYFLD_UDB_P_U_PI_DYN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PI_DYN__SIZE
CYFLD_UDB_P_U_PI_DYN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PI_DYN_DISABLE
CYVAL_UDB_P_U_PI_DYN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PI_DYN_ENABLE
CYVAL_UDB_P_U_PI_DYN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SHIFT_SEL__OFFSET
CYFLD_UDB_P_U_SHIFT_SEL__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SHIFT_SEL__SIZE
CYFLD_UDB_P_U_SHIFT_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_SEL_SOL_MSB
CYVAL_UDB_P_U_SHIFT_SEL_SOL_MSB EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_SEL_SOR
CYVAL_UDB_P_U_SHIFT_SEL_SOR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PI_SEL__OFFSET
CYFLD_UDB_P_U_PI_SEL__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PI_SEL__SIZE
CYFLD_UDB_P_U_PI_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PI_SEL_NORMAL
CYVAL_UDB_P_U_PI_SEL_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PI_SEL_PARALLEL
CYVAL_UDB_P_U_PI_SEL_PARALLEL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG16
CYREG_UDB_P0_U0_CFG16 EQU 0x400f3050
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_WRK16_CONCAT__OFFSET
CYFLD_UDB_P_U_WRK16_CONCAT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_WRK16_CONCAT__SIZE
CYFLD_UDB_P_U_WRK16_CONCAT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_WRK16_CONCAT_DEFAULT
CYVAL_UDB_P_U_WRK16_CONCAT_DEFAULT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_WRK16_CONCAT_CONCATENATE
CYVAL_UDB_P_U_WRK16_CONCAT_CONCATENATE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_CRCPRS__OFFSET
CYFLD_UDB_P_U_EXT_CRCPRS__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_CRCPRS__SIZE
CYFLD_UDB_P_U_EXT_CRCPRS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CRCPRS_INTERNAL
CYVAL_UDB_P_U_EXT_CRCPRS_INTERNAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CRCPRS_EXTERNAL
CYVAL_UDB_P_U_EXT_CRCPRS_EXTERNAL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_ASYNC__OFFSET
CYFLD_UDB_P_U_FIFO_ASYNC__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_ASYNC__SIZE
CYFLD_UDB_P_U_FIFO_ASYNC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_ASYNC_DISABLE
CYVAL_UDB_P_U_FIFO_ASYNC_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_ASYNC_ENABLE
CYVAL_UDB_P_U_FIFO_ASYNC_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_EDGE__OFFSET
CYFLD_UDB_P_U_FIFO_EDGE__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_EDGE__SIZE
CYFLD_UDB_P_U_FIFO_EDGE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_EDGE_LEVEL
CYVAL_UDB_P_U_FIFO_EDGE_LEVEL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_EDGE_EDGE
CYVAL_UDB_P_U_FIFO_EDGE_EDGE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_CAP__OFFSET
CYFLD_UDB_P_U_FIFO_CAP__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_CAP__SIZE
CYFLD_UDB_P_U_FIFO_CAP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_CAP_DISABLE
CYVAL_UDB_P_U_FIFO_CAP_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_CAP_ENABLE
CYVAL_UDB_P_U_FIFO_CAP_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_FAST__OFFSET
CYFLD_UDB_P_U_FIFO_FAST__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_FAST__SIZE
CYFLD_UDB_P_U_FIFO_FAST__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_FAST_DISABLE
CYVAL_UDB_P_U_FIFO_FAST_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_FAST_ENABLE
CYVAL_UDB_P_U_FIFO_FAST_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F0_CK_INV__OFFSET
CYFLD_UDB_P_U_F0_CK_INV__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F0_CK_INV__SIZE
CYFLD_UDB_P_U_F0_CK_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_CK_INV_NORMAL
CYVAL_UDB_P_U_F0_CK_INV_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_CK_INV_INVERT
CYVAL_UDB_P_U_F0_CK_INV_INVERT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F1_CK_INV__OFFSET
CYFLD_UDB_P_U_F1_CK_INV__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F1_CK_INV__SIZE
CYFLD_UDB_P_U_F1_CK_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_CK_INV_NORMAL
CYVAL_UDB_P_U_F1_CK_INV_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_CK_INV_INVERT
CYVAL_UDB_P_U_F1_CK_INV_INVERT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG17
CYREG_UDB_P0_U0_CFG17 EQU 0x400f3051
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F0_DYN__OFFSET
CYFLD_UDB_P_U_F0_DYN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F0_DYN__SIZE
CYFLD_UDB_P_U_F0_DYN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_DYN_STATIC
CYVAL_UDB_P_U_F0_DYN_STATIC EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F0_DYN_DYNAMIC
CYVAL_UDB_P_U_F0_DYN_DYNAMIC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F1_DYN__OFFSET
CYFLD_UDB_P_U_F1_DYN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_F1_DYN__SIZE
CYFLD_UDB_P_U_F1_DYN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_DYN_STATIC
CYVAL_UDB_P_U_F1_DYN_STATIC EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_F1_DYN_DYNAMIC
CYVAL_UDB_P_U_F1_DYN_DYNAMIC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC2__OFFSET
CYFLD_UDB_P_U_NC2__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC2__SIZE
CYFLD_UDB_P_U_NC2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_ADD_SYNC__OFFSET
CYFLD_UDB_P_U_FIFO_ADD_SYNC__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FIFO_ADD_SYNC__SIZE
CYFLD_UDB_P_U_FIFO_ADD_SYNC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_ADD_SYNC_DISABLE
CYVAL_UDB_P_U_FIFO_ADD_SYNC_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FIFO_ADD_SYNC_ENABLE
CYVAL_UDB_P_U_FIFO_ADD_SYNC_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG18
CYREG_UDB_P0_U0_CFG18 EQU 0x400f3052
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CTL_MD0__OFFSET
CYFLD_UDB_P_U_CTL_MD0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CTL_MD0__SIZE
CYFLD_UDB_P_U_CTL_MD0__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD0_DIRECT
CYVAL_UDB_P_U_CTL_MD0_DIRECT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD0_SYNC
CYVAL_UDB_P_U_CTL_MD0_SYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD0_DOUBLE_SYNC
CYVAL_UDB_P_U_CTL_MD0_DOUBLE_SYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD0_PULSE
CYVAL_UDB_P_U_CTL_MD0_PULSE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG19
CYREG_UDB_P0_U0_CFG19 EQU 0x400f3053
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CTL_MD1__OFFSET
CYFLD_UDB_P_U_CTL_MD1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CTL_MD1__SIZE
CYFLD_UDB_P_U_CTL_MD1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD1_DIRECT
CYVAL_UDB_P_U_CTL_MD1_DIRECT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD1_SYNC
CYVAL_UDB_P_U_CTL_MD1_SYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD1_DOUBLE_SYNC
CYVAL_UDB_P_U_CTL_MD1_DOUBLE_SYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CTL_MD1_PULSE
CYVAL_UDB_P_U_CTL_MD1_PULSE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG20
CYREG_UDB_P0_U0_CFG20 EQU 0x400f3054
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_STAT_MD__OFFSET
CYFLD_UDB_P_U_STAT_MD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_STAT_MD__SIZE
CYFLD_UDB_P_U_STAT_MD__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG21
CYREG_UDB_P0_U0_CFG21 EQU 0x400f3055
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC0__OFFSET
CYFLD_UDB_P_U_NC0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_NC0__SIZE
CYFLD_UDB_P_U_NC0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG22
CYREG_UDB_P0_U0_CFG22 EQU 0x400f3056
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_OUT_CTL__OFFSET
CYFLD_UDB_P_U_SC_OUT_CTL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_OUT_CTL__SIZE
CYFLD_UDB_P_U_SC_OUT_CTL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_OUT_CTL_CONTROL
CYVAL_UDB_P_U_SC_OUT_CTL_CONTROL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_OUT_CTL_PARALLEL
CYVAL_UDB_P_U_SC_OUT_CTL_PARALLEL EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_OUT_CTL_COUNTER
CYVAL_UDB_P_U_SC_OUT_CTL_COUNTER EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_OUT_CTL_RESERVED
CYVAL_UDB_P_U_SC_OUT_CTL_RESERVED EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_INT_MD__OFFSET
CYFLD_UDB_P_U_SC_INT_MD__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_INT_MD__SIZE
CYFLD_UDB_P_U_SC_INT_MD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_INT_MD_NORMAL
CYVAL_UDB_P_U_SC_INT_MD_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_INT_MD_INT_MODE
CYVAL_UDB_P_U_SC_INT_MD_INT_MODE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_SYNC_MD__OFFSET
CYFLD_UDB_P_U_SC_SYNC_MD__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_SYNC_MD__SIZE
CYFLD_UDB_P_U_SC_SYNC_MD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_SYNC_MD_NORMAL
CYVAL_UDB_P_U_SC_SYNC_MD_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_SYNC_MD_SYNC_MODE
CYVAL_UDB_P_U_SC_SYNC_MD_SYNC_MODE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_EXT_RES__OFFSET
CYFLD_UDB_P_U_SC_EXT_RES__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_EXT_RES__SIZE
CYFLD_UDB_P_U_SC_EXT_RES__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_EXT_RES_DISABLED
CYVAL_UDB_P_U_SC_EXT_RES_DISABLED EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_EXT_RES_ENABLED
CYVAL_UDB_P_U_SC_EXT_RES_ENABLED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG23
CYREG_UDB_P0_U0_CFG23 EQU 0x400f3057
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CNT_LD_SEL__OFFSET
CYFLD_UDB_P_U_CNT_LD_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CNT_LD_SEL__SIZE
CYFLD_UDB_P_U_CNT_LD_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN0
CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN1
CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN2
CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN3
CYVAL_UDB_P_U_CNT_LD_SEL_SC_IN3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CNT_EN_SEL__OFFSET
CYFLD_UDB_P_U_CNT_EN_SEL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CNT_EN_SEL__SIZE
CYFLD_UDB_P_U_CNT_EN_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN4
CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN4 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN5
CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN5 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN6
CYVAL_UDB_P_U_CNT_EN_SEL_SC_IN6 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CNT_EN_SEL_SC_IO
CYVAL_UDB_P_U_CNT_EN_SEL_SC_IO EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_ROUTE_LD__OFFSET
CYFLD_UDB_P_U_ROUTE_LD__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_ROUTE_LD__SIZE
CYFLD_UDB_P_U_ROUTE_LD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_ROUTE_LD_DISABLE
CYVAL_UDB_P_U_ROUTE_LD_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_ROUTE_LD_ROUTED
CYVAL_UDB_P_U_ROUTE_LD_ROUTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_ROUTE_EN__OFFSET
CYFLD_UDB_P_U_ROUTE_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_ROUTE_EN__SIZE
CYFLD_UDB_P_U_ROUTE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_ROUTE_EN_DISABLE
CYVAL_UDB_P_U_ROUTE_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_ROUTE_EN_ROUTED
CYVAL_UDB_P_U_ROUTE_EN_ROUTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_ALT_CNT__OFFSET
CYFLD_UDB_P_U_ALT_CNT__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_ALT_CNT__SIZE
CYFLD_UDB_P_U_ALT_CNT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_ALT_CNT_DEFAULT_MODE
CYVAL_UDB_P_U_ALT_CNT_DEFAULT_MODE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_ALT_CNT_ALT_MODE
CYVAL_UDB_P_U_ALT_CNT_ALT_MODE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG24
CYREG_UDB_P0_U0_CFG24 EQU 0x400f3058
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_SEL__OFFSET
CYFLD_UDB_P_U_RC_EN_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_SEL__SIZE
CYFLD_UDB_P_U_RC_EN_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_SEL_RC_IN0
CYVAL_UDB_P_U_RC_EN_SEL_RC_IN0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_SEL_RC_IN1
CYVAL_UDB_P_U_RC_EN_SEL_RC_IN1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_SEL_RC_IN2
CYVAL_UDB_P_U_RC_EN_SEL_RC_IN2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_SEL_RC_IN3
CYVAL_UDB_P_U_RC_EN_SEL_RC_IN3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_MODE__OFFSET
CYFLD_UDB_P_U_RC_EN_MODE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_MODE__SIZE
CYFLD_UDB_P_U_RC_EN_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_MODE_OFF
CYVAL_UDB_P_U_RC_EN_MODE_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_MODE_ON
CYVAL_UDB_P_U_RC_EN_MODE_ON EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_MODE_POSEDGE
CYVAL_UDB_P_U_RC_EN_MODE_POSEDGE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_MODE_LEVEL
CYVAL_UDB_P_U_RC_EN_MODE_LEVEL EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_INV__OFFSET
CYFLD_UDB_P_U_RC_EN_INV__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_EN_INV__SIZE
CYFLD_UDB_P_U_RC_EN_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_INV_NOINV
CYVAL_UDB_P_U_RC_EN_INV_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_EN_INV_INVERT
CYVAL_UDB_P_U_RC_EN_INV_INVERT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_INV__OFFSET
CYFLD_UDB_P_U_RC_INV__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_INV__SIZE
CYFLD_UDB_P_U_RC_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_INV_NOINV
CYVAL_UDB_P_U_RC_INV_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RC_INV_INVERT
CYVAL_UDB_P_U_RC_INV_INVERT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_RES_SEL0_OR_FRES__OFFSET
CYFLD_UDB_P_U_RC_RES_SEL0_OR_FRES__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_RES_SEL0_OR_FRES__SIZE
CYFLD_UDB_P_U_RC_RES_SEL0_OR_FRES__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_RES_SEL1__OFFSET
CYFLD_UDB_P_U_RC_RES_SEL1__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RC_RES_SEL1__SIZE
CYFLD_UDB_P_U_RC_RES_SEL1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG25
CYREG_UDB_P0_U0_CFG25 EQU 0x400f3059
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG26
CYREG_UDB_P0_U0_CFG26 EQU 0x400f305a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG27
CYREG_UDB_P0_U0_CFG27 EQU 0x400f305b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG28
CYREG_UDB_P0_U0_CFG28 EQU 0x400f305c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_CK_SEL__OFFSET
CYFLD_UDB_P_U_PLD0_CK_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_CK_SEL__SIZE
CYFLD_UDB_P_U_PLD0_CK_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK0
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK1
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK2
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK3
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK4
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK4 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK5
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK5 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK6
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK6 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK7
CYVAL_UDB_P_U_PLD0_CK_SEL_GCLK7 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_EXT_CLK
CYVAL_UDB_P_U_PLD0_CK_SEL_EXT_CLK EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_CK_SEL_SYSCLK
CYVAL_UDB_P_U_PLD0_CK_SEL_SYSCLK EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_CK_SEL__OFFSET
CYFLD_UDB_P_U_PLD1_CK_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_CK_SEL__SIZE
CYFLD_UDB_P_U_PLD1_CK_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK0
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK1
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK2
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK3
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK4
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK4 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK5
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK5 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK6
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK6 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK7
CYVAL_UDB_P_U_PLD1_CK_SEL_GCLK7 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_EXT_CLK
CYVAL_UDB_P_U_PLD1_CK_SEL_EXT_CLK EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_CK_SEL_SYSCLK
CYVAL_UDB_P_U_PLD1_CK_SEL_SYSCLK EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG29
CYREG_UDB_P0_U0_CFG29 EQU 0x400f305d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_CK_SEL__OFFSET
CYFLD_UDB_P_U_DP_CK_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_CK_SEL__SIZE
CYFLD_UDB_P_U_DP_CK_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK0
CYVAL_UDB_P_U_DP_CK_SEL_GCLK0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK1
CYVAL_UDB_P_U_DP_CK_SEL_GCLK1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK2
CYVAL_UDB_P_U_DP_CK_SEL_GCLK2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK3
CYVAL_UDB_P_U_DP_CK_SEL_GCLK3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK4
CYVAL_UDB_P_U_DP_CK_SEL_GCLK4 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK5
CYVAL_UDB_P_U_DP_CK_SEL_GCLK5 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK6
CYVAL_UDB_P_U_DP_CK_SEL_GCLK6 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_GCLK7
CYVAL_UDB_P_U_DP_CK_SEL_GCLK7 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_EXT_CLK
CYVAL_UDB_P_U_DP_CK_SEL_EXT_CLK EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_CK_SEL_SYSCLK
CYVAL_UDB_P_U_DP_CK_SEL_SYSCLK EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_CK_SEL__OFFSET
CYFLD_UDB_P_U_SC_CK_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_CK_SEL__SIZE
CYFLD_UDB_P_U_SC_CK_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK0
CYVAL_UDB_P_U_SC_CK_SEL_GCLK0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK1
CYVAL_UDB_P_U_SC_CK_SEL_GCLK1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK2
CYVAL_UDB_P_U_SC_CK_SEL_GCLK2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK3
CYVAL_UDB_P_U_SC_CK_SEL_GCLK3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK4
CYVAL_UDB_P_U_SC_CK_SEL_GCLK4 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK5
CYVAL_UDB_P_U_SC_CK_SEL_GCLK5 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK6
CYVAL_UDB_P_U_SC_CK_SEL_GCLK6 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_GCLK7
CYVAL_UDB_P_U_SC_CK_SEL_GCLK7 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_EXT_CLK
CYVAL_UDB_P_U_SC_CK_SEL_EXT_CLK EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_CK_SEL_SYSCLK
CYVAL_UDB_P_U_SC_CK_SEL_SYSCLK EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG30
CYREG_UDB_P0_U0_CFG30 EQU 0x400f305e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RES_SEL__OFFSET
CYFLD_UDB_P_U_RES_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RES_SEL__SIZE
CYFLD_UDB_P_U_RES_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RES_SEL_RC_IN0
CYVAL_UDB_P_U_RES_SEL_RC_IN0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RES_SEL_RC_IN1
CYVAL_UDB_P_U_RES_SEL_RC_IN1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RES_SEL_RC_IN2
CYVAL_UDB_P_U_RES_SEL_RC_IN2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RES_SEL_RC_IN3
CYVAL_UDB_P_U_RES_SEL_RC_IN3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RES_POL__OFFSET
CYFLD_UDB_P_U_RES_POL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_RES_POL__SIZE
CYFLD_UDB_P_U_RES_POL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RES_POL_NEGATED
CYVAL_UDB_P_U_RES_POL_NEGATED EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_RES_POL_ASSERTED
CYVAL_UDB_P_U_RES_POL_ASSERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_CNTCTL__OFFSET
CYFLD_UDB_P_U_EN_RES_CNTCTL__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_CNTCTL__SIZE
CYFLD_UDB_P_U_EN_RES_CNTCTL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_CNTCTL_DISABLE
CYVAL_UDB_P_U_EN_RES_CNTCTL_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_CNTCTL_ENABLE
CYVAL_UDB_P_U_EN_RES_CNTCTL_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_GUDB_WR__OFFSET
CYFLD_UDB_P_U_GUDB_WR__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_GUDB_WR__SIZE
CYFLD_UDB_P_U_GUDB_WR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_GUDB_WR_DISABLE
CYVAL_UDB_P_U_GUDB_WR_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_GUDB_WR_ENABLE
CYVAL_UDB_P_U_GUDB_WR_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RES_POL__OFFSET
CYFLD_UDB_P_U_DP_RES_POL__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_DP_RES_POL__SIZE
CYFLD_UDB_P_U_DP_RES_POL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RES_POL_NOINV
CYVAL_UDB_P_U_DP_RES_POL_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_DP_RES_POL_INVERT
CYVAL_UDB_P_U_DP_RES_POL_INVERT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_RES_POL__OFFSET
CYFLD_UDB_P_U_SC_RES_POL__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SC_RES_POL__SIZE
CYFLD_UDB_P_U_SC_RES_POL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_RES_POL_NOINV
CYVAL_UDB_P_U_SC_RES_POL_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SC_RES_POL_INVERT
CYVAL_UDB_P_U_SC_RES_POL_INVERT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_CFG31
CYREG_UDB_P0_U0_CFG31 EQU 0x400f305f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_ALT_RES__OFFSET
CYFLD_UDB_P_U_ALT_RES__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_ALT_RES__SIZE
CYFLD_UDB_P_U_ALT_RES__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_ALT_RES_COMPATIBLE
CYVAL_UDB_P_U_ALT_RES_COMPATIBLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_ALT_RES_ALTERNATE
CYVAL_UDB_P_U_ALT_RES_ALTERNATE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_SYNC__OFFSET
CYFLD_UDB_P_U_EXT_SYNC__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_SYNC__SIZE
CYFLD_UDB_P_U_EXT_SYNC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_SYNC_DISABLE
CYVAL_UDB_P_U_EXT_SYNC_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_SYNC_ENABLE
CYVAL_UDB_P_U_EXT_SYNC_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_STAT__OFFSET
CYFLD_UDB_P_U_EN_RES_STAT__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_STAT__SIZE
CYFLD_UDB_P_U_EN_RES_STAT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_STAT_NEGATED
CYVAL_UDB_P_U_EN_RES_STAT_NEGATED EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_STAT_ASSERTED
CYVAL_UDB_P_U_EN_RES_STAT_ASSERTED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_DP__OFFSET
CYFLD_UDB_P_U_EN_RES_DP__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EN_RES_DP__SIZE
CYFLD_UDB_P_U_EN_RES_DP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_DP_DISABLE
CYVAL_UDB_P_U_EN_RES_DP_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EN_RES_DP_ENABLE
CYVAL_UDB_P_U_EN_RES_DP_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_CK_SEL__OFFSET
CYFLD_UDB_P_U_EXT_CK_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_EXT_CK_SEL__SIZE
CYFLD_UDB_P_U_EXT_CK_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN0
CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN1
CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN2
CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN3
CYVAL_UDB_P_U_EXT_CK_SEL_RC_IN3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_RES_POL__OFFSET
CYFLD_UDB_P_U_PLD0_RES_POL__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD0_RES_POL__SIZE
CYFLD_UDB_P_U_PLD0_RES_POL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_RES_POL_NOINV
CYVAL_UDB_P_U_PLD0_RES_POL_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD0_RES_POL_INVERT
CYVAL_UDB_P_U_PLD0_RES_POL_INVERT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_RES_POL__OFFSET
CYFLD_UDB_P_U_PLD1_RES_POL__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_PLD1_RES_POL__SIZE
CYFLD_UDB_P_U_PLD1_RES_POL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_RES_POL_NOINV
CYVAL_UDB_P_U_PLD1_RES_POL_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_PLD1_RES_POL_INVERT
CYVAL_UDB_P_U_PLD1_RES_POL_INVERT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG0
CYREG_UDB_P0_U0_DCFG0 EQU 0x400f3060
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SEL__OFFSET
CYFLD_UDB_P_U_CMP_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CMP_SEL__SIZE
CYFLD_UDB_P_U_CMP_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SEL_CFG_A
CYVAL_UDB_P_U_CMP_SEL_CFG_A EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CMP_SEL_CFG_B
CYVAL_UDB_P_U_CMP_SEL_CFG_B EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SEL__OFFSET
CYFLD_UDB_P_U_SI_SEL__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SI_SEL__SIZE
CYFLD_UDB_P_U_SI_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SEL_CFG_A
CYVAL_UDB_P_U_SI_SEL_CFG_A EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SI_SEL_CFG_B
CYVAL_UDB_P_U_SI_SEL_CFG_B EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SEL__OFFSET
CYFLD_UDB_P_U_CI_SEL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CI_SEL__SIZE
CYFLD_UDB_P_U_CI_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SEL_CFG_A
CYVAL_UDB_P_U_CI_SEL_CFG_A EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CI_SEL_CFG_B
CYVAL_UDB_P_U_CI_SEL_CFG_B EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CFB_EN__OFFSET
CYFLD_UDB_P_U_CFB_EN__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_CFB_EN__SIZE
CYFLD_UDB_P_U_CFB_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CFB_EN_DISABLE
CYVAL_UDB_P_U_CFB_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_CFB_EN_ENABLE
CYVAL_UDB_P_U_CFB_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_A1_WR_SRC__OFFSET
CYFLD_UDB_P_U_A1_WR_SRC__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_A1_WR_SRC__SIZE
CYFLD_UDB_P_U_A1_WR_SRC__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_A1_WR_SRC_NOWRITE
CYVAL_UDB_P_U_A1_WR_SRC_NOWRITE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_A1_WR_SRC_ALU
CYVAL_UDB_P_U_A1_WR_SRC_ALU EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_A1_WR_SRC_D1
CYVAL_UDB_P_U_A1_WR_SRC_D1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_A1_WR_SRC_F1
CYVAL_UDB_P_U_A1_WR_SRC_F1 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_A0_WR_SRC__OFFSET
CYFLD_UDB_P_U_A0_WR_SRC__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_A0_WR_SRC__SIZE
CYFLD_UDB_P_U_A0_WR_SRC__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_A0_WR_SRC_NOWRITE
CYVAL_UDB_P_U_A0_WR_SRC_NOWRITE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_A0_WR_SRC_ALU
CYVAL_UDB_P_U_A0_WR_SRC_ALU EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_A0_WR_SRC_D0
CYVAL_UDB_P_U_A0_WR_SRC_D0 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_A0_WR_SRC_F0
CYVAL_UDB_P_U_A0_WR_SRC_F0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SHIFT__OFFSET
CYFLD_UDB_P_U_SHIFT__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SHIFT__SIZE
CYFLD_UDB_P_U_SHIFT__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_NOSHIFT
CYVAL_UDB_P_U_SHIFT_NOSHIFT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_LEFT
CYVAL_UDB_P_U_SHIFT_LEFT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_RIGHT
CYVAL_UDB_P_U_SHIFT_RIGHT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SHIFT_SWAP
CYVAL_UDB_P_U_SHIFT_SWAP EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SRC_B__OFFSET
CYFLD_UDB_P_U_SRC_B__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SRC_B__SIZE
CYFLD_UDB_P_U_SRC_B__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_B_D0
CYVAL_UDB_P_U_SRC_B_D0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_B_D1
CYVAL_UDB_P_U_SRC_B_D1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_B_A0
CYVAL_UDB_P_U_SRC_B_A0 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_B_A1
CYVAL_UDB_P_U_SRC_B_A1 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SRC_A__OFFSET
CYFLD_UDB_P_U_SRC_A__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_SRC_A__SIZE
CYFLD_UDB_P_U_SRC_A__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_A_A0
CYVAL_UDB_P_U_SRC_A_A0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_SRC_A_A1
CYVAL_UDB_P_U_SRC_A_A1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FUNC__OFFSET
CYFLD_UDB_P_U_FUNC__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_U_FUNC__SIZE
CYFLD_UDB_P_U_FUNC__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_PASS
CYVAL_UDB_P_U_FUNC_PASS EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_INC_A
CYVAL_UDB_P_U_FUNC_INC_A EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_DEC_A
CYVAL_UDB_P_U_FUNC_DEC_A EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_ADD
CYVAL_UDB_P_U_FUNC_ADD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_SUB
CYVAL_UDB_P_U_FUNC_SUB EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_XOR
CYVAL_UDB_P_U_FUNC_XOR EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_AND
CYVAL_UDB_P_U_FUNC_AND EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_P_U_FUNC_OR
CYVAL_UDB_P_U_FUNC_OR EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG1
CYREG_UDB_P0_U0_DCFG1 EQU 0x400f3062
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG2
CYREG_UDB_P0_U0_DCFG2 EQU 0x400f3064
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG3
CYREG_UDB_P0_U0_DCFG3 EQU 0x400f3066
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG4
CYREG_UDB_P0_U0_DCFG4 EQU 0x400f3068
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG5
CYREG_UDB_P0_U0_DCFG5 EQU 0x400f306a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG6
CYREG_UDB_P0_U0_DCFG6 EQU 0x400f306c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U0_DCFG7
CYREG_UDB_P0_U0_DCFG7 EQU 0x400f306e
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P0_U1_BASE
CYDEV_UDB_P0_U1_BASE EQU 0x400f3080
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P0_U1_SIZE
CYDEV_UDB_P0_U1_SIZE EQU 0x00000080
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT0
CYREG_UDB_P0_U1_PLD_IT0 EQU 0x400f3080
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT1
CYREG_UDB_P0_U1_PLD_IT1 EQU 0x400f3084
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT2
CYREG_UDB_P0_U1_PLD_IT2 EQU 0x400f3088
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT3
CYREG_UDB_P0_U1_PLD_IT3 EQU 0x400f308c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT4
CYREG_UDB_P0_U1_PLD_IT4 EQU 0x400f3090
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT5
CYREG_UDB_P0_U1_PLD_IT5 EQU 0x400f3094
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT6
CYREG_UDB_P0_U1_PLD_IT6 EQU 0x400f3098
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT7
CYREG_UDB_P0_U1_PLD_IT7 EQU 0x400f309c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT8
CYREG_UDB_P0_U1_PLD_IT8 EQU 0x400f30a0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT9
CYREG_UDB_P0_U1_PLD_IT9 EQU 0x400f30a4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT10
CYREG_UDB_P0_U1_PLD_IT10 EQU 0x400f30a8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_IT11
CYREG_UDB_P0_U1_PLD_IT11 EQU 0x400f30ac
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_ORT0
CYREG_UDB_P0_U1_PLD_ORT0 EQU 0x400f30b0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_ORT1
CYREG_UDB_P0_U1_PLD_ORT1 EQU 0x400f30b2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_ORT2
CYREG_UDB_P0_U1_PLD_ORT2 EQU 0x400f30b4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_ORT3
CYREG_UDB_P0_U1_PLD_ORT3 EQU 0x400f30b6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_MC_CFG_CEN_CONST
CYREG_UDB_P0_U1_PLD_MC_CFG_CEN_CONST EQU 0x400f30b8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_MC_CFG_XORFB
CYREG_UDB_P0_U1_PLD_MC_CFG_XORFB EQU 0x400f30ba
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_MC_SET_RESET
CYREG_UDB_P0_U1_PLD_MC_SET_RESET EQU 0x400f30bc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_PLD_MC_CFG_BYPASS
CYREG_UDB_P0_U1_PLD_MC_CFG_BYPASS EQU 0x400f30be
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG0
CYREG_UDB_P0_U1_CFG0 EQU 0x400f30c0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG1
CYREG_UDB_P0_U1_CFG1 EQU 0x400f30c1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG2
CYREG_UDB_P0_U1_CFG2 EQU 0x400f30c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG3
CYREG_UDB_P0_U1_CFG3 EQU 0x400f30c3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG4
CYREG_UDB_P0_U1_CFG4 EQU 0x400f30c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG5
CYREG_UDB_P0_U1_CFG5 EQU 0x400f30c5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG6
CYREG_UDB_P0_U1_CFG6 EQU 0x400f30c6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG7
CYREG_UDB_P0_U1_CFG7 EQU 0x400f30c7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG8
CYREG_UDB_P0_U1_CFG8 EQU 0x400f30c8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG9
CYREG_UDB_P0_U1_CFG9 EQU 0x400f30c9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG10
CYREG_UDB_P0_U1_CFG10 EQU 0x400f30ca
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG11
CYREG_UDB_P0_U1_CFG11 EQU 0x400f30cb
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG12
CYREG_UDB_P0_U1_CFG12 EQU 0x400f30cc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG13
CYREG_UDB_P0_U1_CFG13 EQU 0x400f30cd
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG14
CYREG_UDB_P0_U1_CFG14 EQU 0x400f30ce
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG15
CYREG_UDB_P0_U1_CFG15 EQU 0x400f30cf
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG16
CYREG_UDB_P0_U1_CFG16 EQU 0x400f30d0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG17
CYREG_UDB_P0_U1_CFG17 EQU 0x400f30d1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG18
CYREG_UDB_P0_U1_CFG18 EQU 0x400f30d2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG19
CYREG_UDB_P0_U1_CFG19 EQU 0x400f30d3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG20
CYREG_UDB_P0_U1_CFG20 EQU 0x400f30d4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG21
CYREG_UDB_P0_U1_CFG21 EQU 0x400f30d5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG22
CYREG_UDB_P0_U1_CFG22 EQU 0x400f30d6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG23
CYREG_UDB_P0_U1_CFG23 EQU 0x400f30d7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG24
CYREG_UDB_P0_U1_CFG24 EQU 0x400f30d8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG25
CYREG_UDB_P0_U1_CFG25 EQU 0x400f30d9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG26
CYREG_UDB_P0_U1_CFG26 EQU 0x400f30da
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG27
CYREG_UDB_P0_U1_CFG27 EQU 0x400f30db
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG28
CYREG_UDB_P0_U1_CFG28 EQU 0x400f30dc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG29
CYREG_UDB_P0_U1_CFG29 EQU 0x400f30dd
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG30
CYREG_UDB_P0_U1_CFG30 EQU 0x400f30de
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_CFG31
CYREG_UDB_P0_U1_CFG31 EQU 0x400f30df
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG0
CYREG_UDB_P0_U1_DCFG0 EQU 0x400f30e0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG1
CYREG_UDB_P0_U1_DCFG1 EQU 0x400f30e2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG2
CYREG_UDB_P0_U1_DCFG2 EQU 0x400f30e4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG3
CYREG_UDB_P0_U1_DCFG3 EQU 0x400f30e6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG4
CYREG_UDB_P0_U1_DCFG4 EQU 0x400f30e8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG5
CYREG_UDB_P0_U1_DCFG5 EQU 0x400f30ea
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG6
CYREG_UDB_P0_U1_DCFG6 EQU 0x400f30ec
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_U1_DCFG7
CYREG_UDB_P0_U1_DCFG7 EQU 0x400f30ee
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P0_ROUTE_BASE
CYDEV_UDB_P0_ROUTE_BASE EQU 0x400f3100
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P0_ROUTE_SIZE
CYDEV_UDB_P0_ROUTE_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC0
CYREG_UDB_P0_ROUTE_HC0 EQU 0x400f3100
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HC_BYTE__OFFSET
CYFLD_UDB_P_ROUTE_HC_BYTE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HC_BYTE__SIZE
CYFLD_UDB_P_ROUTE_HC_BYTE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC1
CYREG_UDB_P0_ROUTE_HC1 EQU 0x400f3101
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC2
CYREG_UDB_P0_ROUTE_HC2 EQU 0x400f3102
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC3
CYREG_UDB_P0_ROUTE_HC3 EQU 0x400f3103
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC4
CYREG_UDB_P0_ROUTE_HC4 EQU 0x400f3104
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC5
CYREG_UDB_P0_ROUTE_HC5 EQU 0x400f3105
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC6
CYREG_UDB_P0_ROUTE_HC6 EQU 0x400f3106
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC7
CYREG_UDB_P0_ROUTE_HC7 EQU 0x400f3107
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC8
CYREG_UDB_P0_ROUTE_HC8 EQU 0x400f3108
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC9
CYREG_UDB_P0_ROUTE_HC9 EQU 0x400f3109
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC10
CYREG_UDB_P0_ROUTE_HC10 EQU 0x400f310a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC11
CYREG_UDB_P0_ROUTE_HC11 EQU 0x400f310b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC12
CYREG_UDB_P0_ROUTE_HC12 EQU 0x400f310c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC13
CYREG_UDB_P0_ROUTE_HC13 EQU 0x400f310d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC14
CYREG_UDB_P0_ROUTE_HC14 EQU 0x400f310e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC15
CYREG_UDB_P0_ROUTE_HC15 EQU 0x400f310f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC16
CYREG_UDB_P0_ROUTE_HC16 EQU 0x400f3110
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC17
CYREG_UDB_P0_ROUTE_HC17 EQU 0x400f3111
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC18
CYREG_UDB_P0_ROUTE_HC18 EQU 0x400f3112
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC19
CYREG_UDB_P0_ROUTE_HC19 EQU 0x400f3113
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC20
CYREG_UDB_P0_ROUTE_HC20 EQU 0x400f3114
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC21
CYREG_UDB_P0_ROUTE_HC21 EQU 0x400f3115
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC22
CYREG_UDB_P0_ROUTE_HC22 EQU 0x400f3116
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC23
CYREG_UDB_P0_ROUTE_HC23 EQU 0x400f3117
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC24
CYREG_UDB_P0_ROUTE_HC24 EQU 0x400f3118
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC25
CYREG_UDB_P0_ROUTE_HC25 EQU 0x400f3119
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC26
CYREG_UDB_P0_ROUTE_HC26 EQU 0x400f311a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC27
CYREG_UDB_P0_ROUTE_HC27 EQU 0x400f311b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC28
CYREG_UDB_P0_ROUTE_HC28 EQU 0x400f311c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC29
CYREG_UDB_P0_ROUTE_HC29 EQU 0x400f311d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC30
CYREG_UDB_P0_ROUTE_HC30 EQU 0x400f311e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC31
CYREG_UDB_P0_ROUTE_HC31 EQU 0x400f311f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC32
CYREG_UDB_P0_ROUTE_HC32 EQU 0x400f3120
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC33
CYREG_UDB_P0_ROUTE_HC33 EQU 0x400f3121
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC34
CYREG_UDB_P0_ROUTE_HC34 EQU 0x400f3122
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC35
CYREG_UDB_P0_ROUTE_HC35 EQU 0x400f3123
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC36
CYREG_UDB_P0_ROUTE_HC36 EQU 0x400f3124
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC37
CYREG_UDB_P0_ROUTE_HC37 EQU 0x400f3125
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC38
CYREG_UDB_P0_ROUTE_HC38 EQU 0x400f3126
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC39
CYREG_UDB_P0_ROUTE_HC39 EQU 0x400f3127
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC40
CYREG_UDB_P0_ROUTE_HC40 EQU 0x400f3128
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC41
CYREG_UDB_P0_ROUTE_HC41 EQU 0x400f3129
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC42
CYREG_UDB_P0_ROUTE_HC42 EQU 0x400f312a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC43
CYREG_UDB_P0_ROUTE_HC43 EQU 0x400f312b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC44
CYREG_UDB_P0_ROUTE_HC44 EQU 0x400f312c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC45
CYREG_UDB_P0_ROUTE_HC45 EQU 0x400f312d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC46
CYREG_UDB_P0_ROUTE_HC46 EQU 0x400f312e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC47
CYREG_UDB_P0_ROUTE_HC47 EQU 0x400f312f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC48
CYREG_UDB_P0_ROUTE_HC48 EQU 0x400f3130
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC49
CYREG_UDB_P0_ROUTE_HC49 EQU 0x400f3131
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC50
CYREG_UDB_P0_ROUTE_HC50 EQU 0x400f3132
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC51
CYREG_UDB_P0_ROUTE_HC51 EQU 0x400f3133
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC52
CYREG_UDB_P0_ROUTE_HC52 EQU 0x400f3134
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC53
CYREG_UDB_P0_ROUTE_HC53 EQU 0x400f3135
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC54
CYREG_UDB_P0_ROUTE_HC54 EQU 0x400f3136
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC55
CYREG_UDB_P0_ROUTE_HC55 EQU 0x400f3137
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC56
CYREG_UDB_P0_ROUTE_HC56 EQU 0x400f3138
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC57
CYREG_UDB_P0_ROUTE_HC57 EQU 0x400f3139
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC58
CYREG_UDB_P0_ROUTE_HC58 EQU 0x400f313a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC59
CYREG_UDB_P0_ROUTE_HC59 EQU 0x400f313b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC60
CYREG_UDB_P0_ROUTE_HC60 EQU 0x400f313c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC61
CYREG_UDB_P0_ROUTE_HC61 EQU 0x400f313d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC62
CYREG_UDB_P0_ROUTE_HC62 EQU 0x400f313e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC63
CYREG_UDB_P0_ROUTE_HC63 EQU 0x400f313f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC64
CYREG_UDB_P0_ROUTE_HC64 EQU 0x400f3140
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC65
CYREG_UDB_P0_ROUTE_HC65 EQU 0x400f3141
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC66
CYREG_UDB_P0_ROUTE_HC66 EQU 0x400f3142
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC67
CYREG_UDB_P0_ROUTE_HC67 EQU 0x400f3143
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC68
CYREG_UDB_P0_ROUTE_HC68 EQU 0x400f3144
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC69
CYREG_UDB_P0_ROUTE_HC69 EQU 0x400f3145
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC70
CYREG_UDB_P0_ROUTE_HC70 EQU 0x400f3146
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC71
CYREG_UDB_P0_ROUTE_HC71 EQU 0x400f3147
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC72
CYREG_UDB_P0_ROUTE_HC72 EQU 0x400f3148
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC73
CYREG_UDB_P0_ROUTE_HC73 EQU 0x400f3149
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC74
CYREG_UDB_P0_ROUTE_HC74 EQU 0x400f314a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC75
CYREG_UDB_P0_ROUTE_HC75 EQU 0x400f314b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC76
CYREG_UDB_P0_ROUTE_HC76 EQU 0x400f314c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC77
CYREG_UDB_P0_ROUTE_HC77 EQU 0x400f314d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC78
CYREG_UDB_P0_ROUTE_HC78 EQU 0x400f314e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC79
CYREG_UDB_P0_ROUTE_HC79 EQU 0x400f314f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC80
CYREG_UDB_P0_ROUTE_HC80 EQU 0x400f3150
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC81
CYREG_UDB_P0_ROUTE_HC81 EQU 0x400f3151
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC82
CYREG_UDB_P0_ROUTE_HC82 EQU 0x400f3152
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC83
CYREG_UDB_P0_ROUTE_HC83 EQU 0x400f3153
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC84
CYREG_UDB_P0_ROUTE_HC84 EQU 0x400f3154
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC85
CYREG_UDB_P0_ROUTE_HC85 EQU 0x400f3155
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC86
CYREG_UDB_P0_ROUTE_HC86 EQU 0x400f3156
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC87
CYREG_UDB_P0_ROUTE_HC87 EQU 0x400f3157
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC88
CYREG_UDB_P0_ROUTE_HC88 EQU 0x400f3158
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC89
CYREG_UDB_P0_ROUTE_HC89 EQU 0x400f3159
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC90
CYREG_UDB_P0_ROUTE_HC90 EQU 0x400f315a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC91
CYREG_UDB_P0_ROUTE_HC91 EQU 0x400f315b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC92
CYREG_UDB_P0_ROUTE_HC92 EQU 0x400f315c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC93
CYREG_UDB_P0_ROUTE_HC93 EQU 0x400f315d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC94
CYREG_UDB_P0_ROUTE_HC94 EQU 0x400f315e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC95
CYREG_UDB_P0_ROUTE_HC95 EQU 0x400f315f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC96
CYREG_UDB_P0_ROUTE_HC96 EQU 0x400f3160
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC97
CYREG_UDB_P0_ROUTE_HC97 EQU 0x400f3161
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC98
CYREG_UDB_P0_ROUTE_HC98 EQU 0x400f3162
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC99
CYREG_UDB_P0_ROUTE_HC99 EQU 0x400f3163
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC100
CYREG_UDB_P0_ROUTE_HC100 EQU 0x400f3164
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC101
CYREG_UDB_P0_ROUTE_HC101 EQU 0x400f3165
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC102
CYREG_UDB_P0_ROUTE_HC102 EQU 0x400f3166
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC103
CYREG_UDB_P0_ROUTE_HC103 EQU 0x400f3167
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC104
CYREG_UDB_P0_ROUTE_HC104 EQU 0x400f3168
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC105
CYREG_UDB_P0_ROUTE_HC105 EQU 0x400f3169
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC106
CYREG_UDB_P0_ROUTE_HC106 EQU 0x400f316a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC107
CYREG_UDB_P0_ROUTE_HC107 EQU 0x400f316b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC108
CYREG_UDB_P0_ROUTE_HC108 EQU 0x400f316c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC109
CYREG_UDB_P0_ROUTE_HC109 EQU 0x400f316d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC110
CYREG_UDB_P0_ROUTE_HC110 EQU 0x400f316e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC111
CYREG_UDB_P0_ROUTE_HC111 EQU 0x400f316f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC112
CYREG_UDB_P0_ROUTE_HC112 EQU 0x400f3170
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC113
CYREG_UDB_P0_ROUTE_HC113 EQU 0x400f3171
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC114
CYREG_UDB_P0_ROUTE_HC114 EQU 0x400f3172
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC115
CYREG_UDB_P0_ROUTE_HC115 EQU 0x400f3173
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC116
CYREG_UDB_P0_ROUTE_HC116 EQU 0x400f3174
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC117
CYREG_UDB_P0_ROUTE_HC117 EQU 0x400f3175
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC118
CYREG_UDB_P0_ROUTE_HC118 EQU 0x400f3176
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC119
CYREG_UDB_P0_ROUTE_HC119 EQU 0x400f3177
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC120
CYREG_UDB_P0_ROUTE_HC120 EQU 0x400f3178
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC121
CYREG_UDB_P0_ROUTE_HC121 EQU 0x400f3179
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC122
CYREG_UDB_P0_ROUTE_HC122 EQU 0x400f317a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC123
CYREG_UDB_P0_ROUTE_HC123 EQU 0x400f317b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC124
CYREG_UDB_P0_ROUTE_HC124 EQU 0x400f317c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC125
CYREG_UDB_P0_ROUTE_HC125 EQU 0x400f317d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC126
CYREG_UDB_P0_ROUTE_HC126 EQU 0x400f317e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HC127
CYREG_UDB_P0_ROUTE_HC127 EQU 0x400f317f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L0
CYREG_UDB_P0_ROUTE_HV_L0 EQU 0x400f3180
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HV_BYTE__OFFSET
CYFLD_UDB_P_ROUTE_HV_BYTE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HV_BYTE__SIZE
CYFLD_UDB_P_ROUTE_HV_BYTE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L1
CYREG_UDB_P0_ROUTE_HV_L1 EQU 0x400f3181
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L2
CYREG_UDB_P0_ROUTE_HV_L2 EQU 0x400f3182
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L3
CYREG_UDB_P0_ROUTE_HV_L3 EQU 0x400f3183
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L4
CYREG_UDB_P0_ROUTE_HV_L4 EQU 0x400f3184
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L5
CYREG_UDB_P0_ROUTE_HV_L5 EQU 0x400f3185
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L6
CYREG_UDB_P0_ROUTE_HV_L6 EQU 0x400f3186
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L7
CYREG_UDB_P0_ROUTE_HV_L7 EQU 0x400f3187
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L8
CYREG_UDB_P0_ROUTE_HV_L8 EQU 0x400f3188
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L9
CYREG_UDB_P0_ROUTE_HV_L9 EQU 0x400f3189
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L10
CYREG_UDB_P0_ROUTE_HV_L10 EQU 0x400f318a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L11
CYREG_UDB_P0_ROUTE_HV_L11 EQU 0x400f318b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L12
CYREG_UDB_P0_ROUTE_HV_L12 EQU 0x400f318c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L13
CYREG_UDB_P0_ROUTE_HV_L13 EQU 0x400f318d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L14
CYREG_UDB_P0_ROUTE_HV_L14 EQU 0x400f318e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_L15
CYREG_UDB_P0_ROUTE_HV_L15 EQU 0x400f318f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS0
CYREG_UDB_P0_ROUTE_HS0 EQU 0x400f3190
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HS_BYTE__OFFSET
CYFLD_UDB_P_ROUTE_HS_BYTE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_HS_BYTE__SIZE
CYFLD_UDB_P_ROUTE_HS_BYTE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS1
CYREG_UDB_P0_ROUTE_HS1 EQU 0x400f3191
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS2
CYREG_UDB_P0_ROUTE_HS2 EQU 0x400f3192
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS3
CYREG_UDB_P0_ROUTE_HS3 EQU 0x400f3193
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS4
CYREG_UDB_P0_ROUTE_HS4 EQU 0x400f3194
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS5
CYREG_UDB_P0_ROUTE_HS5 EQU 0x400f3195
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS6
CYREG_UDB_P0_ROUTE_HS6 EQU 0x400f3196
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS7
CYREG_UDB_P0_ROUTE_HS7 EQU 0x400f3197
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS8
CYREG_UDB_P0_ROUTE_HS8 EQU 0x400f3198
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS9
CYREG_UDB_P0_ROUTE_HS9 EQU 0x400f3199
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS10
CYREG_UDB_P0_ROUTE_HS10 EQU 0x400f319a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS11
CYREG_UDB_P0_ROUTE_HS11 EQU 0x400f319b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS12
CYREG_UDB_P0_ROUTE_HS12 EQU 0x400f319c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS13
CYREG_UDB_P0_ROUTE_HS13 EQU 0x400f319d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS14
CYREG_UDB_P0_ROUTE_HS14 EQU 0x400f319e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS15
CYREG_UDB_P0_ROUTE_HS15 EQU 0x400f319f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS16
CYREG_UDB_P0_ROUTE_HS16 EQU 0x400f31a0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS17
CYREG_UDB_P0_ROUTE_HS17 EQU 0x400f31a1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS18
CYREG_UDB_P0_ROUTE_HS18 EQU 0x400f31a2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS19
CYREG_UDB_P0_ROUTE_HS19 EQU 0x400f31a3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS20
CYREG_UDB_P0_ROUTE_HS20 EQU 0x400f31a4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS21
CYREG_UDB_P0_ROUTE_HS21 EQU 0x400f31a5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS22
CYREG_UDB_P0_ROUTE_HS22 EQU 0x400f31a6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HS23
CYREG_UDB_P0_ROUTE_HS23 EQU 0x400f31a7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R0
CYREG_UDB_P0_ROUTE_HV_R0 EQU 0x400f31a8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R1
CYREG_UDB_P0_ROUTE_HV_R1 EQU 0x400f31a9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R2
CYREG_UDB_P0_ROUTE_HV_R2 EQU 0x400f31aa
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R3
CYREG_UDB_P0_ROUTE_HV_R3 EQU 0x400f31ab
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R4
CYREG_UDB_P0_ROUTE_HV_R4 EQU 0x400f31ac
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R5
CYREG_UDB_P0_ROUTE_HV_R5 EQU 0x400f31ad
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R6
CYREG_UDB_P0_ROUTE_HV_R6 EQU 0x400f31ae
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R7
CYREG_UDB_P0_ROUTE_HV_R7 EQU 0x400f31af
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R8
CYREG_UDB_P0_ROUTE_HV_R8 EQU 0x400f31b0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R9
CYREG_UDB_P0_ROUTE_HV_R9 EQU 0x400f31b1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R10
CYREG_UDB_P0_ROUTE_HV_R10 EQU 0x400f31b2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R11
CYREG_UDB_P0_ROUTE_HV_R11 EQU 0x400f31b3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R12
CYREG_UDB_P0_ROUTE_HV_R12 EQU 0x400f31b4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R13
CYREG_UDB_P0_ROUTE_HV_R13 EQU 0x400f31b5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R14
CYREG_UDB_P0_ROUTE_HV_R14 EQU 0x400f31b6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_HV_R15
CYREG_UDB_P0_ROUTE_HV_R15 EQU 0x400f31b7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD0IN0
CYREG_UDB_P0_ROUTE_PLD0IN0 EQU 0x400f31c0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_TOP__OFFSET
CYFLD_UDB_P_ROUTE_PI_TOP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_TOP__SIZE
CYFLD_UDB_P_ROUTE_PI_TOP__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_BOT__OFFSET
CYFLD_UDB_P_ROUTE_PI_BOT__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_BOT__SIZE
CYFLD_UDB_P_ROUTE_PI_BOT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD0IN1
CYREG_UDB_P0_ROUTE_PLD0IN1 EQU 0x400f31c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD0IN2
CYREG_UDB_P0_ROUTE_PLD0IN2 EQU 0x400f31c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD1IN0
CYREG_UDB_P0_ROUTE_PLD1IN0 EQU 0x400f31ca
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD1IN1
CYREG_UDB_P0_ROUTE_PLD1IN1 EQU 0x400f31cc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_PLD1IN2
CYREG_UDB_P0_ROUTE_PLD1IN2 EQU 0x400f31ce
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_DPIN0
CYREG_UDB_P0_ROUTE_DPIN0 EQU 0x400f31d0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_DPIN1
CYREG_UDB_P0_ROUTE_DPIN1 EQU 0x400f31d2
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_TOP2__OFFSET
CYFLD_UDB_P_ROUTE_PI_TOP2__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_TOP2__SIZE
CYFLD_UDB_P_ROUTE_PI_TOP2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_BOT2__OFFSET
CYFLD_UDB_P_ROUTE_PI_BOT2__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_PI_BOT2__SIZE
CYFLD_UDB_P_ROUTE_PI_BOT2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_SCIN
CYREG_UDB_P0_ROUTE_SCIN EQU 0x400f31d6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_SCIOIN
CYREG_UDB_P0_ROUTE_SCIOIN EQU 0x400f31d8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_RCIN
CYREG_UDB_P0_ROUTE_RCIN EQU 0x400f31de
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS0
CYREG_UDB_P0_ROUTE_VS0 EQU 0x400f31e0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_VS_TOP__OFFSET
CYFLD_UDB_P_ROUTE_VS_TOP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_VS_TOP__SIZE
CYFLD_UDB_P_ROUTE_VS_TOP__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_VS_BOT__OFFSET
CYFLD_UDB_P_ROUTE_VS_BOT__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_P_ROUTE_VS_BOT__SIZE
CYFLD_UDB_P_ROUTE_VS_BOT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS1
CYREG_UDB_P0_ROUTE_VS1 EQU 0x400f31e2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS2
CYREG_UDB_P0_ROUTE_VS2 EQU 0x400f31e4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS3
CYREG_UDB_P0_ROUTE_VS3 EQU 0x400f31e6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS4
CYREG_UDB_P0_ROUTE_VS4 EQU 0x400f31e8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS5
CYREG_UDB_P0_ROUTE_VS5 EQU 0x400f31ea
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS6
CYREG_UDB_P0_ROUTE_VS6 EQU 0x400f31ec
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P0_ROUTE_VS7
CYREG_UDB_P0_ROUTE_VS7 EQU 0x400f31ee
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P1_BASE
CYDEV_UDB_P1_BASE EQU 0x400f3200
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P1_SIZE
CYDEV_UDB_P1_SIZE EQU 0x00000200
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P1_U0_BASE
CYDEV_UDB_P1_U0_BASE EQU 0x400f3200
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P1_U0_SIZE
CYDEV_UDB_P1_U0_SIZE EQU 0x00000080
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT0
CYREG_UDB_P1_U0_PLD_IT0 EQU 0x400f3200
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT1
CYREG_UDB_P1_U0_PLD_IT1 EQU 0x400f3204
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT2
CYREG_UDB_P1_U0_PLD_IT2 EQU 0x400f3208
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT3
CYREG_UDB_P1_U0_PLD_IT3 EQU 0x400f320c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT4
CYREG_UDB_P1_U0_PLD_IT4 EQU 0x400f3210
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT5
CYREG_UDB_P1_U0_PLD_IT5 EQU 0x400f3214
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT6
CYREG_UDB_P1_U0_PLD_IT6 EQU 0x400f3218
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT7
CYREG_UDB_P1_U0_PLD_IT7 EQU 0x400f321c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT8
CYREG_UDB_P1_U0_PLD_IT8 EQU 0x400f3220
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT9
CYREG_UDB_P1_U0_PLD_IT9 EQU 0x400f3224
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT10
CYREG_UDB_P1_U0_PLD_IT10 EQU 0x400f3228
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_IT11
CYREG_UDB_P1_U0_PLD_IT11 EQU 0x400f322c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_ORT0
CYREG_UDB_P1_U0_PLD_ORT0 EQU 0x400f3230
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_ORT1
CYREG_UDB_P1_U0_PLD_ORT1 EQU 0x400f3232
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_ORT2
CYREG_UDB_P1_U0_PLD_ORT2 EQU 0x400f3234
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_ORT3
CYREG_UDB_P1_U0_PLD_ORT3 EQU 0x400f3236
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_MC_CFG_CEN_CONST
CYREG_UDB_P1_U0_PLD_MC_CFG_CEN_CONST EQU 0x400f3238
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_MC_CFG_XORFB
CYREG_UDB_P1_U0_PLD_MC_CFG_XORFB EQU 0x400f323a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_MC_SET_RESET
CYREG_UDB_P1_U0_PLD_MC_SET_RESET EQU 0x400f323c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_PLD_MC_CFG_BYPASS
CYREG_UDB_P1_U0_PLD_MC_CFG_BYPASS EQU 0x400f323e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG0
CYREG_UDB_P1_U0_CFG0 EQU 0x400f3240
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG1
CYREG_UDB_P1_U0_CFG1 EQU 0x400f3241
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG2
CYREG_UDB_P1_U0_CFG2 EQU 0x400f3242
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG3
CYREG_UDB_P1_U0_CFG3 EQU 0x400f3243
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG4
CYREG_UDB_P1_U0_CFG4 EQU 0x400f3244
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG5
CYREG_UDB_P1_U0_CFG5 EQU 0x400f3245
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG6
CYREG_UDB_P1_U0_CFG6 EQU 0x400f3246
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG7
CYREG_UDB_P1_U0_CFG7 EQU 0x400f3247
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG8
CYREG_UDB_P1_U0_CFG8 EQU 0x400f3248
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG9
CYREG_UDB_P1_U0_CFG9 EQU 0x400f3249
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG10
CYREG_UDB_P1_U0_CFG10 EQU 0x400f324a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG11
CYREG_UDB_P1_U0_CFG11 EQU 0x400f324b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG12
CYREG_UDB_P1_U0_CFG12 EQU 0x400f324c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG13
CYREG_UDB_P1_U0_CFG13 EQU 0x400f324d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG14
CYREG_UDB_P1_U0_CFG14 EQU 0x400f324e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG15
CYREG_UDB_P1_U0_CFG15 EQU 0x400f324f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG16
CYREG_UDB_P1_U0_CFG16 EQU 0x400f3250
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG17
CYREG_UDB_P1_U0_CFG17 EQU 0x400f3251
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG18
CYREG_UDB_P1_U0_CFG18 EQU 0x400f3252
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG19
CYREG_UDB_P1_U0_CFG19 EQU 0x400f3253
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG20
CYREG_UDB_P1_U0_CFG20 EQU 0x400f3254
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG21
CYREG_UDB_P1_U0_CFG21 EQU 0x400f3255
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG22
CYREG_UDB_P1_U0_CFG22 EQU 0x400f3256
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG23
CYREG_UDB_P1_U0_CFG23 EQU 0x400f3257
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG24
CYREG_UDB_P1_U0_CFG24 EQU 0x400f3258
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG25
CYREG_UDB_P1_U0_CFG25 EQU 0x400f3259
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG26
CYREG_UDB_P1_U0_CFG26 EQU 0x400f325a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG27
CYREG_UDB_P1_U0_CFG27 EQU 0x400f325b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG28
CYREG_UDB_P1_U0_CFG28 EQU 0x400f325c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG29
CYREG_UDB_P1_U0_CFG29 EQU 0x400f325d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG30
CYREG_UDB_P1_U0_CFG30 EQU 0x400f325e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_CFG31
CYREG_UDB_P1_U0_CFG31 EQU 0x400f325f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG0
CYREG_UDB_P1_U0_DCFG0 EQU 0x400f3260
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG1
CYREG_UDB_P1_U0_DCFG1 EQU 0x400f3262
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG2
CYREG_UDB_P1_U0_DCFG2 EQU 0x400f3264
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG3
CYREG_UDB_P1_U0_DCFG3 EQU 0x400f3266
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG4
CYREG_UDB_P1_U0_DCFG4 EQU 0x400f3268
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG5
CYREG_UDB_P1_U0_DCFG5 EQU 0x400f326a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG6
CYREG_UDB_P1_U0_DCFG6 EQU 0x400f326c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U0_DCFG7
CYREG_UDB_P1_U0_DCFG7 EQU 0x400f326e
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P1_U1_BASE
CYDEV_UDB_P1_U1_BASE EQU 0x400f3280
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P1_U1_SIZE
CYDEV_UDB_P1_U1_SIZE EQU 0x00000080
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT0
CYREG_UDB_P1_U1_PLD_IT0 EQU 0x400f3280
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT1
CYREG_UDB_P1_U1_PLD_IT1 EQU 0x400f3284
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT2
CYREG_UDB_P1_U1_PLD_IT2 EQU 0x400f3288
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT3
CYREG_UDB_P1_U1_PLD_IT3 EQU 0x400f328c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT4
CYREG_UDB_P1_U1_PLD_IT4 EQU 0x400f3290
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT5
CYREG_UDB_P1_U1_PLD_IT5 EQU 0x400f3294
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT6
CYREG_UDB_P1_U1_PLD_IT6 EQU 0x400f3298
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT7
CYREG_UDB_P1_U1_PLD_IT7 EQU 0x400f329c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT8
CYREG_UDB_P1_U1_PLD_IT8 EQU 0x400f32a0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT9
CYREG_UDB_P1_U1_PLD_IT9 EQU 0x400f32a4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT10
CYREG_UDB_P1_U1_PLD_IT10 EQU 0x400f32a8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_IT11
CYREG_UDB_P1_U1_PLD_IT11 EQU 0x400f32ac
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_ORT0
CYREG_UDB_P1_U1_PLD_ORT0 EQU 0x400f32b0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_ORT1
CYREG_UDB_P1_U1_PLD_ORT1 EQU 0x400f32b2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_ORT2
CYREG_UDB_P1_U1_PLD_ORT2 EQU 0x400f32b4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_ORT3
CYREG_UDB_P1_U1_PLD_ORT3 EQU 0x400f32b6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_MC_CFG_CEN_CONST
CYREG_UDB_P1_U1_PLD_MC_CFG_CEN_CONST EQU 0x400f32b8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_MC_CFG_XORFB
CYREG_UDB_P1_U1_PLD_MC_CFG_XORFB EQU 0x400f32ba
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_MC_SET_RESET
CYREG_UDB_P1_U1_PLD_MC_SET_RESET EQU 0x400f32bc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_PLD_MC_CFG_BYPASS
CYREG_UDB_P1_U1_PLD_MC_CFG_BYPASS EQU 0x400f32be
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG0
CYREG_UDB_P1_U1_CFG0 EQU 0x400f32c0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG1
CYREG_UDB_P1_U1_CFG1 EQU 0x400f32c1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG2
CYREG_UDB_P1_U1_CFG2 EQU 0x400f32c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG3
CYREG_UDB_P1_U1_CFG3 EQU 0x400f32c3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG4
CYREG_UDB_P1_U1_CFG4 EQU 0x400f32c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG5
CYREG_UDB_P1_U1_CFG5 EQU 0x400f32c5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG6
CYREG_UDB_P1_U1_CFG6 EQU 0x400f32c6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG7
CYREG_UDB_P1_U1_CFG7 EQU 0x400f32c7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG8
CYREG_UDB_P1_U1_CFG8 EQU 0x400f32c8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG9
CYREG_UDB_P1_U1_CFG9 EQU 0x400f32c9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG10
CYREG_UDB_P1_U1_CFG10 EQU 0x400f32ca
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG11
CYREG_UDB_P1_U1_CFG11 EQU 0x400f32cb
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG12
CYREG_UDB_P1_U1_CFG12 EQU 0x400f32cc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG13
CYREG_UDB_P1_U1_CFG13 EQU 0x400f32cd
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG14
CYREG_UDB_P1_U1_CFG14 EQU 0x400f32ce
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG15
CYREG_UDB_P1_U1_CFG15 EQU 0x400f32cf
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG16
CYREG_UDB_P1_U1_CFG16 EQU 0x400f32d0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG17
CYREG_UDB_P1_U1_CFG17 EQU 0x400f32d1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG18
CYREG_UDB_P1_U1_CFG18 EQU 0x400f32d2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG19
CYREG_UDB_P1_U1_CFG19 EQU 0x400f32d3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG20
CYREG_UDB_P1_U1_CFG20 EQU 0x400f32d4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG21
CYREG_UDB_P1_U1_CFG21 EQU 0x400f32d5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG22
CYREG_UDB_P1_U1_CFG22 EQU 0x400f32d6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG23
CYREG_UDB_P1_U1_CFG23 EQU 0x400f32d7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG24
CYREG_UDB_P1_U1_CFG24 EQU 0x400f32d8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG25
CYREG_UDB_P1_U1_CFG25 EQU 0x400f32d9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG26
CYREG_UDB_P1_U1_CFG26 EQU 0x400f32da
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG27
CYREG_UDB_P1_U1_CFG27 EQU 0x400f32db
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG28
CYREG_UDB_P1_U1_CFG28 EQU 0x400f32dc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG29
CYREG_UDB_P1_U1_CFG29 EQU 0x400f32dd
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG30
CYREG_UDB_P1_U1_CFG30 EQU 0x400f32de
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_CFG31
CYREG_UDB_P1_U1_CFG31 EQU 0x400f32df
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG0
CYREG_UDB_P1_U1_DCFG0 EQU 0x400f32e0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG1
CYREG_UDB_P1_U1_DCFG1 EQU 0x400f32e2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG2
CYREG_UDB_P1_U1_DCFG2 EQU 0x400f32e4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG3
CYREG_UDB_P1_U1_DCFG3 EQU 0x400f32e6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG4
CYREG_UDB_P1_U1_DCFG4 EQU 0x400f32e8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG5
CYREG_UDB_P1_U1_DCFG5 EQU 0x400f32ea
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG6
CYREG_UDB_P1_U1_DCFG6 EQU 0x400f32ec
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_U1_DCFG7
CYREG_UDB_P1_U1_DCFG7 EQU 0x400f32ee
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P1_ROUTE_BASE
CYDEV_UDB_P1_ROUTE_BASE EQU 0x400f3300
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_P1_ROUTE_SIZE
CYDEV_UDB_P1_ROUTE_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC0
CYREG_UDB_P1_ROUTE_HC0 EQU 0x400f3300
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC1
CYREG_UDB_P1_ROUTE_HC1 EQU 0x400f3301
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC2
CYREG_UDB_P1_ROUTE_HC2 EQU 0x400f3302
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC3
CYREG_UDB_P1_ROUTE_HC3 EQU 0x400f3303
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC4
CYREG_UDB_P1_ROUTE_HC4 EQU 0x400f3304
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC5
CYREG_UDB_P1_ROUTE_HC5 EQU 0x400f3305
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC6
CYREG_UDB_P1_ROUTE_HC6 EQU 0x400f3306
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC7
CYREG_UDB_P1_ROUTE_HC7 EQU 0x400f3307
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC8
CYREG_UDB_P1_ROUTE_HC8 EQU 0x400f3308
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC9
CYREG_UDB_P1_ROUTE_HC9 EQU 0x400f3309
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC10
CYREG_UDB_P1_ROUTE_HC10 EQU 0x400f330a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC11
CYREG_UDB_P1_ROUTE_HC11 EQU 0x400f330b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC12
CYREG_UDB_P1_ROUTE_HC12 EQU 0x400f330c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC13
CYREG_UDB_P1_ROUTE_HC13 EQU 0x400f330d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC14
CYREG_UDB_P1_ROUTE_HC14 EQU 0x400f330e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC15
CYREG_UDB_P1_ROUTE_HC15 EQU 0x400f330f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC16
CYREG_UDB_P1_ROUTE_HC16 EQU 0x400f3310
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC17
CYREG_UDB_P1_ROUTE_HC17 EQU 0x400f3311
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC18
CYREG_UDB_P1_ROUTE_HC18 EQU 0x400f3312
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC19
CYREG_UDB_P1_ROUTE_HC19 EQU 0x400f3313
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC20
CYREG_UDB_P1_ROUTE_HC20 EQU 0x400f3314
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC21
CYREG_UDB_P1_ROUTE_HC21 EQU 0x400f3315
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC22
CYREG_UDB_P1_ROUTE_HC22 EQU 0x400f3316
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC23
CYREG_UDB_P1_ROUTE_HC23 EQU 0x400f3317
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC24
CYREG_UDB_P1_ROUTE_HC24 EQU 0x400f3318
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC25
CYREG_UDB_P1_ROUTE_HC25 EQU 0x400f3319
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC26
CYREG_UDB_P1_ROUTE_HC26 EQU 0x400f331a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC27
CYREG_UDB_P1_ROUTE_HC27 EQU 0x400f331b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC28
CYREG_UDB_P1_ROUTE_HC28 EQU 0x400f331c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC29
CYREG_UDB_P1_ROUTE_HC29 EQU 0x400f331d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC30
CYREG_UDB_P1_ROUTE_HC30 EQU 0x400f331e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC31
CYREG_UDB_P1_ROUTE_HC31 EQU 0x400f331f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC32
CYREG_UDB_P1_ROUTE_HC32 EQU 0x400f3320
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC33
CYREG_UDB_P1_ROUTE_HC33 EQU 0x400f3321
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC34
CYREG_UDB_P1_ROUTE_HC34 EQU 0x400f3322
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC35
CYREG_UDB_P1_ROUTE_HC35 EQU 0x400f3323
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC36
CYREG_UDB_P1_ROUTE_HC36 EQU 0x400f3324
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC37
CYREG_UDB_P1_ROUTE_HC37 EQU 0x400f3325
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC38
CYREG_UDB_P1_ROUTE_HC38 EQU 0x400f3326
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC39
CYREG_UDB_P1_ROUTE_HC39 EQU 0x400f3327
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC40
CYREG_UDB_P1_ROUTE_HC40 EQU 0x400f3328
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC41
CYREG_UDB_P1_ROUTE_HC41 EQU 0x400f3329
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC42
CYREG_UDB_P1_ROUTE_HC42 EQU 0x400f332a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC43
CYREG_UDB_P1_ROUTE_HC43 EQU 0x400f332b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC44
CYREG_UDB_P1_ROUTE_HC44 EQU 0x400f332c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC45
CYREG_UDB_P1_ROUTE_HC45 EQU 0x400f332d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC46
CYREG_UDB_P1_ROUTE_HC46 EQU 0x400f332e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC47
CYREG_UDB_P1_ROUTE_HC47 EQU 0x400f332f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC48
CYREG_UDB_P1_ROUTE_HC48 EQU 0x400f3330
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC49
CYREG_UDB_P1_ROUTE_HC49 EQU 0x400f3331
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC50
CYREG_UDB_P1_ROUTE_HC50 EQU 0x400f3332
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC51
CYREG_UDB_P1_ROUTE_HC51 EQU 0x400f3333
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC52
CYREG_UDB_P1_ROUTE_HC52 EQU 0x400f3334
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC53
CYREG_UDB_P1_ROUTE_HC53 EQU 0x400f3335
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC54
CYREG_UDB_P1_ROUTE_HC54 EQU 0x400f3336
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC55
CYREG_UDB_P1_ROUTE_HC55 EQU 0x400f3337
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC56
CYREG_UDB_P1_ROUTE_HC56 EQU 0x400f3338
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC57
CYREG_UDB_P1_ROUTE_HC57 EQU 0x400f3339
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC58
CYREG_UDB_P1_ROUTE_HC58 EQU 0x400f333a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC59
CYREG_UDB_P1_ROUTE_HC59 EQU 0x400f333b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC60
CYREG_UDB_P1_ROUTE_HC60 EQU 0x400f333c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC61
CYREG_UDB_P1_ROUTE_HC61 EQU 0x400f333d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC62
CYREG_UDB_P1_ROUTE_HC62 EQU 0x400f333e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC63
CYREG_UDB_P1_ROUTE_HC63 EQU 0x400f333f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC64
CYREG_UDB_P1_ROUTE_HC64 EQU 0x400f3340
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC65
CYREG_UDB_P1_ROUTE_HC65 EQU 0x400f3341
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC66
CYREG_UDB_P1_ROUTE_HC66 EQU 0x400f3342
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC67
CYREG_UDB_P1_ROUTE_HC67 EQU 0x400f3343
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC68
CYREG_UDB_P1_ROUTE_HC68 EQU 0x400f3344
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC69
CYREG_UDB_P1_ROUTE_HC69 EQU 0x400f3345
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC70
CYREG_UDB_P1_ROUTE_HC70 EQU 0x400f3346
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC71
CYREG_UDB_P1_ROUTE_HC71 EQU 0x400f3347
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC72
CYREG_UDB_P1_ROUTE_HC72 EQU 0x400f3348
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC73
CYREG_UDB_P1_ROUTE_HC73 EQU 0x400f3349
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC74
CYREG_UDB_P1_ROUTE_HC74 EQU 0x400f334a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC75
CYREG_UDB_P1_ROUTE_HC75 EQU 0x400f334b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC76
CYREG_UDB_P1_ROUTE_HC76 EQU 0x400f334c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC77
CYREG_UDB_P1_ROUTE_HC77 EQU 0x400f334d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC78
CYREG_UDB_P1_ROUTE_HC78 EQU 0x400f334e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC79
CYREG_UDB_P1_ROUTE_HC79 EQU 0x400f334f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC80
CYREG_UDB_P1_ROUTE_HC80 EQU 0x400f3350
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC81
CYREG_UDB_P1_ROUTE_HC81 EQU 0x400f3351
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC82
CYREG_UDB_P1_ROUTE_HC82 EQU 0x400f3352
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC83
CYREG_UDB_P1_ROUTE_HC83 EQU 0x400f3353
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC84
CYREG_UDB_P1_ROUTE_HC84 EQU 0x400f3354
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC85
CYREG_UDB_P1_ROUTE_HC85 EQU 0x400f3355
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC86
CYREG_UDB_P1_ROUTE_HC86 EQU 0x400f3356
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC87
CYREG_UDB_P1_ROUTE_HC87 EQU 0x400f3357
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC88
CYREG_UDB_P1_ROUTE_HC88 EQU 0x400f3358
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC89
CYREG_UDB_P1_ROUTE_HC89 EQU 0x400f3359
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC90
CYREG_UDB_P1_ROUTE_HC90 EQU 0x400f335a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC91
CYREG_UDB_P1_ROUTE_HC91 EQU 0x400f335b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC92
CYREG_UDB_P1_ROUTE_HC92 EQU 0x400f335c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC93
CYREG_UDB_P1_ROUTE_HC93 EQU 0x400f335d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC94
CYREG_UDB_P1_ROUTE_HC94 EQU 0x400f335e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC95
CYREG_UDB_P1_ROUTE_HC95 EQU 0x400f335f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC96
CYREG_UDB_P1_ROUTE_HC96 EQU 0x400f3360
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC97
CYREG_UDB_P1_ROUTE_HC97 EQU 0x400f3361
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC98
CYREG_UDB_P1_ROUTE_HC98 EQU 0x400f3362
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC99
CYREG_UDB_P1_ROUTE_HC99 EQU 0x400f3363
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC100
CYREG_UDB_P1_ROUTE_HC100 EQU 0x400f3364
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC101
CYREG_UDB_P1_ROUTE_HC101 EQU 0x400f3365
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC102
CYREG_UDB_P1_ROUTE_HC102 EQU 0x400f3366
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC103
CYREG_UDB_P1_ROUTE_HC103 EQU 0x400f3367
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC104
CYREG_UDB_P1_ROUTE_HC104 EQU 0x400f3368
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC105
CYREG_UDB_P1_ROUTE_HC105 EQU 0x400f3369
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC106
CYREG_UDB_P1_ROUTE_HC106 EQU 0x400f336a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC107
CYREG_UDB_P1_ROUTE_HC107 EQU 0x400f336b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC108
CYREG_UDB_P1_ROUTE_HC108 EQU 0x400f336c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC109
CYREG_UDB_P1_ROUTE_HC109 EQU 0x400f336d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC110
CYREG_UDB_P1_ROUTE_HC110 EQU 0x400f336e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC111
CYREG_UDB_P1_ROUTE_HC111 EQU 0x400f336f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC112
CYREG_UDB_P1_ROUTE_HC112 EQU 0x400f3370
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC113
CYREG_UDB_P1_ROUTE_HC113 EQU 0x400f3371
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC114
CYREG_UDB_P1_ROUTE_HC114 EQU 0x400f3372
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC115
CYREG_UDB_P1_ROUTE_HC115 EQU 0x400f3373
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC116
CYREG_UDB_P1_ROUTE_HC116 EQU 0x400f3374
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC117
CYREG_UDB_P1_ROUTE_HC117 EQU 0x400f3375
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC118
CYREG_UDB_P1_ROUTE_HC118 EQU 0x400f3376
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC119
CYREG_UDB_P1_ROUTE_HC119 EQU 0x400f3377
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC120
CYREG_UDB_P1_ROUTE_HC120 EQU 0x400f3378
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC121
CYREG_UDB_P1_ROUTE_HC121 EQU 0x400f3379
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC122
CYREG_UDB_P1_ROUTE_HC122 EQU 0x400f337a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC123
CYREG_UDB_P1_ROUTE_HC123 EQU 0x400f337b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC124
CYREG_UDB_P1_ROUTE_HC124 EQU 0x400f337c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC125
CYREG_UDB_P1_ROUTE_HC125 EQU 0x400f337d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC126
CYREG_UDB_P1_ROUTE_HC126 EQU 0x400f337e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HC127
CYREG_UDB_P1_ROUTE_HC127 EQU 0x400f337f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L0
CYREG_UDB_P1_ROUTE_HV_L0 EQU 0x400f3380
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L1
CYREG_UDB_P1_ROUTE_HV_L1 EQU 0x400f3381
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L2
CYREG_UDB_P1_ROUTE_HV_L2 EQU 0x400f3382
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L3
CYREG_UDB_P1_ROUTE_HV_L3 EQU 0x400f3383
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L4
CYREG_UDB_P1_ROUTE_HV_L4 EQU 0x400f3384
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L5
CYREG_UDB_P1_ROUTE_HV_L5 EQU 0x400f3385
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L6
CYREG_UDB_P1_ROUTE_HV_L6 EQU 0x400f3386
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L7
CYREG_UDB_P1_ROUTE_HV_L7 EQU 0x400f3387
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L8
CYREG_UDB_P1_ROUTE_HV_L8 EQU 0x400f3388
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L9
CYREG_UDB_P1_ROUTE_HV_L9 EQU 0x400f3389
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L10
CYREG_UDB_P1_ROUTE_HV_L10 EQU 0x400f338a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L11
CYREG_UDB_P1_ROUTE_HV_L11 EQU 0x400f338b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L12
CYREG_UDB_P1_ROUTE_HV_L12 EQU 0x400f338c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L13
CYREG_UDB_P1_ROUTE_HV_L13 EQU 0x400f338d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L14
CYREG_UDB_P1_ROUTE_HV_L14 EQU 0x400f338e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_L15
CYREG_UDB_P1_ROUTE_HV_L15 EQU 0x400f338f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS0
CYREG_UDB_P1_ROUTE_HS0 EQU 0x400f3390
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS1
CYREG_UDB_P1_ROUTE_HS1 EQU 0x400f3391
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS2
CYREG_UDB_P1_ROUTE_HS2 EQU 0x400f3392
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS3
CYREG_UDB_P1_ROUTE_HS3 EQU 0x400f3393
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS4
CYREG_UDB_P1_ROUTE_HS4 EQU 0x400f3394
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS5
CYREG_UDB_P1_ROUTE_HS5 EQU 0x400f3395
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS6
CYREG_UDB_P1_ROUTE_HS6 EQU 0x400f3396
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS7
CYREG_UDB_P1_ROUTE_HS7 EQU 0x400f3397
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS8
CYREG_UDB_P1_ROUTE_HS8 EQU 0x400f3398
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS9
CYREG_UDB_P1_ROUTE_HS9 EQU 0x400f3399
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS10
CYREG_UDB_P1_ROUTE_HS10 EQU 0x400f339a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS11
CYREG_UDB_P1_ROUTE_HS11 EQU 0x400f339b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS12
CYREG_UDB_P1_ROUTE_HS12 EQU 0x400f339c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS13
CYREG_UDB_P1_ROUTE_HS13 EQU 0x400f339d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS14
CYREG_UDB_P1_ROUTE_HS14 EQU 0x400f339e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS15
CYREG_UDB_P1_ROUTE_HS15 EQU 0x400f339f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS16
CYREG_UDB_P1_ROUTE_HS16 EQU 0x400f33a0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS17
CYREG_UDB_P1_ROUTE_HS17 EQU 0x400f33a1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS18
CYREG_UDB_P1_ROUTE_HS18 EQU 0x400f33a2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS19
CYREG_UDB_P1_ROUTE_HS19 EQU 0x400f33a3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS20
CYREG_UDB_P1_ROUTE_HS20 EQU 0x400f33a4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS21
CYREG_UDB_P1_ROUTE_HS21 EQU 0x400f33a5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS22
CYREG_UDB_P1_ROUTE_HS22 EQU 0x400f33a6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HS23
CYREG_UDB_P1_ROUTE_HS23 EQU 0x400f33a7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R0
CYREG_UDB_P1_ROUTE_HV_R0 EQU 0x400f33a8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R1
CYREG_UDB_P1_ROUTE_HV_R1 EQU 0x400f33a9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R2
CYREG_UDB_P1_ROUTE_HV_R2 EQU 0x400f33aa
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R3
CYREG_UDB_P1_ROUTE_HV_R3 EQU 0x400f33ab
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R4
CYREG_UDB_P1_ROUTE_HV_R4 EQU 0x400f33ac
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R5
CYREG_UDB_P1_ROUTE_HV_R5 EQU 0x400f33ad
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R6
CYREG_UDB_P1_ROUTE_HV_R6 EQU 0x400f33ae
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R7
CYREG_UDB_P1_ROUTE_HV_R7 EQU 0x400f33af
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R8
CYREG_UDB_P1_ROUTE_HV_R8 EQU 0x400f33b0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R9
CYREG_UDB_P1_ROUTE_HV_R9 EQU 0x400f33b1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R10
CYREG_UDB_P1_ROUTE_HV_R10 EQU 0x400f33b2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R11
CYREG_UDB_P1_ROUTE_HV_R11 EQU 0x400f33b3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R12
CYREG_UDB_P1_ROUTE_HV_R12 EQU 0x400f33b4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R13
CYREG_UDB_P1_ROUTE_HV_R13 EQU 0x400f33b5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R14
CYREG_UDB_P1_ROUTE_HV_R14 EQU 0x400f33b6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_HV_R15
CYREG_UDB_P1_ROUTE_HV_R15 EQU 0x400f33b7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD0IN0
CYREG_UDB_P1_ROUTE_PLD0IN0 EQU 0x400f33c0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD0IN1
CYREG_UDB_P1_ROUTE_PLD0IN1 EQU 0x400f33c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD0IN2
CYREG_UDB_P1_ROUTE_PLD0IN2 EQU 0x400f33c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD1IN0
CYREG_UDB_P1_ROUTE_PLD1IN0 EQU 0x400f33ca
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD1IN1
CYREG_UDB_P1_ROUTE_PLD1IN1 EQU 0x400f33cc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_PLD1IN2
CYREG_UDB_P1_ROUTE_PLD1IN2 EQU 0x400f33ce
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_DPIN0
CYREG_UDB_P1_ROUTE_DPIN0 EQU 0x400f33d0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_DPIN1
CYREG_UDB_P1_ROUTE_DPIN1 EQU 0x400f33d2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_SCIN
CYREG_UDB_P1_ROUTE_SCIN EQU 0x400f33d6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_SCIOIN
CYREG_UDB_P1_ROUTE_SCIOIN EQU 0x400f33d8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_RCIN
CYREG_UDB_P1_ROUTE_RCIN EQU 0x400f33de
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS0
CYREG_UDB_P1_ROUTE_VS0 EQU 0x400f33e0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS1
CYREG_UDB_P1_ROUTE_VS1 EQU 0x400f33e2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS2
CYREG_UDB_P1_ROUTE_VS2 EQU 0x400f33e4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS3
CYREG_UDB_P1_ROUTE_VS3 EQU 0x400f33e6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS4
CYREG_UDB_P1_ROUTE_VS4 EQU 0x400f33e8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS5
CYREG_UDB_P1_ROUTE_VS5 EQU 0x400f33ea
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS6
CYREG_UDB_P1_ROUTE_VS6 EQU 0x400f33ec
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_P1_ROUTE_VS7
CYREG_UDB_P1_ROUTE_VS7 EQU 0x400f33ee
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_DSI0_BASE
CYDEV_UDB_DSI0_BASE EQU 0x400f4000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_DSI0_SIZE
CYDEV_UDB_DSI0_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC0
CYREG_UDB_DSI0_HC0 EQU 0x400f4000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_HC_BYTE__OFFSET
CYFLD_UDB_DSI_HC_BYTE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_HC_BYTE__SIZE
CYFLD_UDB_DSI_HC_BYTE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC1
CYREG_UDB_DSI0_HC1 EQU 0x400f4001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC2
CYREG_UDB_DSI0_HC2 EQU 0x400f4002
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC3
CYREG_UDB_DSI0_HC3 EQU 0x400f4003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC4
CYREG_UDB_DSI0_HC4 EQU 0x400f4004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC5
CYREG_UDB_DSI0_HC5 EQU 0x400f4005
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC6
CYREG_UDB_DSI0_HC6 EQU 0x400f4006
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC7
CYREG_UDB_DSI0_HC7 EQU 0x400f4007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC8
CYREG_UDB_DSI0_HC8 EQU 0x400f4008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC9
CYREG_UDB_DSI0_HC9 EQU 0x400f4009
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC10
CYREG_UDB_DSI0_HC10 EQU 0x400f400a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC11
CYREG_UDB_DSI0_HC11 EQU 0x400f400b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC12
CYREG_UDB_DSI0_HC12 EQU 0x400f400c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC13
CYREG_UDB_DSI0_HC13 EQU 0x400f400d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC14
CYREG_UDB_DSI0_HC14 EQU 0x400f400e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC15
CYREG_UDB_DSI0_HC15 EQU 0x400f400f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC16
CYREG_UDB_DSI0_HC16 EQU 0x400f4010
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC17
CYREG_UDB_DSI0_HC17 EQU 0x400f4011
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC18
CYREG_UDB_DSI0_HC18 EQU 0x400f4012
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC19
CYREG_UDB_DSI0_HC19 EQU 0x400f4013
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC20
CYREG_UDB_DSI0_HC20 EQU 0x400f4014
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC21
CYREG_UDB_DSI0_HC21 EQU 0x400f4015
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC22
CYREG_UDB_DSI0_HC22 EQU 0x400f4016
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC23
CYREG_UDB_DSI0_HC23 EQU 0x400f4017
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC24
CYREG_UDB_DSI0_HC24 EQU 0x400f4018
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC25
CYREG_UDB_DSI0_HC25 EQU 0x400f4019
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC26
CYREG_UDB_DSI0_HC26 EQU 0x400f401a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC27
CYREG_UDB_DSI0_HC27 EQU 0x400f401b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC28
CYREG_UDB_DSI0_HC28 EQU 0x400f401c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC29
CYREG_UDB_DSI0_HC29 EQU 0x400f401d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC30
CYREG_UDB_DSI0_HC30 EQU 0x400f401e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC31
CYREG_UDB_DSI0_HC31 EQU 0x400f401f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC32
CYREG_UDB_DSI0_HC32 EQU 0x400f4020
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC33
CYREG_UDB_DSI0_HC33 EQU 0x400f4021
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC34
CYREG_UDB_DSI0_HC34 EQU 0x400f4022
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC35
CYREG_UDB_DSI0_HC35 EQU 0x400f4023
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC36
CYREG_UDB_DSI0_HC36 EQU 0x400f4024
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC37
CYREG_UDB_DSI0_HC37 EQU 0x400f4025
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC38
CYREG_UDB_DSI0_HC38 EQU 0x400f4026
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC39
CYREG_UDB_DSI0_HC39 EQU 0x400f4027
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC40
CYREG_UDB_DSI0_HC40 EQU 0x400f4028
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC41
CYREG_UDB_DSI0_HC41 EQU 0x400f4029
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC42
CYREG_UDB_DSI0_HC42 EQU 0x400f402a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC43
CYREG_UDB_DSI0_HC43 EQU 0x400f402b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC44
CYREG_UDB_DSI0_HC44 EQU 0x400f402c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC45
CYREG_UDB_DSI0_HC45 EQU 0x400f402d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC46
CYREG_UDB_DSI0_HC46 EQU 0x400f402e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC47
CYREG_UDB_DSI0_HC47 EQU 0x400f402f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC48
CYREG_UDB_DSI0_HC48 EQU 0x400f4030
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC49
CYREG_UDB_DSI0_HC49 EQU 0x400f4031
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC50
CYREG_UDB_DSI0_HC50 EQU 0x400f4032
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC51
CYREG_UDB_DSI0_HC51 EQU 0x400f4033
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC52
CYREG_UDB_DSI0_HC52 EQU 0x400f4034
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC53
CYREG_UDB_DSI0_HC53 EQU 0x400f4035
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC54
CYREG_UDB_DSI0_HC54 EQU 0x400f4036
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC55
CYREG_UDB_DSI0_HC55 EQU 0x400f4037
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC56
CYREG_UDB_DSI0_HC56 EQU 0x400f4038
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC57
CYREG_UDB_DSI0_HC57 EQU 0x400f4039
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC58
CYREG_UDB_DSI0_HC58 EQU 0x400f403a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC59
CYREG_UDB_DSI0_HC59 EQU 0x400f403b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC60
CYREG_UDB_DSI0_HC60 EQU 0x400f403c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC61
CYREG_UDB_DSI0_HC61 EQU 0x400f403d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC62
CYREG_UDB_DSI0_HC62 EQU 0x400f403e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC63
CYREG_UDB_DSI0_HC63 EQU 0x400f403f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC64
CYREG_UDB_DSI0_HC64 EQU 0x400f4040
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC65
CYREG_UDB_DSI0_HC65 EQU 0x400f4041
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC66
CYREG_UDB_DSI0_HC66 EQU 0x400f4042
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC67
CYREG_UDB_DSI0_HC67 EQU 0x400f4043
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC68
CYREG_UDB_DSI0_HC68 EQU 0x400f4044
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC69
CYREG_UDB_DSI0_HC69 EQU 0x400f4045
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC70
CYREG_UDB_DSI0_HC70 EQU 0x400f4046
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC71
CYREG_UDB_DSI0_HC71 EQU 0x400f4047
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC72
CYREG_UDB_DSI0_HC72 EQU 0x400f4048
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC73
CYREG_UDB_DSI0_HC73 EQU 0x400f4049
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC74
CYREG_UDB_DSI0_HC74 EQU 0x400f404a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC75
CYREG_UDB_DSI0_HC75 EQU 0x400f404b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC76
CYREG_UDB_DSI0_HC76 EQU 0x400f404c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC77
CYREG_UDB_DSI0_HC77 EQU 0x400f404d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC78
CYREG_UDB_DSI0_HC78 EQU 0x400f404e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC79
CYREG_UDB_DSI0_HC79 EQU 0x400f404f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC80
CYREG_UDB_DSI0_HC80 EQU 0x400f4050
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC81
CYREG_UDB_DSI0_HC81 EQU 0x400f4051
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC82
CYREG_UDB_DSI0_HC82 EQU 0x400f4052
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC83
CYREG_UDB_DSI0_HC83 EQU 0x400f4053
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC84
CYREG_UDB_DSI0_HC84 EQU 0x400f4054
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC85
CYREG_UDB_DSI0_HC85 EQU 0x400f4055
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC86
CYREG_UDB_DSI0_HC86 EQU 0x400f4056
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC87
CYREG_UDB_DSI0_HC87 EQU 0x400f4057
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC88
CYREG_UDB_DSI0_HC88 EQU 0x400f4058
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC89
CYREG_UDB_DSI0_HC89 EQU 0x400f4059
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC90
CYREG_UDB_DSI0_HC90 EQU 0x400f405a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC91
CYREG_UDB_DSI0_HC91 EQU 0x400f405b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC92
CYREG_UDB_DSI0_HC92 EQU 0x400f405c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC93
CYREG_UDB_DSI0_HC93 EQU 0x400f405d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC94
CYREG_UDB_DSI0_HC94 EQU 0x400f405e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC95
CYREG_UDB_DSI0_HC95 EQU 0x400f405f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC96
CYREG_UDB_DSI0_HC96 EQU 0x400f4060
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC97
CYREG_UDB_DSI0_HC97 EQU 0x400f4061
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC98
CYREG_UDB_DSI0_HC98 EQU 0x400f4062
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC99
CYREG_UDB_DSI0_HC99 EQU 0x400f4063
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC100
CYREG_UDB_DSI0_HC100 EQU 0x400f4064
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC101
CYREG_UDB_DSI0_HC101 EQU 0x400f4065
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC102
CYREG_UDB_DSI0_HC102 EQU 0x400f4066
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC103
CYREG_UDB_DSI0_HC103 EQU 0x400f4067
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC104
CYREG_UDB_DSI0_HC104 EQU 0x400f4068
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC105
CYREG_UDB_DSI0_HC105 EQU 0x400f4069
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC106
CYREG_UDB_DSI0_HC106 EQU 0x400f406a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC107
CYREG_UDB_DSI0_HC107 EQU 0x400f406b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC108
CYREG_UDB_DSI0_HC108 EQU 0x400f406c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC109
CYREG_UDB_DSI0_HC109 EQU 0x400f406d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC110
CYREG_UDB_DSI0_HC110 EQU 0x400f406e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC111
CYREG_UDB_DSI0_HC111 EQU 0x400f406f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC112
CYREG_UDB_DSI0_HC112 EQU 0x400f4070
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC113
CYREG_UDB_DSI0_HC113 EQU 0x400f4071
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC114
CYREG_UDB_DSI0_HC114 EQU 0x400f4072
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC115
CYREG_UDB_DSI0_HC115 EQU 0x400f4073
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC116
CYREG_UDB_DSI0_HC116 EQU 0x400f4074
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC117
CYREG_UDB_DSI0_HC117 EQU 0x400f4075
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC118
CYREG_UDB_DSI0_HC118 EQU 0x400f4076
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC119
CYREG_UDB_DSI0_HC119 EQU 0x400f4077
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC120
CYREG_UDB_DSI0_HC120 EQU 0x400f4078
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC121
CYREG_UDB_DSI0_HC121 EQU 0x400f4079
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC122
CYREG_UDB_DSI0_HC122 EQU 0x400f407a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC123
CYREG_UDB_DSI0_HC123 EQU 0x400f407b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC124
CYREG_UDB_DSI0_HC124 EQU 0x400f407c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC125
CYREG_UDB_DSI0_HC125 EQU 0x400f407d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC126
CYREG_UDB_DSI0_HC126 EQU 0x400f407e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HC127
CYREG_UDB_DSI0_HC127 EQU 0x400f407f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L0
CYREG_UDB_DSI0_HV_L0 EQU 0x400f4080
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_HV_BYTE__OFFSET
CYFLD_UDB_DSI_HV_BYTE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_HV_BYTE__SIZE
CYFLD_UDB_DSI_HV_BYTE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L1
CYREG_UDB_DSI0_HV_L1 EQU 0x400f4081
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L2
CYREG_UDB_DSI0_HV_L2 EQU 0x400f4082
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L3
CYREG_UDB_DSI0_HV_L3 EQU 0x400f4083
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L4
CYREG_UDB_DSI0_HV_L4 EQU 0x400f4084
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L5
CYREG_UDB_DSI0_HV_L5 EQU 0x400f4085
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L6
CYREG_UDB_DSI0_HV_L6 EQU 0x400f4086
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L7
CYREG_UDB_DSI0_HV_L7 EQU 0x400f4087
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L8
CYREG_UDB_DSI0_HV_L8 EQU 0x400f4088
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L9
CYREG_UDB_DSI0_HV_L9 EQU 0x400f4089
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L10
CYREG_UDB_DSI0_HV_L10 EQU 0x400f408a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L11
CYREG_UDB_DSI0_HV_L11 EQU 0x400f408b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L12
CYREG_UDB_DSI0_HV_L12 EQU 0x400f408c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L13
CYREG_UDB_DSI0_HV_L13 EQU 0x400f408d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L14
CYREG_UDB_DSI0_HV_L14 EQU 0x400f408e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_L15
CYREG_UDB_DSI0_HV_L15 EQU 0x400f408f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS0
CYREG_UDB_DSI0_HS0 EQU 0x400f4090
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_HS_BYTE__OFFSET
CYFLD_UDB_DSI_HS_BYTE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_HS_BYTE__SIZE
CYFLD_UDB_DSI_HS_BYTE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS1
CYREG_UDB_DSI0_HS1 EQU 0x400f4091
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS2
CYREG_UDB_DSI0_HS2 EQU 0x400f4092
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS3
CYREG_UDB_DSI0_HS3 EQU 0x400f4093
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS4
CYREG_UDB_DSI0_HS4 EQU 0x400f4094
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS5
CYREG_UDB_DSI0_HS5 EQU 0x400f4095
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS6
CYREG_UDB_DSI0_HS6 EQU 0x400f4096
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS7
CYREG_UDB_DSI0_HS7 EQU 0x400f4097
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS8
CYREG_UDB_DSI0_HS8 EQU 0x400f4098
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS9
CYREG_UDB_DSI0_HS9 EQU 0x400f4099
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS10
CYREG_UDB_DSI0_HS10 EQU 0x400f409a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS11
CYREG_UDB_DSI0_HS11 EQU 0x400f409b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS12
CYREG_UDB_DSI0_HS12 EQU 0x400f409c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS13
CYREG_UDB_DSI0_HS13 EQU 0x400f409d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS14
CYREG_UDB_DSI0_HS14 EQU 0x400f409e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS15
CYREG_UDB_DSI0_HS15 EQU 0x400f409f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS16
CYREG_UDB_DSI0_HS16 EQU 0x400f40a0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS17
CYREG_UDB_DSI0_HS17 EQU 0x400f40a1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS18
CYREG_UDB_DSI0_HS18 EQU 0x400f40a2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS19
CYREG_UDB_DSI0_HS19 EQU 0x400f40a3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS20
CYREG_UDB_DSI0_HS20 EQU 0x400f40a4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS21
CYREG_UDB_DSI0_HS21 EQU 0x400f40a5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS22
CYREG_UDB_DSI0_HS22 EQU 0x400f40a6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HS23
CYREG_UDB_DSI0_HS23 EQU 0x400f40a7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R0
CYREG_UDB_DSI0_HV_R0 EQU 0x400f40a8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R1
CYREG_UDB_DSI0_HV_R1 EQU 0x400f40a9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R2
CYREG_UDB_DSI0_HV_R2 EQU 0x400f40aa
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R3
CYREG_UDB_DSI0_HV_R3 EQU 0x400f40ab
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R4
CYREG_UDB_DSI0_HV_R4 EQU 0x400f40ac
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R5
CYREG_UDB_DSI0_HV_R5 EQU 0x400f40ad
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R6
CYREG_UDB_DSI0_HV_R6 EQU 0x400f40ae
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R7
CYREG_UDB_DSI0_HV_R7 EQU 0x400f40af
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R8
CYREG_UDB_DSI0_HV_R8 EQU 0x400f40b0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R9
CYREG_UDB_DSI0_HV_R9 EQU 0x400f40b1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R10
CYREG_UDB_DSI0_HV_R10 EQU 0x400f40b2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R11
CYREG_UDB_DSI0_HV_R11 EQU 0x400f40b3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R12
CYREG_UDB_DSI0_HV_R12 EQU 0x400f40b4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R13
CYREG_UDB_DSI0_HV_R13 EQU 0x400f40b5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R14
CYREG_UDB_DSI0_HV_R14 EQU 0x400f40b6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_HV_R15
CYREG_UDB_DSI0_HV_R15 EQU 0x400f40b7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP0
CYREG_UDB_DSI0_DSIINP0 EQU 0x400f40c0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_PI_TOP__OFFSET
CYFLD_UDB_DSI_PI_TOP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_PI_TOP__SIZE
CYFLD_UDB_DSI_PI_TOP__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_PI_BOT__OFFSET
CYFLD_UDB_DSI_PI_BOT__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_PI_BOT__SIZE
CYFLD_UDB_DSI_PI_BOT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP1
CYREG_UDB_DSI0_DSIINP1 EQU 0x400f40c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP2
CYREG_UDB_DSI0_DSIINP2 EQU 0x400f40c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP3
CYREG_UDB_DSI0_DSIINP3 EQU 0x400f40c6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP4
CYREG_UDB_DSI0_DSIINP4 EQU 0x400f40c8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIINP5
CYREG_UDB_DSI0_DSIINP5 EQU 0x400f40ca
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTP0
CYREG_UDB_DSI0_DSIOUTP0 EQU 0x400f40cc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTP1
CYREG_UDB_DSI0_DSIOUTP1 EQU 0x400f40ce
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTP2
CYREG_UDB_DSI0_DSIOUTP2 EQU 0x400f40d0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTP3
CYREG_UDB_DSI0_DSIOUTP3 EQU 0x400f40d2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT0
CYREG_UDB_DSI0_DSIOUTT0 EQU 0x400f40d4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT1
CYREG_UDB_DSI0_DSIOUTT1 EQU 0x400f40d6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT2
CYREG_UDB_DSI0_DSIOUTT2 EQU 0x400f40d8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT3
CYREG_UDB_DSI0_DSIOUTT3 EQU 0x400f40da
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT4
CYREG_UDB_DSI0_DSIOUTT4 EQU 0x400f40dc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_DSIOUTT5
CYREG_UDB_DSI0_DSIOUTT5 EQU 0x400f40de
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_VS0
CYREG_UDB_DSI0_VS0 EQU 0x400f40e0
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_VS_TOP__OFFSET
CYFLD_UDB_DSI_VS_TOP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_VS_TOP__SIZE
CYFLD_UDB_DSI_VS_TOP__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_VS_BOT__OFFSET
CYFLD_UDB_DSI_VS_BOT__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_DSI_VS_BOT__SIZE
CYFLD_UDB_DSI_VS_BOT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_VS1
CYREG_UDB_DSI0_VS1 EQU 0x400f40e2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_VS2
CYREG_UDB_DSI0_VS2 EQU 0x400f40e4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_VS3
CYREG_UDB_DSI0_VS3 EQU 0x400f40e6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_VS4
CYREG_UDB_DSI0_VS4 EQU 0x400f40e8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_VS5
CYREG_UDB_DSI0_VS5 EQU 0x400f40ea
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_VS6
CYREG_UDB_DSI0_VS6 EQU 0x400f40ec
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI0_VS7
CYREG_UDB_DSI0_VS7 EQU 0x400f40ee
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_DSI1_BASE
CYDEV_UDB_DSI1_BASE EQU 0x400f4100
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_DSI1_SIZE
CYDEV_UDB_DSI1_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC0
CYREG_UDB_DSI1_HC0 EQU 0x400f4100
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC1
CYREG_UDB_DSI1_HC1 EQU 0x400f4101
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC2
CYREG_UDB_DSI1_HC2 EQU 0x400f4102
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC3
CYREG_UDB_DSI1_HC3 EQU 0x400f4103
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC4
CYREG_UDB_DSI1_HC4 EQU 0x400f4104
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC5
CYREG_UDB_DSI1_HC5 EQU 0x400f4105
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC6
CYREG_UDB_DSI1_HC6 EQU 0x400f4106
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC7
CYREG_UDB_DSI1_HC7 EQU 0x400f4107
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC8
CYREG_UDB_DSI1_HC8 EQU 0x400f4108
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC9
CYREG_UDB_DSI1_HC9 EQU 0x400f4109
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC10
CYREG_UDB_DSI1_HC10 EQU 0x400f410a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC11
CYREG_UDB_DSI1_HC11 EQU 0x400f410b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC12
CYREG_UDB_DSI1_HC12 EQU 0x400f410c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC13
CYREG_UDB_DSI1_HC13 EQU 0x400f410d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC14
CYREG_UDB_DSI1_HC14 EQU 0x400f410e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC15
CYREG_UDB_DSI1_HC15 EQU 0x400f410f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC16
CYREG_UDB_DSI1_HC16 EQU 0x400f4110
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC17
CYREG_UDB_DSI1_HC17 EQU 0x400f4111
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC18
CYREG_UDB_DSI1_HC18 EQU 0x400f4112
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC19
CYREG_UDB_DSI1_HC19 EQU 0x400f4113
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC20
CYREG_UDB_DSI1_HC20 EQU 0x400f4114
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC21
CYREG_UDB_DSI1_HC21 EQU 0x400f4115
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC22
CYREG_UDB_DSI1_HC22 EQU 0x400f4116
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC23
CYREG_UDB_DSI1_HC23 EQU 0x400f4117
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC24
CYREG_UDB_DSI1_HC24 EQU 0x400f4118
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC25
CYREG_UDB_DSI1_HC25 EQU 0x400f4119
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC26
CYREG_UDB_DSI1_HC26 EQU 0x400f411a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC27
CYREG_UDB_DSI1_HC27 EQU 0x400f411b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC28
CYREG_UDB_DSI1_HC28 EQU 0x400f411c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC29
CYREG_UDB_DSI1_HC29 EQU 0x400f411d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC30
CYREG_UDB_DSI1_HC30 EQU 0x400f411e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC31
CYREG_UDB_DSI1_HC31 EQU 0x400f411f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC32
CYREG_UDB_DSI1_HC32 EQU 0x400f4120
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC33
CYREG_UDB_DSI1_HC33 EQU 0x400f4121
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC34
CYREG_UDB_DSI1_HC34 EQU 0x400f4122
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC35
CYREG_UDB_DSI1_HC35 EQU 0x400f4123
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC36
CYREG_UDB_DSI1_HC36 EQU 0x400f4124
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC37
CYREG_UDB_DSI1_HC37 EQU 0x400f4125
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC38
CYREG_UDB_DSI1_HC38 EQU 0x400f4126
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC39
CYREG_UDB_DSI1_HC39 EQU 0x400f4127
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC40
CYREG_UDB_DSI1_HC40 EQU 0x400f4128
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC41
CYREG_UDB_DSI1_HC41 EQU 0x400f4129
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC42
CYREG_UDB_DSI1_HC42 EQU 0x400f412a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC43
CYREG_UDB_DSI1_HC43 EQU 0x400f412b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC44
CYREG_UDB_DSI1_HC44 EQU 0x400f412c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC45
CYREG_UDB_DSI1_HC45 EQU 0x400f412d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC46
CYREG_UDB_DSI1_HC46 EQU 0x400f412e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC47
CYREG_UDB_DSI1_HC47 EQU 0x400f412f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC48
CYREG_UDB_DSI1_HC48 EQU 0x400f4130
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC49
CYREG_UDB_DSI1_HC49 EQU 0x400f4131
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC50
CYREG_UDB_DSI1_HC50 EQU 0x400f4132
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC51
CYREG_UDB_DSI1_HC51 EQU 0x400f4133
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC52
CYREG_UDB_DSI1_HC52 EQU 0x400f4134
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC53
CYREG_UDB_DSI1_HC53 EQU 0x400f4135
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC54
CYREG_UDB_DSI1_HC54 EQU 0x400f4136
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC55
CYREG_UDB_DSI1_HC55 EQU 0x400f4137
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC56
CYREG_UDB_DSI1_HC56 EQU 0x400f4138
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC57
CYREG_UDB_DSI1_HC57 EQU 0x400f4139
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC58
CYREG_UDB_DSI1_HC58 EQU 0x400f413a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC59
CYREG_UDB_DSI1_HC59 EQU 0x400f413b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC60
CYREG_UDB_DSI1_HC60 EQU 0x400f413c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC61
CYREG_UDB_DSI1_HC61 EQU 0x400f413d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC62
CYREG_UDB_DSI1_HC62 EQU 0x400f413e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC63
CYREG_UDB_DSI1_HC63 EQU 0x400f413f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC64
CYREG_UDB_DSI1_HC64 EQU 0x400f4140
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC65
CYREG_UDB_DSI1_HC65 EQU 0x400f4141
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC66
CYREG_UDB_DSI1_HC66 EQU 0x400f4142
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC67
CYREG_UDB_DSI1_HC67 EQU 0x400f4143
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC68
CYREG_UDB_DSI1_HC68 EQU 0x400f4144
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC69
CYREG_UDB_DSI1_HC69 EQU 0x400f4145
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC70
CYREG_UDB_DSI1_HC70 EQU 0x400f4146
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC71
CYREG_UDB_DSI1_HC71 EQU 0x400f4147
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC72
CYREG_UDB_DSI1_HC72 EQU 0x400f4148
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC73
CYREG_UDB_DSI1_HC73 EQU 0x400f4149
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC74
CYREG_UDB_DSI1_HC74 EQU 0x400f414a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC75
CYREG_UDB_DSI1_HC75 EQU 0x400f414b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC76
CYREG_UDB_DSI1_HC76 EQU 0x400f414c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC77
CYREG_UDB_DSI1_HC77 EQU 0x400f414d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC78
CYREG_UDB_DSI1_HC78 EQU 0x400f414e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC79
CYREG_UDB_DSI1_HC79 EQU 0x400f414f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC80
CYREG_UDB_DSI1_HC80 EQU 0x400f4150
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC81
CYREG_UDB_DSI1_HC81 EQU 0x400f4151
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC82
CYREG_UDB_DSI1_HC82 EQU 0x400f4152
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC83
CYREG_UDB_DSI1_HC83 EQU 0x400f4153
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC84
CYREG_UDB_DSI1_HC84 EQU 0x400f4154
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC85
CYREG_UDB_DSI1_HC85 EQU 0x400f4155
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC86
CYREG_UDB_DSI1_HC86 EQU 0x400f4156
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC87
CYREG_UDB_DSI1_HC87 EQU 0x400f4157
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC88
CYREG_UDB_DSI1_HC88 EQU 0x400f4158
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC89
CYREG_UDB_DSI1_HC89 EQU 0x400f4159
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC90
CYREG_UDB_DSI1_HC90 EQU 0x400f415a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC91
CYREG_UDB_DSI1_HC91 EQU 0x400f415b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC92
CYREG_UDB_DSI1_HC92 EQU 0x400f415c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC93
CYREG_UDB_DSI1_HC93 EQU 0x400f415d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC94
CYREG_UDB_DSI1_HC94 EQU 0x400f415e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC95
CYREG_UDB_DSI1_HC95 EQU 0x400f415f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC96
CYREG_UDB_DSI1_HC96 EQU 0x400f4160
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC97
CYREG_UDB_DSI1_HC97 EQU 0x400f4161
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC98
CYREG_UDB_DSI1_HC98 EQU 0x400f4162
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC99
CYREG_UDB_DSI1_HC99 EQU 0x400f4163
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC100
CYREG_UDB_DSI1_HC100 EQU 0x400f4164
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC101
CYREG_UDB_DSI1_HC101 EQU 0x400f4165
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC102
CYREG_UDB_DSI1_HC102 EQU 0x400f4166
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC103
CYREG_UDB_DSI1_HC103 EQU 0x400f4167
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC104
CYREG_UDB_DSI1_HC104 EQU 0x400f4168
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC105
CYREG_UDB_DSI1_HC105 EQU 0x400f4169
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC106
CYREG_UDB_DSI1_HC106 EQU 0x400f416a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC107
CYREG_UDB_DSI1_HC107 EQU 0x400f416b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC108
CYREG_UDB_DSI1_HC108 EQU 0x400f416c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC109
CYREG_UDB_DSI1_HC109 EQU 0x400f416d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC110
CYREG_UDB_DSI1_HC110 EQU 0x400f416e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC111
CYREG_UDB_DSI1_HC111 EQU 0x400f416f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC112
CYREG_UDB_DSI1_HC112 EQU 0x400f4170
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC113
CYREG_UDB_DSI1_HC113 EQU 0x400f4171
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC114
CYREG_UDB_DSI1_HC114 EQU 0x400f4172
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC115
CYREG_UDB_DSI1_HC115 EQU 0x400f4173
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC116
CYREG_UDB_DSI1_HC116 EQU 0x400f4174
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC117
CYREG_UDB_DSI1_HC117 EQU 0x400f4175
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC118
CYREG_UDB_DSI1_HC118 EQU 0x400f4176
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC119
CYREG_UDB_DSI1_HC119 EQU 0x400f4177
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC120
CYREG_UDB_DSI1_HC120 EQU 0x400f4178
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC121
CYREG_UDB_DSI1_HC121 EQU 0x400f4179
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC122
CYREG_UDB_DSI1_HC122 EQU 0x400f417a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC123
CYREG_UDB_DSI1_HC123 EQU 0x400f417b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC124
CYREG_UDB_DSI1_HC124 EQU 0x400f417c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC125
CYREG_UDB_DSI1_HC125 EQU 0x400f417d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC126
CYREG_UDB_DSI1_HC126 EQU 0x400f417e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HC127
CYREG_UDB_DSI1_HC127 EQU 0x400f417f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L0
CYREG_UDB_DSI1_HV_L0 EQU 0x400f4180
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L1
CYREG_UDB_DSI1_HV_L1 EQU 0x400f4181
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L2
CYREG_UDB_DSI1_HV_L2 EQU 0x400f4182
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L3
CYREG_UDB_DSI1_HV_L3 EQU 0x400f4183
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L4
CYREG_UDB_DSI1_HV_L4 EQU 0x400f4184
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L5
CYREG_UDB_DSI1_HV_L5 EQU 0x400f4185
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L6
CYREG_UDB_DSI1_HV_L6 EQU 0x400f4186
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L7
CYREG_UDB_DSI1_HV_L7 EQU 0x400f4187
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L8
CYREG_UDB_DSI1_HV_L8 EQU 0x400f4188
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L9
CYREG_UDB_DSI1_HV_L9 EQU 0x400f4189
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L10
CYREG_UDB_DSI1_HV_L10 EQU 0x400f418a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L11
CYREG_UDB_DSI1_HV_L11 EQU 0x400f418b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L12
CYREG_UDB_DSI1_HV_L12 EQU 0x400f418c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L13
CYREG_UDB_DSI1_HV_L13 EQU 0x400f418d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L14
CYREG_UDB_DSI1_HV_L14 EQU 0x400f418e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_L15
CYREG_UDB_DSI1_HV_L15 EQU 0x400f418f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS0
CYREG_UDB_DSI1_HS0 EQU 0x400f4190
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS1
CYREG_UDB_DSI1_HS1 EQU 0x400f4191
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS2
CYREG_UDB_DSI1_HS2 EQU 0x400f4192
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS3
CYREG_UDB_DSI1_HS3 EQU 0x400f4193
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS4
CYREG_UDB_DSI1_HS4 EQU 0x400f4194
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS5
CYREG_UDB_DSI1_HS5 EQU 0x400f4195
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS6
CYREG_UDB_DSI1_HS6 EQU 0x400f4196
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS7
CYREG_UDB_DSI1_HS7 EQU 0x400f4197
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS8
CYREG_UDB_DSI1_HS8 EQU 0x400f4198
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS9
CYREG_UDB_DSI1_HS9 EQU 0x400f4199
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS10
CYREG_UDB_DSI1_HS10 EQU 0x400f419a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS11
CYREG_UDB_DSI1_HS11 EQU 0x400f419b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS12
CYREG_UDB_DSI1_HS12 EQU 0x400f419c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS13
CYREG_UDB_DSI1_HS13 EQU 0x400f419d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS14
CYREG_UDB_DSI1_HS14 EQU 0x400f419e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS15
CYREG_UDB_DSI1_HS15 EQU 0x400f419f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS16
CYREG_UDB_DSI1_HS16 EQU 0x400f41a0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS17
CYREG_UDB_DSI1_HS17 EQU 0x400f41a1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS18
CYREG_UDB_DSI1_HS18 EQU 0x400f41a2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS19
CYREG_UDB_DSI1_HS19 EQU 0x400f41a3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS20
CYREG_UDB_DSI1_HS20 EQU 0x400f41a4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS21
CYREG_UDB_DSI1_HS21 EQU 0x400f41a5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS22
CYREG_UDB_DSI1_HS22 EQU 0x400f41a6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HS23
CYREG_UDB_DSI1_HS23 EQU 0x400f41a7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R0
CYREG_UDB_DSI1_HV_R0 EQU 0x400f41a8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R1
CYREG_UDB_DSI1_HV_R1 EQU 0x400f41a9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R2
CYREG_UDB_DSI1_HV_R2 EQU 0x400f41aa
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R3
CYREG_UDB_DSI1_HV_R3 EQU 0x400f41ab
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R4
CYREG_UDB_DSI1_HV_R4 EQU 0x400f41ac
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R5
CYREG_UDB_DSI1_HV_R5 EQU 0x400f41ad
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R6
CYREG_UDB_DSI1_HV_R6 EQU 0x400f41ae
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R7
CYREG_UDB_DSI1_HV_R7 EQU 0x400f41af
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R8
CYREG_UDB_DSI1_HV_R8 EQU 0x400f41b0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R9
CYREG_UDB_DSI1_HV_R9 EQU 0x400f41b1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R10
CYREG_UDB_DSI1_HV_R10 EQU 0x400f41b2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R11
CYREG_UDB_DSI1_HV_R11 EQU 0x400f41b3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R12
CYREG_UDB_DSI1_HV_R12 EQU 0x400f41b4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R13
CYREG_UDB_DSI1_HV_R13 EQU 0x400f41b5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R14
CYREG_UDB_DSI1_HV_R14 EQU 0x400f41b6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_HV_R15
CYREG_UDB_DSI1_HV_R15 EQU 0x400f41b7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP0
CYREG_UDB_DSI1_DSIINP0 EQU 0x400f41c0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP1
CYREG_UDB_DSI1_DSIINP1 EQU 0x400f41c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP2
CYREG_UDB_DSI1_DSIINP2 EQU 0x400f41c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP3
CYREG_UDB_DSI1_DSIINP3 EQU 0x400f41c6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP4
CYREG_UDB_DSI1_DSIINP4 EQU 0x400f41c8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIINP5
CYREG_UDB_DSI1_DSIINP5 EQU 0x400f41ca
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTP0
CYREG_UDB_DSI1_DSIOUTP0 EQU 0x400f41cc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTP1
CYREG_UDB_DSI1_DSIOUTP1 EQU 0x400f41ce
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTP2
CYREG_UDB_DSI1_DSIOUTP2 EQU 0x400f41d0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTP3
CYREG_UDB_DSI1_DSIOUTP3 EQU 0x400f41d2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT0
CYREG_UDB_DSI1_DSIOUTT0 EQU 0x400f41d4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT1
CYREG_UDB_DSI1_DSIOUTT1 EQU 0x400f41d6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT2
CYREG_UDB_DSI1_DSIOUTT2 EQU 0x400f41d8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT3
CYREG_UDB_DSI1_DSIOUTT3 EQU 0x400f41da
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT4
CYREG_UDB_DSI1_DSIOUTT4 EQU 0x400f41dc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_DSIOUTT5
CYREG_UDB_DSI1_DSIOUTT5 EQU 0x400f41de
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_VS0
CYREG_UDB_DSI1_VS0 EQU 0x400f41e0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_VS1
CYREG_UDB_DSI1_VS1 EQU 0x400f41e2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_VS2
CYREG_UDB_DSI1_VS2 EQU 0x400f41e4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_VS3
CYREG_UDB_DSI1_VS3 EQU 0x400f41e6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_VS4
CYREG_UDB_DSI1_VS4 EQU 0x400f41e8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_VS5
CYREG_UDB_DSI1_VS5 EQU 0x400f41ea
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_VS6
CYREG_UDB_DSI1_VS6 EQU 0x400f41ec
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI1_VS7
CYREG_UDB_DSI1_VS7 EQU 0x400f41ee
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_DSI2_BASE
CYDEV_UDB_DSI2_BASE EQU 0x400f4200
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_DSI2_SIZE
CYDEV_UDB_DSI2_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC0
CYREG_UDB_DSI2_HC0 EQU 0x400f4200
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC1
CYREG_UDB_DSI2_HC1 EQU 0x400f4201
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC2
CYREG_UDB_DSI2_HC2 EQU 0x400f4202
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC3
CYREG_UDB_DSI2_HC3 EQU 0x400f4203
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC4
CYREG_UDB_DSI2_HC4 EQU 0x400f4204
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC5
CYREG_UDB_DSI2_HC5 EQU 0x400f4205
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC6
CYREG_UDB_DSI2_HC6 EQU 0x400f4206
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC7
CYREG_UDB_DSI2_HC7 EQU 0x400f4207
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC8
CYREG_UDB_DSI2_HC8 EQU 0x400f4208
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC9
CYREG_UDB_DSI2_HC9 EQU 0x400f4209
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC10
CYREG_UDB_DSI2_HC10 EQU 0x400f420a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC11
CYREG_UDB_DSI2_HC11 EQU 0x400f420b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC12
CYREG_UDB_DSI2_HC12 EQU 0x400f420c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC13
CYREG_UDB_DSI2_HC13 EQU 0x400f420d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC14
CYREG_UDB_DSI2_HC14 EQU 0x400f420e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC15
CYREG_UDB_DSI2_HC15 EQU 0x400f420f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC16
CYREG_UDB_DSI2_HC16 EQU 0x400f4210
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC17
CYREG_UDB_DSI2_HC17 EQU 0x400f4211
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC18
CYREG_UDB_DSI2_HC18 EQU 0x400f4212
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC19
CYREG_UDB_DSI2_HC19 EQU 0x400f4213
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC20
CYREG_UDB_DSI2_HC20 EQU 0x400f4214
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC21
CYREG_UDB_DSI2_HC21 EQU 0x400f4215
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC22
CYREG_UDB_DSI2_HC22 EQU 0x400f4216
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC23
CYREG_UDB_DSI2_HC23 EQU 0x400f4217
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC24
CYREG_UDB_DSI2_HC24 EQU 0x400f4218
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC25
CYREG_UDB_DSI2_HC25 EQU 0x400f4219
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC26
CYREG_UDB_DSI2_HC26 EQU 0x400f421a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC27
CYREG_UDB_DSI2_HC27 EQU 0x400f421b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC28
CYREG_UDB_DSI2_HC28 EQU 0x400f421c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC29
CYREG_UDB_DSI2_HC29 EQU 0x400f421d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC30
CYREG_UDB_DSI2_HC30 EQU 0x400f421e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC31
CYREG_UDB_DSI2_HC31 EQU 0x400f421f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC32
CYREG_UDB_DSI2_HC32 EQU 0x400f4220
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC33
CYREG_UDB_DSI2_HC33 EQU 0x400f4221
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC34
CYREG_UDB_DSI2_HC34 EQU 0x400f4222
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC35
CYREG_UDB_DSI2_HC35 EQU 0x400f4223
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC36
CYREG_UDB_DSI2_HC36 EQU 0x400f4224
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC37
CYREG_UDB_DSI2_HC37 EQU 0x400f4225
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC38
CYREG_UDB_DSI2_HC38 EQU 0x400f4226
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC39
CYREG_UDB_DSI2_HC39 EQU 0x400f4227
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC40
CYREG_UDB_DSI2_HC40 EQU 0x400f4228
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC41
CYREG_UDB_DSI2_HC41 EQU 0x400f4229
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC42
CYREG_UDB_DSI2_HC42 EQU 0x400f422a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC43
CYREG_UDB_DSI2_HC43 EQU 0x400f422b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC44
CYREG_UDB_DSI2_HC44 EQU 0x400f422c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC45
CYREG_UDB_DSI2_HC45 EQU 0x400f422d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC46
CYREG_UDB_DSI2_HC46 EQU 0x400f422e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC47
CYREG_UDB_DSI2_HC47 EQU 0x400f422f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC48
CYREG_UDB_DSI2_HC48 EQU 0x400f4230
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC49
CYREG_UDB_DSI2_HC49 EQU 0x400f4231
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC50
CYREG_UDB_DSI2_HC50 EQU 0x400f4232
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC51
CYREG_UDB_DSI2_HC51 EQU 0x400f4233
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC52
CYREG_UDB_DSI2_HC52 EQU 0x400f4234
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC53
CYREG_UDB_DSI2_HC53 EQU 0x400f4235
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC54
CYREG_UDB_DSI2_HC54 EQU 0x400f4236
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC55
CYREG_UDB_DSI2_HC55 EQU 0x400f4237
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC56
CYREG_UDB_DSI2_HC56 EQU 0x400f4238
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC57
CYREG_UDB_DSI2_HC57 EQU 0x400f4239
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC58
CYREG_UDB_DSI2_HC58 EQU 0x400f423a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC59
CYREG_UDB_DSI2_HC59 EQU 0x400f423b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC60
CYREG_UDB_DSI2_HC60 EQU 0x400f423c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC61
CYREG_UDB_DSI2_HC61 EQU 0x400f423d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC62
CYREG_UDB_DSI2_HC62 EQU 0x400f423e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC63
CYREG_UDB_DSI2_HC63 EQU 0x400f423f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC64
CYREG_UDB_DSI2_HC64 EQU 0x400f4240
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC65
CYREG_UDB_DSI2_HC65 EQU 0x400f4241
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC66
CYREG_UDB_DSI2_HC66 EQU 0x400f4242
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC67
CYREG_UDB_DSI2_HC67 EQU 0x400f4243
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC68
CYREG_UDB_DSI2_HC68 EQU 0x400f4244
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC69
CYREG_UDB_DSI2_HC69 EQU 0x400f4245
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC70
CYREG_UDB_DSI2_HC70 EQU 0x400f4246
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC71
CYREG_UDB_DSI2_HC71 EQU 0x400f4247
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC72
CYREG_UDB_DSI2_HC72 EQU 0x400f4248
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC73
CYREG_UDB_DSI2_HC73 EQU 0x400f4249
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC74
CYREG_UDB_DSI2_HC74 EQU 0x400f424a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC75
CYREG_UDB_DSI2_HC75 EQU 0x400f424b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC76
CYREG_UDB_DSI2_HC76 EQU 0x400f424c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC77
CYREG_UDB_DSI2_HC77 EQU 0x400f424d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC78
CYREG_UDB_DSI2_HC78 EQU 0x400f424e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC79
CYREG_UDB_DSI2_HC79 EQU 0x400f424f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC80
CYREG_UDB_DSI2_HC80 EQU 0x400f4250
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC81
CYREG_UDB_DSI2_HC81 EQU 0x400f4251
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC82
CYREG_UDB_DSI2_HC82 EQU 0x400f4252
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC83
CYREG_UDB_DSI2_HC83 EQU 0x400f4253
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC84
CYREG_UDB_DSI2_HC84 EQU 0x400f4254
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC85
CYREG_UDB_DSI2_HC85 EQU 0x400f4255
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC86
CYREG_UDB_DSI2_HC86 EQU 0x400f4256
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC87
CYREG_UDB_DSI2_HC87 EQU 0x400f4257
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC88
CYREG_UDB_DSI2_HC88 EQU 0x400f4258
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC89
CYREG_UDB_DSI2_HC89 EQU 0x400f4259
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC90
CYREG_UDB_DSI2_HC90 EQU 0x400f425a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC91
CYREG_UDB_DSI2_HC91 EQU 0x400f425b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC92
CYREG_UDB_DSI2_HC92 EQU 0x400f425c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC93
CYREG_UDB_DSI2_HC93 EQU 0x400f425d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC94
CYREG_UDB_DSI2_HC94 EQU 0x400f425e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC95
CYREG_UDB_DSI2_HC95 EQU 0x400f425f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC96
CYREG_UDB_DSI2_HC96 EQU 0x400f4260
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC97
CYREG_UDB_DSI2_HC97 EQU 0x400f4261
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC98
CYREG_UDB_DSI2_HC98 EQU 0x400f4262
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC99
CYREG_UDB_DSI2_HC99 EQU 0x400f4263
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC100
CYREG_UDB_DSI2_HC100 EQU 0x400f4264
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC101
CYREG_UDB_DSI2_HC101 EQU 0x400f4265
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC102
CYREG_UDB_DSI2_HC102 EQU 0x400f4266
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC103
CYREG_UDB_DSI2_HC103 EQU 0x400f4267
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC104
CYREG_UDB_DSI2_HC104 EQU 0x400f4268
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC105
CYREG_UDB_DSI2_HC105 EQU 0x400f4269
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC106
CYREG_UDB_DSI2_HC106 EQU 0x400f426a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC107
CYREG_UDB_DSI2_HC107 EQU 0x400f426b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC108
CYREG_UDB_DSI2_HC108 EQU 0x400f426c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC109
CYREG_UDB_DSI2_HC109 EQU 0x400f426d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC110
CYREG_UDB_DSI2_HC110 EQU 0x400f426e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC111
CYREG_UDB_DSI2_HC111 EQU 0x400f426f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC112
CYREG_UDB_DSI2_HC112 EQU 0x400f4270
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC113
CYREG_UDB_DSI2_HC113 EQU 0x400f4271
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC114
CYREG_UDB_DSI2_HC114 EQU 0x400f4272
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC115
CYREG_UDB_DSI2_HC115 EQU 0x400f4273
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC116
CYREG_UDB_DSI2_HC116 EQU 0x400f4274
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC117
CYREG_UDB_DSI2_HC117 EQU 0x400f4275
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC118
CYREG_UDB_DSI2_HC118 EQU 0x400f4276
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC119
CYREG_UDB_DSI2_HC119 EQU 0x400f4277
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC120
CYREG_UDB_DSI2_HC120 EQU 0x400f4278
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC121
CYREG_UDB_DSI2_HC121 EQU 0x400f4279
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC122
CYREG_UDB_DSI2_HC122 EQU 0x400f427a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC123
CYREG_UDB_DSI2_HC123 EQU 0x400f427b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC124
CYREG_UDB_DSI2_HC124 EQU 0x400f427c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC125
CYREG_UDB_DSI2_HC125 EQU 0x400f427d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC126
CYREG_UDB_DSI2_HC126 EQU 0x400f427e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HC127
CYREG_UDB_DSI2_HC127 EQU 0x400f427f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L0
CYREG_UDB_DSI2_HV_L0 EQU 0x400f4280
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L1
CYREG_UDB_DSI2_HV_L1 EQU 0x400f4281
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L2
CYREG_UDB_DSI2_HV_L2 EQU 0x400f4282
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L3
CYREG_UDB_DSI2_HV_L3 EQU 0x400f4283
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L4
CYREG_UDB_DSI2_HV_L4 EQU 0x400f4284
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L5
CYREG_UDB_DSI2_HV_L5 EQU 0x400f4285
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L6
CYREG_UDB_DSI2_HV_L6 EQU 0x400f4286
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L7
CYREG_UDB_DSI2_HV_L7 EQU 0x400f4287
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L8
CYREG_UDB_DSI2_HV_L8 EQU 0x400f4288
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L9
CYREG_UDB_DSI2_HV_L9 EQU 0x400f4289
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L10
CYREG_UDB_DSI2_HV_L10 EQU 0x400f428a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L11
CYREG_UDB_DSI2_HV_L11 EQU 0x400f428b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L12
CYREG_UDB_DSI2_HV_L12 EQU 0x400f428c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L13
CYREG_UDB_DSI2_HV_L13 EQU 0x400f428d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L14
CYREG_UDB_DSI2_HV_L14 EQU 0x400f428e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_L15
CYREG_UDB_DSI2_HV_L15 EQU 0x400f428f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS0
CYREG_UDB_DSI2_HS0 EQU 0x400f4290
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS1
CYREG_UDB_DSI2_HS1 EQU 0x400f4291
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS2
CYREG_UDB_DSI2_HS2 EQU 0x400f4292
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS3
CYREG_UDB_DSI2_HS3 EQU 0x400f4293
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS4
CYREG_UDB_DSI2_HS4 EQU 0x400f4294
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS5
CYREG_UDB_DSI2_HS5 EQU 0x400f4295
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS6
CYREG_UDB_DSI2_HS6 EQU 0x400f4296
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS7
CYREG_UDB_DSI2_HS7 EQU 0x400f4297
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS8
CYREG_UDB_DSI2_HS8 EQU 0x400f4298
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS9
CYREG_UDB_DSI2_HS9 EQU 0x400f4299
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS10
CYREG_UDB_DSI2_HS10 EQU 0x400f429a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS11
CYREG_UDB_DSI2_HS11 EQU 0x400f429b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS12
CYREG_UDB_DSI2_HS12 EQU 0x400f429c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS13
CYREG_UDB_DSI2_HS13 EQU 0x400f429d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS14
CYREG_UDB_DSI2_HS14 EQU 0x400f429e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS15
CYREG_UDB_DSI2_HS15 EQU 0x400f429f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS16
CYREG_UDB_DSI2_HS16 EQU 0x400f42a0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS17
CYREG_UDB_DSI2_HS17 EQU 0x400f42a1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS18
CYREG_UDB_DSI2_HS18 EQU 0x400f42a2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS19
CYREG_UDB_DSI2_HS19 EQU 0x400f42a3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS20
CYREG_UDB_DSI2_HS20 EQU 0x400f42a4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS21
CYREG_UDB_DSI2_HS21 EQU 0x400f42a5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS22
CYREG_UDB_DSI2_HS22 EQU 0x400f42a6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HS23
CYREG_UDB_DSI2_HS23 EQU 0x400f42a7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R0
CYREG_UDB_DSI2_HV_R0 EQU 0x400f42a8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R1
CYREG_UDB_DSI2_HV_R1 EQU 0x400f42a9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R2
CYREG_UDB_DSI2_HV_R2 EQU 0x400f42aa
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R3
CYREG_UDB_DSI2_HV_R3 EQU 0x400f42ab
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R4
CYREG_UDB_DSI2_HV_R4 EQU 0x400f42ac
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R5
CYREG_UDB_DSI2_HV_R5 EQU 0x400f42ad
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R6
CYREG_UDB_DSI2_HV_R6 EQU 0x400f42ae
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R7
CYREG_UDB_DSI2_HV_R7 EQU 0x400f42af
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R8
CYREG_UDB_DSI2_HV_R8 EQU 0x400f42b0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R9
CYREG_UDB_DSI2_HV_R9 EQU 0x400f42b1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R10
CYREG_UDB_DSI2_HV_R10 EQU 0x400f42b2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R11
CYREG_UDB_DSI2_HV_R11 EQU 0x400f42b3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R12
CYREG_UDB_DSI2_HV_R12 EQU 0x400f42b4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R13
CYREG_UDB_DSI2_HV_R13 EQU 0x400f42b5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R14
CYREG_UDB_DSI2_HV_R14 EQU 0x400f42b6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_HV_R15
CYREG_UDB_DSI2_HV_R15 EQU 0x400f42b7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP0
CYREG_UDB_DSI2_DSIINP0 EQU 0x400f42c0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP1
CYREG_UDB_DSI2_DSIINP1 EQU 0x400f42c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP2
CYREG_UDB_DSI2_DSIINP2 EQU 0x400f42c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP3
CYREG_UDB_DSI2_DSIINP3 EQU 0x400f42c6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP4
CYREG_UDB_DSI2_DSIINP4 EQU 0x400f42c8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIINP5
CYREG_UDB_DSI2_DSIINP5 EQU 0x400f42ca
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTP0
CYREG_UDB_DSI2_DSIOUTP0 EQU 0x400f42cc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTP1
CYREG_UDB_DSI2_DSIOUTP1 EQU 0x400f42ce
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTP2
CYREG_UDB_DSI2_DSIOUTP2 EQU 0x400f42d0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTP3
CYREG_UDB_DSI2_DSIOUTP3 EQU 0x400f42d2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT0
CYREG_UDB_DSI2_DSIOUTT0 EQU 0x400f42d4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT1
CYREG_UDB_DSI2_DSIOUTT1 EQU 0x400f42d6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT2
CYREG_UDB_DSI2_DSIOUTT2 EQU 0x400f42d8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT3
CYREG_UDB_DSI2_DSIOUTT3 EQU 0x400f42da
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT4
CYREG_UDB_DSI2_DSIOUTT4 EQU 0x400f42dc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_DSIOUTT5
CYREG_UDB_DSI2_DSIOUTT5 EQU 0x400f42de
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_VS0
CYREG_UDB_DSI2_VS0 EQU 0x400f42e0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_VS1
CYREG_UDB_DSI2_VS1 EQU 0x400f42e2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_VS2
CYREG_UDB_DSI2_VS2 EQU 0x400f42e4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_VS3
CYREG_UDB_DSI2_VS3 EQU 0x400f42e6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_VS4
CYREG_UDB_DSI2_VS4 EQU 0x400f42e8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_VS5
CYREG_UDB_DSI2_VS5 EQU 0x400f42ea
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_VS6
CYREG_UDB_DSI2_VS6 EQU 0x400f42ec
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI2_VS7
CYREG_UDB_DSI2_VS7 EQU 0x400f42ee
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_DSI3_BASE
CYDEV_UDB_DSI3_BASE EQU 0x400f4300
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_DSI3_SIZE
CYDEV_UDB_DSI3_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC0
CYREG_UDB_DSI3_HC0 EQU 0x400f4300
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC1
CYREG_UDB_DSI3_HC1 EQU 0x400f4301
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC2
CYREG_UDB_DSI3_HC2 EQU 0x400f4302
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC3
CYREG_UDB_DSI3_HC3 EQU 0x400f4303
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC4
CYREG_UDB_DSI3_HC4 EQU 0x400f4304
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC5
CYREG_UDB_DSI3_HC5 EQU 0x400f4305
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC6
CYREG_UDB_DSI3_HC6 EQU 0x400f4306
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC7
CYREG_UDB_DSI3_HC7 EQU 0x400f4307
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC8
CYREG_UDB_DSI3_HC8 EQU 0x400f4308
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC9
CYREG_UDB_DSI3_HC9 EQU 0x400f4309
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC10
CYREG_UDB_DSI3_HC10 EQU 0x400f430a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC11
CYREG_UDB_DSI3_HC11 EQU 0x400f430b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC12
CYREG_UDB_DSI3_HC12 EQU 0x400f430c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC13
CYREG_UDB_DSI3_HC13 EQU 0x400f430d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC14
CYREG_UDB_DSI3_HC14 EQU 0x400f430e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC15
CYREG_UDB_DSI3_HC15 EQU 0x400f430f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC16
CYREG_UDB_DSI3_HC16 EQU 0x400f4310
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC17
CYREG_UDB_DSI3_HC17 EQU 0x400f4311
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC18
CYREG_UDB_DSI3_HC18 EQU 0x400f4312
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC19
CYREG_UDB_DSI3_HC19 EQU 0x400f4313
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC20
CYREG_UDB_DSI3_HC20 EQU 0x400f4314
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC21
CYREG_UDB_DSI3_HC21 EQU 0x400f4315
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC22
CYREG_UDB_DSI3_HC22 EQU 0x400f4316
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC23
CYREG_UDB_DSI3_HC23 EQU 0x400f4317
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC24
CYREG_UDB_DSI3_HC24 EQU 0x400f4318
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC25
CYREG_UDB_DSI3_HC25 EQU 0x400f4319
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC26
CYREG_UDB_DSI3_HC26 EQU 0x400f431a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC27
CYREG_UDB_DSI3_HC27 EQU 0x400f431b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC28
CYREG_UDB_DSI3_HC28 EQU 0x400f431c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC29
CYREG_UDB_DSI3_HC29 EQU 0x400f431d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC30
CYREG_UDB_DSI3_HC30 EQU 0x400f431e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC31
CYREG_UDB_DSI3_HC31 EQU 0x400f431f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC32
CYREG_UDB_DSI3_HC32 EQU 0x400f4320
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC33
CYREG_UDB_DSI3_HC33 EQU 0x400f4321
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC34
CYREG_UDB_DSI3_HC34 EQU 0x400f4322
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC35
CYREG_UDB_DSI3_HC35 EQU 0x400f4323
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC36
CYREG_UDB_DSI3_HC36 EQU 0x400f4324
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC37
CYREG_UDB_DSI3_HC37 EQU 0x400f4325
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC38
CYREG_UDB_DSI3_HC38 EQU 0x400f4326
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC39
CYREG_UDB_DSI3_HC39 EQU 0x400f4327
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC40
CYREG_UDB_DSI3_HC40 EQU 0x400f4328
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC41
CYREG_UDB_DSI3_HC41 EQU 0x400f4329
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC42
CYREG_UDB_DSI3_HC42 EQU 0x400f432a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC43
CYREG_UDB_DSI3_HC43 EQU 0x400f432b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC44
CYREG_UDB_DSI3_HC44 EQU 0x400f432c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC45
CYREG_UDB_DSI3_HC45 EQU 0x400f432d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC46
CYREG_UDB_DSI3_HC46 EQU 0x400f432e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC47
CYREG_UDB_DSI3_HC47 EQU 0x400f432f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC48
CYREG_UDB_DSI3_HC48 EQU 0x400f4330
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC49
CYREG_UDB_DSI3_HC49 EQU 0x400f4331
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC50
CYREG_UDB_DSI3_HC50 EQU 0x400f4332
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC51
CYREG_UDB_DSI3_HC51 EQU 0x400f4333
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC52
CYREG_UDB_DSI3_HC52 EQU 0x400f4334
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC53
CYREG_UDB_DSI3_HC53 EQU 0x400f4335
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC54
CYREG_UDB_DSI3_HC54 EQU 0x400f4336
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC55
CYREG_UDB_DSI3_HC55 EQU 0x400f4337
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC56
CYREG_UDB_DSI3_HC56 EQU 0x400f4338
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC57
CYREG_UDB_DSI3_HC57 EQU 0x400f4339
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC58
CYREG_UDB_DSI3_HC58 EQU 0x400f433a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC59
CYREG_UDB_DSI3_HC59 EQU 0x400f433b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC60
CYREG_UDB_DSI3_HC60 EQU 0x400f433c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC61
CYREG_UDB_DSI3_HC61 EQU 0x400f433d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC62
CYREG_UDB_DSI3_HC62 EQU 0x400f433e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC63
CYREG_UDB_DSI3_HC63 EQU 0x400f433f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC64
CYREG_UDB_DSI3_HC64 EQU 0x400f4340
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC65
CYREG_UDB_DSI3_HC65 EQU 0x400f4341
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC66
CYREG_UDB_DSI3_HC66 EQU 0x400f4342
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC67
CYREG_UDB_DSI3_HC67 EQU 0x400f4343
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC68
CYREG_UDB_DSI3_HC68 EQU 0x400f4344
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC69
CYREG_UDB_DSI3_HC69 EQU 0x400f4345
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC70
CYREG_UDB_DSI3_HC70 EQU 0x400f4346
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC71
CYREG_UDB_DSI3_HC71 EQU 0x400f4347
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC72
CYREG_UDB_DSI3_HC72 EQU 0x400f4348
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC73
CYREG_UDB_DSI3_HC73 EQU 0x400f4349
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC74
CYREG_UDB_DSI3_HC74 EQU 0x400f434a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC75
CYREG_UDB_DSI3_HC75 EQU 0x400f434b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC76
CYREG_UDB_DSI3_HC76 EQU 0x400f434c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC77
CYREG_UDB_DSI3_HC77 EQU 0x400f434d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC78
CYREG_UDB_DSI3_HC78 EQU 0x400f434e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC79
CYREG_UDB_DSI3_HC79 EQU 0x400f434f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC80
CYREG_UDB_DSI3_HC80 EQU 0x400f4350
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC81
CYREG_UDB_DSI3_HC81 EQU 0x400f4351
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC82
CYREG_UDB_DSI3_HC82 EQU 0x400f4352
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC83
CYREG_UDB_DSI3_HC83 EQU 0x400f4353
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC84
CYREG_UDB_DSI3_HC84 EQU 0x400f4354
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC85
CYREG_UDB_DSI3_HC85 EQU 0x400f4355
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC86
CYREG_UDB_DSI3_HC86 EQU 0x400f4356
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC87
CYREG_UDB_DSI3_HC87 EQU 0x400f4357
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC88
CYREG_UDB_DSI3_HC88 EQU 0x400f4358
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC89
CYREG_UDB_DSI3_HC89 EQU 0x400f4359
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC90
CYREG_UDB_DSI3_HC90 EQU 0x400f435a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC91
CYREG_UDB_DSI3_HC91 EQU 0x400f435b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC92
CYREG_UDB_DSI3_HC92 EQU 0x400f435c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC93
CYREG_UDB_DSI3_HC93 EQU 0x400f435d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC94
CYREG_UDB_DSI3_HC94 EQU 0x400f435e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC95
CYREG_UDB_DSI3_HC95 EQU 0x400f435f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC96
CYREG_UDB_DSI3_HC96 EQU 0x400f4360
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC97
CYREG_UDB_DSI3_HC97 EQU 0x400f4361
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC98
CYREG_UDB_DSI3_HC98 EQU 0x400f4362
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC99
CYREG_UDB_DSI3_HC99 EQU 0x400f4363
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC100
CYREG_UDB_DSI3_HC100 EQU 0x400f4364
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC101
CYREG_UDB_DSI3_HC101 EQU 0x400f4365
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC102
CYREG_UDB_DSI3_HC102 EQU 0x400f4366
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC103
CYREG_UDB_DSI3_HC103 EQU 0x400f4367
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC104
CYREG_UDB_DSI3_HC104 EQU 0x400f4368
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC105
CYREG_UDB_DSI3_HC105 EQU 0x400f4369
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC106
CYREG_UDB_DSI3_HC106 EQU 0x400f436a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC107
CYREG_UDB_DSI3_HC107 EQU 0x400f436b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC108
CYREG_UDB_DSI3_HC108 EQU 0x400f436c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC109
CYREG_UDB_DSI3_HC109 EQU 0x400f436d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC110
CYREG_UDB_DSI3_HC110 EQU 0x400f436e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC111
CYREG_UDB_DSI3_HC111 EQU 0x400f436f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC112
CYREG_UDB_DSI3_HC112 EQU 0x400f4370
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC113
CYREG_UDB_DSI3_HC113 EQU 0x400f4371
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC114
CYREG_UDB_DSI3_HC114 EQU 0x400f4372
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC115
CYREG_UDB_DSI3_HC115 EQU 0x400f4373
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC116
CYREG_UDB_DSI3_HC116 EQU 0x400f4374
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC117
CYREG_UDB_DSI3_HC117 EQU 0x400f4375
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC118
CYREG_UDB_DSI3_HC118 EQU 0x400f4376
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC119
CYREG_UDB_DSI3_HC119 EQU 0x400f4377
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC120
CYREG_UDB_DSI3_HC120 EQU 0x400f4378
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC121
CYREG_UDB_DSI3_HC121 EQU 0x400f4379
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC122
CYREG_UDB_DSI3_HC122 EQU 0x400f437a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC123
CYREG_UDB_DSI3_HC123 EQU 0x400f437b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC124
CYREG_UDB_DSI3_HC124 EQU 0x400f437c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC125
CYREG_UDB_DSI3_HC125 EQU 0x400f437d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC126
CYREG_UDB_DSI3_HC126 EQU 0x400f437e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HC127
CYREG_UDB_DSI3_HC127 EQU 0x400f437f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L0
CYREG_UDB_DSI3_HV_L0 EQU 0x400f4380
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L1
CYREG_UDB_DSI3_HV_L1 EQU 0x400f4381
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L2
CYREG_UDB_DSI3_HV_L2 EQU 0x400f4382
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L3
CYREG_UDB_DSI3_HV_L3 EQU 0x400f4383
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L4
CYREG_UDB_DSI3_HV_L4 EQU 0x400f4384
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L5
CYREG_UDB_DSI3_HV_L5 EQU 0x400f4385
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L6
CYREG_UDB_DSI3_HV_L6 EQU 0x400f4386
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L7
CYREG_UDB_DSI3_HV_L7 EQU 0x400f4387
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L8
CYREG_UDB_DSI3_HV_L8 EQU 0x400f4388
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L9
CYREG_UDB_DSI3_HV_L9 EQU 0x400f4389
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L10
CYREG_UDB_DSI3_HV_L10 EQU 0x400f438a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L11
CYREG_UDB_DSI3_HV_L11 EQU 0x400f438b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L12
CYREG_UDB_DSI3_HV_L12 EQU 0x400f438c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L13
CYREG_UDB_DSI3_HV_L13 EQU 0x400f438d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L14
CYREG_UDB_DSI3_HV_L14 EQU 0x400f438e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_L15
CYREG_UDB_DSI3_HV_L15 EQU 0x400f438f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS0
CYREG_UDB_DSI3_HS0 EQU 0x400f4390
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS1
CYREG_UDB_DSI3_HS1 EQU 0x400f4391
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS2
CYREG_UDB_DSI3_HS2 EQU 0x400f4392
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS3
CYREG_UDB_DSI3_HS3 EQU 0x400f4393
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS4
CYREG_UDB_DSI3_HS4 EQU 0x400f4394
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS5
CYREG_UDB_DSI3_HS5 EQU 0x400f4395
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS6
CYREG_UDB_DSI3_HS6 EQU 0x400f4396
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS7
CYREG_UDB_DSI3_HS7 EQU 0x400f4397
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS8
CYREG_UDB_DSI3_HS8 EQU 0x400f4398
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS9
CYREG_UDB_DSI3_HS9 EQU 0x400f4399
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS10
CYREG_UDB_DSI3_HS10 EQU 0x400f439a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS11
CYREG_UDB_DSI3_HS11 EQU 0x400f439b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS12
CYREG_UDB_DSI3_HS12 EQU 0x400f439c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS13
CYREG_UDB_DSI3_HS13 EQU 0x400f439d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS14
CYREG_UDB_DSI3_HS14 EQU 0x400f439e
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS15
CYREG_UDB_DSI3_HS15 EQU 0x400f439f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS16
CYREG_UDB_DSI3_HS16 EQU 0x400f43a0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS17
CYREG_UDB_DSI3_HS17 EQU 0x400f43a1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS18
CYREG_UDB_DSI3_HS18 EQU 0x400f43a2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS19
CYREG_UDB_DSI3_HS19 EQU 0x400f43a3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS20
CYREG_UDB_DSI3_HS20 EQU 0x400f43a4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS21
CYREG_UDB_DSI3_HS21 EQU 0x400f43a5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS22
CYREG_UDB_DSI3_HS22 EQU 0x400f43a6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HS23
CYREG_UDB_DSI3_HS23 EQU 0x400f43a7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R0
CYREG_UDB_DSI3_HV_R0 EQU 0x400f43a8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R1
CYREG_UDB_DSI3_HV_R1 EQU 0x400f43a9
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R2
CYREG_UDB_DSI3_HV_R2 EQU 0x400f43aa
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R3
CYREG_UDB_DSI3_HV_R3 EQU 0x400f43ab
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R4
CYREG_UDB_DSI3_HV_R4 EQU 0x400f43ac
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R5
CYREG_UDB_DSI3_HV_R5 EQU 0x400f43ad
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R6
CYREG_UDB_DSI3_HV_R6 EQU 0x400f43ae
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R7
CYREG_UDB_DSI3_HV_R7 EQU 0x400f43af
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R8
CYREG_UDB_DSI3_HV_R8 EQU 0x400f43b0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R9
CYREG_UDB_DSI3_HV_R9 EQU 0x400f43b1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R10
CYREG_UDB_DSI3_HV_R10 EQU 0x400f43b2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R11
CYREG_UDB_DSI3_HV_R11 EQU 0x400f43b3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R12
CYREG_UDB_DSI3_HV_R12 EQU 0x400f43b4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R13
CYREG_UDB_DSI3_HV_R13 EQU 0x400f43b5
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R14
CYREG_UDB_DSI3_HV_R14 EQU 0x400f43b6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_HV_R15
CYREG_UDB_DSI3_HV_R15 EQU 0x400f43b7
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP0
CYREG_UDB_DSI3_DSIINP0 EQU 0x400f43c0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP1
CYREG_UDB_DSI3_DSIINP1 EQU 0x400f43c2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP2
CYREG_UDB_DSI3_DSIINP2 EQU 0x400f43c4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP3
CYREG_UDB_DSI3_DSIINP3 EQU 0x400f43c6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP4
CYREG_UDB_DSI3_DSIINP4 EQU 0x400f43c8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIINP5
CYREG_UDB_DSI3_DSIINP5 EQU 0x400f43ca
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTP0
CYREG_UDB_DSI3_DSIOUTP0 EQU 0x400f43cc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTP1
CYREG_UDB_DSI3_DSIOUTP1 EQU 0x400f43ce
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTP2
CYREG_UDB_DSI3_DSIOUTP2 EQU 0x400f43d0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTP3
CYREG_UDB_DSI3_DSIOUTP3 EQU 0x400f43d2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT0
CYREG_UDB_DSI3_DSIOUTT0 EQU 0x400f43d4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT1
CYREG_UDB_DSI3_DSIOUTT1 EQU 0x400f43d6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT2
CYREG_UDB_DSI3_DSIOUTT2 EQU 0x400f43d8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT3
CYREG_UDB_DSI3_DSIOUTT3 EQU 0x400f43da
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT4
CYREG_UDB_DSI3_DSIOUTT4 EQU 0x400f43dc
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_DSIOUTT5
CYREG_UDB_DSI3_DSIOUTT5 EQU 0x400f43de
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_VS0
CYREG_UDB_DSI3_VS0 EQU 0x400f43e0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_VS1
CYREG_UDB_DSI3_VS1 EQU 0x400f43e2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_VS2
CYREG_UDB_DSI3_VS2 EQU 0x400f43e4
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_VS3
CYREG_UDB_DSI3_VS3 EQU 0x400f43e6
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_VS4
CYREG_UDB_DSI3_VS4 EQU 0x400f43e8
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_VS5
CYREG_UDB_DSI3_VS5 EQU 0x400f43ea
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_VS6
CYREG_UDB_DSI3_VS6 EQU 0x400f43ec
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_DSI3_VS7
CYREG_UDB_DSI3_VS7 EQU 0x400f43ee
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_PA0_BASE
CYDEV_UDB_PA0_BASE EQU 0x400f5000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_PA0_SIZE
CYDEV_UDB_PA0_SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG0
CYREG_UDB_PA0_CFG0 EQU 0x400f5000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_SEL__OFFSET
CYFLD_UDB_PA_CLKIN_EN_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_SEL__SIZE
CYFLD_UDB_PA_CLKIN_EN_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_SEL_PIN_RC
CYVAL_UDB_PA_CLKIN_EN_SEL_PIN_RC EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_0
CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_1
CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_2
CYVAL_UDB_PA_CLKIN_EN_SEL_DSI_RC_2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_MODE__OFFSET
CYFLD_UDB_PA_CLKIN_EN_MODE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_MODE__SIZE
CYFLD_UDB_PA_CLKIN_EN_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_MODE_OFF
CYVAL_UDB_PA_CLKIN_EN_MODE_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_MODE_ON
CYVAL_UDB_PA_CLKIN_EN_MODE_ON EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_MODE_POSEDGE
CYVAL_UDB_PA_CLKIN_EN_MODE_POSEDGE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_MODE_LEVEL
CYVAL_UDB_PA_CLKIN_EN_MODE_LEVEL EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_INV__OFFSET
CYFLD_UDB_PA_CLKIN_EN_INV__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_EN_INV__SIZE
CYFLD_UDB_PA_CLKIN_EN_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_INV_NOINV
CYVAL_UDB_PA_CLKIN_EN_INV_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_EN_INV_INV
CYVAL_UDB_PA_CLKIN_EN_INV_INV EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_INV__OFFSET
CYFLD_UDB_PA_CLKIN_INV__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_INV__SIZE
CYFLD_UDB_PA_CLKIN_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_INV_NOINV
CYVAL_UDB_PA_CLKIN_INV_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_INV_INV
CYVAL_UDB_PA_CLKIN_INV_INV EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_NC__OFFSET
CYFLD_UDB_PA_NC__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_NC__SIZE
CYFLD_UDB_PA_NC__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG1
CYREG_UDB_PA0_CFG1 EQU 0x400f5001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_SEL__OFFSET
CYFLD_UDB_PA_CLKOUT_EN_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_SEL__SIZE
CYFLD_UDB_PA_CLKOUT_EN_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_SEL_PIN_RC
CYVAL_UDB_PA_CLKOUT_EN_SEL_PIN_RC EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_0
CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_1
CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_2
CYVAL_UDB_PA_CLKOUT_EN_SEL_DSI_RC_2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_MODE__OFFSET
CYFLD_UDB_PA_CLKOUT_EN_MODE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_MODE__SIZE
CYFLD_UDB_PA_CLKOUT_EN_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_MODE_OFF
CYVAL_UDB_PA_CLKOUT_EN_MODE_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_MODE_ON
CYVAL_UDB_PA_CLKOUT_EN_MODE_ON EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_MODE_POSEDGE
CYVAL_UDB_PA_CLKOUT_EN_MODE_POSEDGE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_MODE_LEVEL
CYVAL_UDB_PA_CLKOUT_EN_MODE_LEVEL EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_INV__OFFSET
CYFLD_UDB_PA_CLKOUT_EN_INV__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_EN_INV__SIZE
CYFLD_UDB_PA_CLKOUT_EN_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_INV_NOINV
CYVAL_UDB_PA_CLKOUT_EN_INV_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_EN_INV_INV
CYVAL_UDB_PA_CLKOUT_EN_INV_INV EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_INV__OFFSET
CYFLD_UDB_PA_CLKOUT_INV__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_INV__SIZE
CYFLD_UDB_PA_CLKOUT_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_INV_NOINV
CYVAL_UDB_PA_CLKOUT_INV_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_INV_INV
CYVAL_UDB_PA_CLKOUT_INV_INV EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG2
CYREG_UDB_PA0_CFG2 EQU 0x400f5002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_SEL__OFFSET
CYFLD_UDB_PA_CLKIN_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKIN_SEL__SIZE
CYFLD_UDB_PA_CLKIN_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK0
CYVAL_UDB_PA_CLKIN_SEL_GCLK0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK1
CYVAL_UDB_PA_CLKIN_SEL_GCLK1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK2
CYVAL_UDB_PA_CLKIN_SEL_GCLK2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK3
CYVAL_UDB_PA_CLKIN_SEL_GCLK3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK4
CYVAL_UDB_PA_CLKIN_SEL_GCLK4 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK5
CYVAL_UDB_PA_CLKIN_SEL_GCLK5 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK6
CYVAL_UDB_PA_CLKIN_SEL_GCLK6 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_GCLK7
CYVAL_UDB_PA_CLKIN_SEL_GCLK7 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_BUS_CLK_APP
CYVAL_UDB_PA_CLKIN_SEL_BUS_CLK_APP EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_PIN_RC
CYVAL_UDB_PA_CLKIN_SEL_PIN_RC EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_0
CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_0 EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_1
CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_1 EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_2
CYVAL_UDB_PA_CLKIN_SEL_DSI_RC_2 EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_SEL__OFFSET
CYFLD_UDB_PA_CLKOUT_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_CLKOUT_SEL__SIZE
CYFLD_UDB_PA_CLKOUT_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK0
CYVAL_UDB_PA_CLKOUT_SEL_GCLK0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK1
CYVAL_UDB_PA_CLKOUT_SEL_GCLK1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK2
CYVAL_UDB_PA_CLKOUT_SEL_GCLK2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK3
CYVAL_UDB_PA_CLKOUT_SEL_GCLK3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK4
CYVAL_UDB_PA_CLKOUT_SEL_GCLK4 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK5
CYVAL_UDB_PA_CLKOUT_SEL_GCLK5 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK6
CYVAL_UDB_PA_CLKOUT_SEL_GCLK6 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_GCLK7
CYVAL_UDB_PA_CLKOUT_SEL_GCLK7 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_BUS_CLK_APP
CYVAL_UDB_PA_CLKOUT_SEL_BUS_CLK_APP EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_PIN_RC
CYVAL_UDB_PA_CLKOUT_SEL_PIN_RC EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_0
CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_0 EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_1
CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_1 EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_2
CYVAL_UDB_PA_CLKOUT_SEL_DSI_RC_2 EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG3
CYREG_UDB_PA0_CFG3 EQU 0x400f5003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_SEL__OFFSET
CYFLD_UDB_PA_RES_IN_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_SEL__SIZE
CYFLD_UDB_PA_RES_IN_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_SEL_PIN_RC
CYVAL_UDB_PA_RES_IN_SEL_PIN_RC EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_0
CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_1
CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_2
CYVAL_UDB_PA_RES_IN_SEL_DSI_RC_2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_INV__OFFSET
CYFLD_UDB_PA_RES_IN_INV__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_INV__SIZE
CYFLD_UDB_PA_RES_IN_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_INV_NOINV
CYVAL_UDB_PA_RES_IN_INV_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_INV_INV
CYVAL_UDB_PA_RES_IN_INV_INV EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_NC0__OFFSET
CYFLD_UDB_PA_NC0__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_NC0__SIZE
CYFLD_UDB_PA_NC0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_SEL__OFFSET
CYFLD_UDB_PA_RES_OUT_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_SEL__SIZE
CYFLD_UDB_PA_RES_OUT_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_SEL_PIN_RC
CYVAL_UDB_PA_RES_OUT_SEL_PIN_RC EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_0
CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_1
CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_2
CYVAL_UDB_PA_RES_OUT_SEL_DSI_RC_2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_INV__OFFSET
CYFLD_UDB_PA_RES_OUT_INV__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_INV__SIZE
CYFLD_UDB_PA_RES_OUT_INV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_INV_NOINV
CYVAL_UDB_PA_RES_OUT_INV_NOINV EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_INV_INV
CYVAL_UDB_PA_RES_OUT_INV_INV EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_NC7__OFFSET
CYFLD_UDB_PA_NC7__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_NC7__SIZE
CYFLD_UDB_PA_NC7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG4
CYREG_UDB_PA0_CFG4 EQU 0x400f5004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_EN__OFFSET
CYFLD_UDB_PA_RES_IN_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_IN_EN__SIZE
CYFLD_UDB_PA_RES_IN_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_EN_DISABLE
CYVAL_UDB_PA_RES_IN_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_IN_EN_ENABLE
CYVAL_UDB_PA_RES_IN_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_EN__OFFSET
CYFLD_UDB_PA_RES_OUT_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_OUT_EN__SIZE
CYFLD_UDB_PA_RES_OUT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_EN_DISABLE
CYVAL_UDB_PA_RES_OUT_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OUT_EN_ENABLE
CYVAL_UDB_PA_RES_OUT_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_OE_EN__OFFSET
CYFLD_UDB_PA_RES_OE_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_RES_OE_EN__SIZE
CYFLD_UDB_PA_RES_OE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OE_EN_DISABLE
CYVAL_UDB_PA_RES_OE_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_RES_OE_EN_ENABLE
CYVAL_UDB_PA_RES_OE_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_NC7654__OFFSET
CYFLD_UDB_PA_NC7654__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_NC7654__SIZE
CYFLD_UDB_PA_NC7654__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG5
CYREG_UDB_PA0_CFG5 EQU 0x400f5005
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_PIN_SEL__OFFSET
CYFLD_UDB_PA_PIN_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_PIN_SEL__SIZE
CYFLD_UDB_PA_PIN_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN0
CYVAL_UDB_PA_PIN_SEL_PIN0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN1
CYVAL_UDB_PA_PIN_SEL_PIN1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN2
CYVAL_UDB_PA_PIN_SEL_PIN2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN3
CYVAL_UDB_PA_PIN_SEL_PIN3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN4
CYVAL_UDB_PA_PIN_SEL_PIN4 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN5
CYVAL_UDB_PA_PIN_SEL_PIN5 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN6
CYVAL_UDB_PA_PIN_SEL_PIN6 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_PIN_SEL_PIN7
CYVAL_UDB_PA_PIN_SEL_PIN7 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG6
CYREG_UDB_PA0_CFG6 EQU 0x400f5006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC0__OFFSET
CYFLD_UDB_PA_IN_SYNC0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC0__SIZE
CYFLD_UDB_PA_IN_SYNC0__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC0_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC0_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC0_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC0_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC0_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC0_DOUBLESYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC0_RSVD
CYVAL_UDB_PA_IN_SYNC0_RSVD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC1__OFFSET
CYFLD_UDB_PA_IN_SYNC1__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC1__SIZE
CYFLD_UDB_PA_IN_SYNC1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC1_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC1_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC1_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC1_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC1_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC1_DOUBLESYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC1_RSVD
CYVAL_UDB_PA_IN_SYNC1_RSVD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC2__OFFSET
CYFLD_UDB_PA_IN_SYNC2__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC2__SIZE
CYFLD_UDB_PA_IN_SYNC2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC2_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC2_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC2_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC2_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC2_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC2_DOUBLESYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC2_RSVD
CYVAL_UDB_PA_IN_SYNC2_RSVD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC3__OFFSET
CYFLD_UDB_PA_IN_SYNC3__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC3__SIZE
CYFLD_UDB_PA_IN_SYNC3__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC3_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC3_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC3_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC3_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC3_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC3_DOUBLESYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC3_RSVD
CYVAL_UDB_PA_IN_SYNC3_RSVD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG7
CYREG_UDB_PA0_CFG7 EQU 0x400f5007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC4__OFFSET
CYFLD_UDB_PA_IN_SYNC4__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC4__SIZE
CYFLD_UDB_PA_IN_SYNC4__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC4_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC4_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC4_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC4_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC4_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC4_DOUBLESYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC4_RSVD
CYVAL_UDB_PA_IN_SYNC4_RSVD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC5__OFFSET
CYFLD_UDB_PA_IN_SYNC5__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC5__SIZE
CYFLD_UDB_PA_IN_SYNC5__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC5_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC5_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC5_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC5_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC5_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC5_DOUBLESYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC5_RSVD
CYVAL_UDB_PA_IN_SYNC5_RSVD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC6__OFFSET
CYFLD_UDB_PA_IN_SYNC6__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC6__SIZE
CYFLD_UDB_PA_IN_SYNC6__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC6_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC6_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC6_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC6_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC6_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC6_DOUBLESYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC6_RSVD
CYVAL_UDB_PA_IN_SYNC6_RSVD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC7__OFFSET
CYFLD_UDB_PA_IN_SYNC7__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_IN_SYNC7__SIZE
CYFLD_UDB_PA_IN_SYNC7__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC7_TRANSPARENT
CYVAL_UDB_PA_IN_SYNC7_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC7_SINGLESYNC
CYVAL_UDB_PA_IN_SYNC7_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC7_DOUBLESYNC
CYVAL_UDB_PA_IN_SYNC7_DOUBLESYNC EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_IN_SYNC7_RSVD
CYVAL_UDB_PA_IN_SYNC7_RSVD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG8
CYREG_UDB_PA0_CFG8 EQU 0x400f5008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC0__OFFSET
CYFLD_UDB_PA_OUT_SYNC0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC0__SIZE
CYFLD_UDB_PA_OUT_SYNC0__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC0_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC0_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC0_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC0_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC0_CLOCK
CYVAL_UDB_PA_OUT_SYNC0_CLOCK EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC0_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC0_CLOCKINV EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC1__OFFSET
CYFLD_UDB_PA_OUT_SYNC1__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC1__SIZE
CYFLD_UDB_PA_OUT_SYNC1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC1_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC1_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC1_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC1_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC1_CLOCK
CYVAL_UDB_PA_OUT_SYNC1_CLOCK EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC1_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC1_CLOCKINV EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC2__OFFSET
CYFLD_UDB_PA_OUT_SYNC2__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC2__SIZE
CYFLD_UDB_PA_OUT_SYNC2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC2_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC2_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC2_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC2_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC2_CLOCK
CYVAL_UDB_PA_OUT_SYNC2_CLOCK EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC2_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC2_CLOCKINV EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC3__OFFSET
CYFLD_UDB_PA_OUT_SYNC3__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC3__SIZE
CYFLD_UDB_PA_OUT_SYNC3__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC3_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC3_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC3_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC3_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC3_CLOCK
CYVAL_UDB_PA_OUT_SYNC3_CLOCK EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC3_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC3_CLOCKINV EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG9
CYREG_UDB_PA0_CFG9 EQU 0x400f5009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC4__OFFSET
CYFLD_UDB_PA_OUT_SYNC4__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC4__SIZE
CYFLD_UDB_PA_OUT_SYNC4__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC4_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC4_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC4_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC4_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC4_CLOCK
CYVAL_UDB_PA_OUT_SYNC4_CLOCK EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC4_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC4_CLOCKINV EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC5__OFFSET
CYFLD_UDB_PA_OUT_SYNC5__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC5__SIZE
CYFLD_UDB_PA_OUT_SYNC5__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC5_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC5_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC5_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC5_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC5_CLOCK
CYVAL_UDB_PA_OUT_SYNC5_CLOCK EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC5_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC5_CLOCKINV EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC6__OFFSET
CYFLD_UDB_PA_OUT_SYNC6__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC6__SIZE
CYFLD_UDB_PA_OUT_SYNC6__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC6_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC6_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC6_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC6_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC6_CLOCK
CYVAL_UDB_PA_OUT_SYNC6_CLOCK EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC6_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC6_CLOCKINV EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC7__OFFSET
CYFLD_UDB_PA_OUT_SYNC7__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OUT_SYNC7__SIZE
CYFLD_UDB_PA_OUT_SYNC7__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC7_TRANSPARENT
CYVAL_UDB_PA_OUT_SYNC7_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC7_SINGLESYNC
CYVAL_UDB_PA_OUT_SYNC7_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC7_CLOCK
CYVAL_UDB_PA_OUT_SYNC7_CLOCK EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OUT_SYNC7_CLOCKINV
CYVAL_UDB_PA_OUT_SYNC7_CLOCKINV EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG10
CYREG_UDB_PA0_CFG10 EQU 0x400f500a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL0__OFFSET
CYFLD_UDB_PA_DATA_SEL0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL0__SIZE
CYFLD_UDB_PA_DATA_SEL0__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL0_DSI_OUTPUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL1__OFFSET
CYFLD_UDB_PA_DATA_SEL1__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL1__SIZE
CYFLD_UDB_PA_DATA_SEL1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL1_DSI_OUTPUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL2__OFFSET
CYFLD_UDB_PA_DATA_SEL2__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL2__SIZE
CYFLD_UDB_PA_DATA_SEL2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL2_DSI_OUTPUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL3__OFFSET
CYFLD_UDB_PA_DATA_SEL3__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL3__SIZE
CYFLD_UDB_PA_DATA_SEL3__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL3_DSI_OUTPUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG11
CYREG_UDB_PA0_CFG11 EQU 0x400f500b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL4__OFFSET
CYFLD_UDB_PA_DATA_SEL4__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL4__SIZE
CYFLD_UDB_PA_DATA_SEL4__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL4_DSI_OUTPUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL5__OFFSET
CYFLD_UDB_PA_DATA_SEL5__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL5__SIZE
CYFLD_UDB_PA_DATA_SEL5__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL5_DSI_OUTPUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL6__OFFSET
CYFLD_UDB_PA_DATA_SEL6__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL6__SIZE
CYFLD_UDB_PA_DATA_SEL6__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL6_DSI_OUTPUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL7__OFFSET
CYFLD_UDB_PA_DATA_SEL7__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_DATA_SEL7__SIZE
CYFLD_UDB_PA_DATA_SEL7__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT0
CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT1
CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT2
CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT3
CYVAL_UDB_PA_DATA_SEL7_DSI_OUTPUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG12
CYREG_UDB_PA0_CFG12 EQU 0x400f500c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL0__OFFSET
CYFLD_UDB_PA_OE_SEL0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL0__SIZE
CYFLD_UDB_PA_OE_SEL0__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL0_DSI_OE_OUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL1__OFFSET
CYFLD_UDB_PA_OE_SEL1__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL1__SIZE
CYFLD_UDB_PA_OE_SEL1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL1_DSI_OE_OUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL2__OFFSET
CYFLD_UDB_PA_OE_SEL2__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL2__SIZE
CYFLD_UDB_PA_OE_SEL2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL2_DSI_OE_OUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL3__OFFSET
CYFLD_UDB_PA_OE_SEL3__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL3__SIZE
CYFLD_UDB_PA_OE_SEL3__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL3_DSI_OE_OUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG13
CYREG_UDB_PA0_CFG13 EQU 0x400f500d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL4__OFFSET
CYFLD_UDB_PA_OE_SEL4__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL4__SIZE
CYFLD_UDB_PA_OE_SEL4__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL4_DSI_OE_OUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL5__OFFSET
CYFLD_UDB_PA_OE_SEL5__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL5__SIZE
CYFLD_UDB_PA_OE_SEL5__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL5_DSI_OE_OUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL6__OFFSET
CYFLD_UDB_PA_OE_SEL6__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL6__SIZE
CYFLD_UDB_PA_OE_SEL6__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL6_DSI_OE_OUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL7__OFFSET
CYFLD_UDB_PA_OE_SEL7__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SEL7__SIZE
CYFLD_UDB_PA_OE_SEL7__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT0
CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT1
CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT2
CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT3
CYVAL_UDB_PA_OE_SEL7_DSI_OE_OUT3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA0_CFG14
CYREG_UDB_PA0_CFG14 EQU 0x400f500e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC0__OFFSET
CYFLD_UDB_PA_OE_SYNC0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC0__SIZE
CYFLD_UDB_PA_OE_SYNC0__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC0_TRANSPARENT
CYVAL_UDB_PA_OE_SYNC0_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC0_SINGLESYNC
CYVAL_UDB_PA_OE_SYNC0_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC0_CONSTANT1
CYVAL_UDB_PA_OE_SYNC0_CONSTANT1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC0_CONSTANT0
CYVAL_UDB_PA_OE_SYNC0_CONSTANT0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC1__OFFSET
CYFLD_UDB_PA_OE_SYNC1__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC1__SIZE
CYFLD_UDB_PA_OE_SYNC1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC1_TRANSPARENT
CYVAL_UDB_PA_OE_SYNC1_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC1_SINGLESYNC
CYVAL_UDB_PA_OE_SYNC1_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC1_CONSTANT1
CYVAL_UDB_PA_OE_SYNC1_CONSTANT1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC1_CONSTANT0
CYVAL_UDB_PA_OE_SYNC1_CONSTANT0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC2__OFFSET
CYFLD_UDB_PA_OE_SYNC2__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC2__SIZE
CYFLD_UDB_PA_OE_SYNC2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC2_TRANSPARENT
CYVAL_UDB_PA_OE_SYNC2_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC2_SINGLESYNC
CYVAL_UDB_PA_OE_SYNC2_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC2_CONSTANT1
CYVAL_UDB_PA_OE_SYNC2_CONSTANT1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC2_CONSTANT0
CYVAL_UDB_PA_OE_SYNC2_CONSTANT0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC3__OFFSET
CYFLD_UDB_PA_OE_SYNC3__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_PA_OE_SYNC3__SIZE
CYFLD_UDB_PA_OE_SYNC3__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC3_TRANSPARENT
CYVAL_UDB_PA_OE_SYNC3_TRANSPARENT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC3_SINGLESYNC
CYVAL_UDB_PA_OE_SYNC3_SINGLESYNC EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC3_CONSTANT1
CYVAL_UDB_PA_OE_SYNC3_CONSTANT1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_PA_OE_SYNC3_CONSTANT0
CYVAL_UDB_PA_OE_SYNC3_CONSTANT0 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_PA1_BASE
CYDEV_UDB_PA1_BASE EQU 0x400f5010
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_PA1_SIZE
CYDEV_UDB_PA1_SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG0
CYREG_UDB_PA1_CFG0 EQU 0x400f5010
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG1
CYREG_UDB_PA1_CFG1 EQU 0x400f5011
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG2
CYREG_UDB_PA1_CFG2 EQU 0x400f5012
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG3
CYREG_UDB_PA1_CFG3 EQU 0x400f5013
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG4
CYREG_UDB_PA1_CFG4 EQU 0x400f5014
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG5
CYREG_UDB_PA1_CFG5 EQU 0x400f5015
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG6
CYREG_UDB_PA1_CFG6 EQU 0x400f5016
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG7
CYREG_UDB_PA1_CFG7 EQU 0x400f5017
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG8
CYREG_UDB_PA1_CFG8 EQU 0x400f5018
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG9
CYREG_UDB_PA1_CFG9 EQU 0x400f5019
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG10
CYREG_UDB_PA1_CFG10 EQU 0x400f501a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG11
CYREG_UDB_PA1_CFG11 EQU 0x400f501b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG12
CYREG_UDB_PA1_CFG12 EQU 0x400f501c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG13
CYREG_UDB_PA1_CFG13 EQU 0x400f501d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA1_CFG14
CYREG_UDB_PA1_CFG14 EQU 0x400f501e
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_PA2_BASE
CYDEV_UDB_PA2_BASE EQU 0x400f5020
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_PA2_SIZE
CYDEV_UDB_PA2_SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG0
CYREG_UDB_PA2_CFG0 EQU 0x400f5020
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG1
CYREG_UDB_PA2_CFG1 EQU 0x400f5021
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG2
CYREG_UDB_PA2_CFG2 EQU 0x400f5022
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG3
CYREG_UDB_PA2_CFG3 EQU 0x400f5023
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG4
CYREG_UDB_PA2_CFG4 EQU 0x400f5024
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG5
CYREG_UDB_PA2_CFG5 EQU 0x400f5025
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG6
CYREG_UDB_PA2_CFG6 EQU 0x400f5026
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG7
CYREG_UDB_PA2_CFG7 EQU 0x400f5027
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG8
CYREG_UDB_PA2_CFG8 EQU 0x400f5028
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG9
CYREG_UDB_PA2_CFG9 EQU 0x400f5029
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG10
CYREG_UDB_PA2_CFG10 EQU 0x400f502a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG11
CYREG_UDB_PA2_CFG11 EQU 0x400f502b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG12
CYREG_UDB_PA2_CFG12 EQU 0x400f502c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG13
CYREG_UDB_PA2_CFG13 EQU 0x400f502d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA2_CFG14
CYREG_UDB_PA2_CFG14 EQU 0x400f502e
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_PA3_BASE
CYDEV_UDB_PA3_BASE EQU 0x400f5030
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_PA3_SIZE
CYDEV_UDB_PA3_SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG0
CYREG_UDB_PA3_CFG0 EQU 0x400f5030
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG1
CYREG_UDB_PA3_CFG1 EQU 0x400f5031
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG2
CYREG_UDB_PA3_CFG2 EQU 0x400f5032
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG3
CYREG_UDB_PA3_CFG3 EQU 0x400f5033
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG4
CYREG_UDB_PA3_CFG4 EQU 0x400f5034
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG5
CYREG_UDB_PA3_CFG5 EQU 0x400f5035
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG6
CYREG_UDB_PA3_CFG6 EQU 0x400f5036
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG7
CYREG_UDB_PA3_CFG7 EQU 0x400f5037
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG8
CYREG_UDB_PA3_CFG8 EQU 0x400f5038
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG9
CYREG_UDB_PA3_CFG9 EQU 0x400f5039
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG10
CYREG_UDB_PA3_CFG10 EQU 0x400f503a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG11
CYREG_UDB_PA3_CFG11 EQU 0x400f503b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG12
CYREG_UDB_PA3_CFG12 EQU 0x400f503c
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG13
CYREG_UDB_PA3_CFG13 EQU 0x400f503d
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_PA3_CFG14
CYREG_UDB_PA3_CFG14 EQU 0x400f503e
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_BCTL0_BASE
CYDEV_UDB_BCTL0_BASE EQU 0x400f6000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_BCTL0_SIZE
CYDEV_UDB_BCTL0_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_DRV
CYREG_UDB_BCTL0_DRV EQU 0x400f6000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_DRV__OFFSET
CYFLD_UDB_BCTL0_DRV__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_DRV__SIZE
CYFLD_UDB_BCTL0_DRV__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_DRV_DISABLE
CYVAL_UDB_BCTL0_DRV_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_DRV_ENABLE
CYVAL_UDB_BCTL0_DRV_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_MDCLK_EN
CYREG_UDB_BCTL0_MDCLK_EN EQU 0x400f6001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_DCEN__OFFSET
CYFLD_UDB_BCTL0_DCEN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_DCEN__SIZE
CYFLD_UDB_BCTL0_DCEN__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_DCEN_DISABLE
CYVAL_UDB_BCTL0_DCEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_DCEN_ENABLE
CYVAL_UDB_BCTL0_DCEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_MBCLK_EN
CYREG_UDB_BCTL0_MBCLK_EN EQU 0x400f6002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_BCEN__OFFSET
CYFLD_UDB_BCTL0_BCEN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_BCEN__SIZE
CYFLD_UDB_BCTL0_BCEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_BCEN_DISABLE
CYVAL_UDB_BCTL0_BCEN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_BCEN_ENABLE
CYVAL_UDB_BCTL0_BCEN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_BOTSEL_L
CYREG_UDB_BCTL0_BOTSEL_L EQU 0x400f6008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL0__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL0__SIZE
CYFLD_UDB_BCTL0_CLK_SEL0__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL0_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL0_EDGE_ENABLES EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL0_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL0_PORT_INPUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL0_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL0_DSI_OUTPUT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL0_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL0_SYNC_DSI_OUTPUT EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL1__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL1__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL1__SIZE
CYFLD_UDB_BCTL0_CLK_SEL1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL1_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL1_EDGE_ENABLES EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL1_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL1_PORT_INPUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL1_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL1_DSI_OUTPUT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL1_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL1_SYNC_DSI_OUTPUT EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL2__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL2__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL2__SIZE
CYFLD_UDB_BCTL0_CLK_SEL2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL2_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL2_EDGE_ENABLES EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL2_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL2_PORT_INPUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL2_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL2_DSI_OUTPUT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL2_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL2_SYNC_DSI_OUTPUT EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL3__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL3__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL3__SIZE
CYFLD_UDB_BCTL0_CLK_SEL3__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL3_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL3_EDGE_ENABLES EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL3_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL3_PORT_INPUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL3_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL3_DSI_OUTPUT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL3_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL3_SYNC_DSI_OUTPUT EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_BOTSEL_U
CYREG_UDB_BCTL0_BOTSEL_U EQU 0x400f6009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL4__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL4__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL4__SIZE
CYFLD_UDB_BCTL0_CLK_SEL4__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL4_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL4_EDGE_ENABLES EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL4_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL4_PORT_INPUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL4_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL4_DSI_OUTPUT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL4_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL4_SYNC_DSI_OUTPUT EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL5__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL5__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL5__SIZE
CYFLD_UDB_BCTL0_CLK_SEL5__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL5_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL5_EDGE_ENABLES EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL5_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL5_PORT_INPUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL5_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL5_DSI_OUTPUT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL5_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL5_SYNC_DSI_OUTPUT EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL6__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL6__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL6__SIZE
CYFLD_UDB_BCTL0_CLK_SEL6__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL6_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL6_EDGE_ENABLES EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL6_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL6_PORT_INPUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL6_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL6_DSI_OUTPUT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL6_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL6_SYNC_DSI_OUTPUT EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL7__OFFSET
CYFLD_UDB_BCTL0_CLK_SEL7__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_CLK_SEL7__SIZE
CYFLD_UDB_BCTL0_CLK_SEL7__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL7_EDGE_ENABLES
CYVAL_UDB_BCTL0_CLK_SEL7_EDGE_ENABLES EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL7_PORT_INPUT
CYVAL_UDB_BCTL0_CLK_SEL7_PORT_INPUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL7_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL7_DSI_OUTPUT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_CLK_SEL7_SYNC_DSI_OUTPUT
CYVAL_UDB_BCTL0_CLK_SEL7_SYNC_DSI_OUTPUT EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_TOPSEL_L
CYREG_UDB_BCTL0_TOPSEL_L EQU 0x400f600a
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_TOPSEL_U
CYREG_UDB_BCTL0_TOPSEL_U EQU 0x400f600b
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_QCLK_EN0
CYREG_UDB_BCTL0_QCLK_EN0 EQU 0x400f6010
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_DCEN_Q__OFFSET
CYFLD_UDB_BCTL0_DCEN_Q__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_DCEN_Q__SIZE
CYFLD_UDB_BCTL0_DCEN_Q__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_DCEN_Q_DISABLE
CYVAL_UDB_BCTL0_DCEN_Q_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_DCEN_Q_ENABLE
CYVAL_UDB_BCTL0_DCEN_Q_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_BCEN_Q__OFFSET
CYFLD_UDB_BCTL0_BCEN_Q__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_BCEN_Q__SIZE
CYFLD_UDB_BCTL0_BCEN_Q__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_BCEN_Q_DISABLE
CYVAL_UDB_BCTL0_BCEN_Q_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_BCEN_Q_ENABLE
CYVAL_UDB_BCTL0_BCEN_Q_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_GCH_WR_LO__OFFSET
CYFLD_UDB_BCTL0_GCH_WR_LO__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_GCH_WR_LO__SIZE
CYFLD_UDB_BCTL0_GCH_WR_LO__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_GCH_WR_LO_DISABLE
CYVAL_UDB_BCTL0_GCH_WR_LO_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_GCH_WR_LO_ENABLE
CYVAL_UDB_BCTL0_GCH_WR_LO_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_GCH_WR_HI__OFFSET
CYFLD_UDB_BCTL0_GCH_WR_HI__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_GCH_WR_HI__SIZE
CYFLD_UDB_BCTL0_GCH_WR_HI__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_GCH_WR_HI_DISABLE
CYVAL_UDB_BCTL0_GCH_WR_HI_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_GCH_WR_HI_ENABLE
CYVAL_UDB_BCTL0_GCH_WR_HI_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_DISABLE_ROUTE__OFFSET
CYFLD_UDB_BCTL0_DISABLE_ROUTE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_DISABLE_ROUTE__SIZE
CYFLD_UDB_BCTL0_DISABLE_ROUTE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_DISABLE_ROUTE_DISABLE
CYVAL_UDB_BCTL0_DISABLE_ROUTE_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_DISABLE_ROUTE_ENABLE
CYVAL_UDB_BCTL0_DISABLE_ROUTE_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_GLB_DSI_WR__OFFSET
CYFLD_UDB_BCTL0_GLB_DSI_WR__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_GLB_DSI_WR__SIZE
CYFLD_UDB_BCTL0_GLB_DSI_WR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_GLB_DSI_WR_DISABLE
CYVAL_UDB_BCTL0_GLB_DSI_WR_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_GLB_DSI_WR_ENABLE
CYVAL_UDB_BCTL0_GLB_DSI_WR_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_WR_CFG_OPT__OFFSET
CYFLD_UDB_BCTL0_WR_CFG_OPT__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_WR_CFG_OPT__SIZE
CYFLD_UDB_BCTL0_WR_CFG_OPT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_WR_CFG_OPT_FULL_CYCLE_STB
CYVAL_UDB_BCTL0_WR_CFG_OPT_FULL_CYCLE_STB EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_WR_CFG_OPT_HALF_CYCLE_STB
CYVAL_UDB_BCTL0_WR_CFG_OPT_HALF_CYCLE_STB EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_NC0__OFFSET
CYFLD_UDB_BCTL0_NC0__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_NC0__SIZE
CYFLD_UDB_BCTL0_NC0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_SLEEP_TEST__OFFSET
CYFLD_UDB_BCTL0_SLEEP_TEST__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_BCTL0_SLEEP_TEST__SIZE
CYFLD_UDB_BCTL0_SLEEP_TEST__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_SLEEP_TEST_DISABLE
CYVAL_UDB_BCTL0_SLEEP_TEST_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_BCTL0_SLEEP_TEST_ENABLE
CYVAL_UDB_BCTL0_SLEEP_TEST_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_QCLK_EN1
CYREG_UDB_BCTL0_QCLK_EN1 EQU 0x400f6012
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_QCLK_EN2
CYREG_UDB_BCTL0_QCLK_EN2 EQU 0x400f6014
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_BCTL0_QCLK_EN3
CYREG_UDB_BCTL0_QCLK_EN3 EQU 0x400f6016
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_UDBIF_BASE
CYDEV_UDB_UDBIF_BASE EQU 0x400f7000
    ENDIF
    IF :LNOT::DEF:CYDEV_UDB_UDBIF_SIZE
CYDEV_UDB_UDBIF_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_UDBIF_BANK_CTL
CYREG_UDB_UDBIF_BANK_CTL EQU 0x400f7000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_DIS_COR__OFFSET
CYFLD_UDB_UDBIF_DIS_COR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_DIS_COR__SIZE
CYFLD_UDB_UDBIF_DIS_COR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_DIS_COR_NORMAL
CYVAL_UDB_UDBIF_DIS_COR_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_DIS_COR_DISABLE
CYVAL_UDB_UDBIF_DIS_COR_DISABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_ROUTE_EN__OFFSET
CYFLD_UDB_UDBIF_ROUTE_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_ROUTE_EN__SIZE
CYFLD_UDB_UDBIF_ROUTE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_ROUTE_EN_DISABLE
CYVAL_UDB_UDBIF_ROUTE_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_ROUTE_EN_ENABLE
CYVAL_UDB_UDBIF_ROUTE_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_BANK_EN__OFFSET
CYFLD_UDB_UDBIF_BANK_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_BANK_EN__SIZE
CYFLD_UDB_UDBIF_BANK_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_BANK_EN_DISABLE
CYVAL_UDB_UDBIF_BANK_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_BANK_EN_ENABLE
CYVAL_UDB_UDBIF_BANK_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_LOCK__OFFSET
CYFLD_UDB_UDBIF_LOCK__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_LOCK__SIZE
CYFLD_UDB_UDBIF_LOCK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_LOCK_MUTABLE
CYVAL_UDB_UDBIF_LOCK_MUTABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_LOCK_LOCKED
CYVAL_UDB_UDBIF_LOCK_LOCKED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_PIPE__OFFSET
CYFLD_UDB_UDBIF_PIPE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_PIPE__SIZE
CYFLD_UDB_UDBIF_PIPE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_PIPE_BYPASS
CYVAL_UDB_UDBIF_PIPE_BYPASS EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_PIPE_PIPELINED
CYVAL_UDB_UDBIF_PIPE_PIPELINED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_GLBL_WR__OFFSET
CYFLD_UDB_UDBIF_GLBL_WR__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_GLBL_WR__SIZE
CYFLD_UDB_UDBIF_GLBL_WR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_GLBL_WR_DISABLE
CYVAL_UDB_UDBIF_GLBL_WR_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_GLBL_WR_ENABLE
CYVAL_UDB_UDBIF_GLBL_WR_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_UDBIF_WAIT_CFG
CYREG_UDB_UDBIF_WAIT_CFG EQU 0x400f7001
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_RD_CFG_WAIT__OFFSET
CYFLD_UDB_UDBIF_RD_CFG_WAIT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_RD_CFG_WAIT__SIZE
CYFLD_UDB_UDBIF_RD_CFG_WAIT__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_CFG_WAIT_FIVE_WAITS
CYVAL_UDB_UDBIF_RD_CFG_WAIT_FIVE_WAITS EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_CFG_WAIT_FOUR_WAITS
CYVAL_UDB_UDBIF_RD_CFG_WAIT_FOUR_WAITS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_CFG_WAIT_THREE_WAITS
CYVAL_UDB_UDBIF_RD_CFG_WAIT_THREE_WAITS EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_CFG_WAIT_ONE_WAIT
CYVAL_UDB_UDBIF_RD_CFG_WAIT_ONE_WAIT EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_WR_CFG_WAIT__OFFSET
CYFLD_UDB_UDBIF_WR_CFG_WAIT__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_WR_CFG_WAIT__SIZE
CYFLD_UDB_UDBIF_WR_CFG_WAIT__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_CFG_WAIT_ONE_WAIT
CYVAL_UDB_UDBIF_WR_CFG_WAIT_ONE_WAIT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_CFG_WAIT_TWO_WAITS
CYVAL_UDB_UDBIF_WR_CFG_WAIT_TWO_WAITS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_CFG_WAIT_THREE_WAITS
CYVAL_UDB_UDBIF_WR_CFG_WAIT_THREE_WAITS EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_CFG_WAIT_ZERO_WAITS
CYVAL_UDB_UDBIF_WR_CFG_WAIT_ZERO_WAITS EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_RD_WRK_WAIT__OFFSET
CYFLD_UDB_UDBIF_RD_WRK_WAIT__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_RD_WRK_WAIT__SIZE
CYFLD_UDB_UDBIF_RD_WRK_WAIT__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_WRK_WAIT_ONE_WAIT
CYVAL_UDB_UDBIF_RD_WRK_WAIT_ONE_WAIT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_WRK_WAIT_TWO_WAITS
CYVAL_UDB_UDBIF_RD_WRK_WAIT_TWO_WAITS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_WRK_WAIT_THREE_WAITS
CYVAL_UDB_UDBIF_RD_WRK_WAIT_THREE_WAITS EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_RD_WRK_WAIT_ZERO_WAITS
CYVAL_UDB_UDBIF_RD_WRK_WAIT_ZERO_WAITS EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_WR_WRK_WAIT__OFFSET
CYFLD_UDB_UDBIF_WR_WRK_WAIT__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_WR_WRK_WAIT__SIZE
CYFLD_UDB_UDBIF_WR_WRK_WAIT__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_WRK_WAIT_ONE_WAIT
CYVAL_UDB_UDBIF_WR_WRK_WAIT_ONE_WAIT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_WRK_WAIT_TWO_WAITS
CYVAL_UDB_UDBIF_WR_WRK_WAIT_TWO_WAITS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_WRK_WAIT_THREE_WAITS
CYVAL_UDB_UDBIF_WR_WRK_WAIT_THREE_WAITS EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_UDBIF_WR_WRK_WAIT_ZERO_WAITS
CYVAL_UDB_UDBIF_WR_WRK_WAIT_ZERO_WAITS EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_UDBIF_INT_CLK_CTL
CYREG_UDB_UDBIF_INT_CLK_CTL EQU 0x400f701c
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_EN_HFCLK__OFFSET
CYFLD_UDB_UDBIF_EN_HFCLK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_UDBIF_EN_HFCLK__SIZE
CYFLD_UDB_UDBIF_EN_HFCLK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_INT_CFG
CYREG_UDB_INT_CFG EQU 0x400f8000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_INT_MODE_CFG__OFFSET
CYFLD_UDB_INT_MODE_CFG__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_UDB_INT_MODE_CFG__SIZE
CYFLD_UDB_INT_MODE_CFG__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_INT_MODE_CFG_LEVEL
CYVAL_UDB_INT_MODE_CFG_LEVEL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_UDB_INT_MODE_CFG_PULSE
CYVAL_UDB_INT_MODE_CFG_PULSE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYDEV_CPUSS_BASE
CYDEV_CPUSS_BASE EQU 0x40100000
    ENDIF
    IF :LNOT::DEF:CYDEV_CPUSS_SIZE
CYDEV_CPUSS_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_CONFIG
CYREG_CPUSS_CONFIG EQU 0x40100000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_VECT_IN_RAM__OFFSET
CYFLD_CPUSS_VECT_IN_RAM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_VECT_IN_RAM__SIZE
CYFLD_CPUSS_VECT_IN_RAM__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_SYSREQ
CYREG_CPUSS_SYSREQ EQU 0x40100004
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_SYSCALL_COMMAND__OFFSET
CYFLD_CPUSS_SYSCALL_COMMAND__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_SYSCALL_COMMAND__SIZE
CYFLD_CPUSS_SYSCALL_COMMAND__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_DIS_RESET_VECT_REL__OFFSET
CYFLD_CPUSS_DIS_RESET_VECT_REL__OFFSET EQU 0x0000001b
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_DIS_RESET_VECT_REL__SIZE
CYFLD_CPUSS_DIS_RESET_VECT_REL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_PRIVILEGED__OFFSET
CYFLD_CPUSS_PRIVILEGED__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_PRIVILEGED__SIZE
CYFLD_CPUSS_PRIVILEGED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_ROM_ACCESS_EN__OFFSET
CYFLD_CPUSS_ROM_ACCESS_EN__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_ROM_ACCESS_EN__SIZE
CYFLD_CPUSS_ROM_ACCESS_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_HMASTER_0__OFFSET
CYFLD_CPUSS_HMASTER_0__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_HMASTER_0__SIZE
CYFLD_CPUSS_HMASTER_0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_SYSCALL_REQ__OFFSET
CYFLD_CPUSS_SYSCALL_REQ__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_SYSCALL_REQ__SIZE
CYFLD_CPUSS_SYSCALL_REQ__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_SYSARG
CYREG_CPUSS_SYSARG EQU 0x40100008
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_SYSCALL_ARG__OFFSET
CYFLD_CPUSS_SYSCALL_ARG__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_SYSCALL_ARG__SIZE
CYFLD_CPUSS_SYSCALL_ARG__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_PROTECTION
CYREG_CPUSS_PROTECTION EQU 0x4010000c
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_PROTECTION_MODE__OFFSET
CYFLD_CPUSS_PROTECTION_MODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_PROTECTION_MODE__SIZE
CYFLD_CPUSS_PROTECTION_MODE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_LOCK__OFFSET
CYFLD_CPUSS_FLASH_LOCK__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_LOCK__SIZE
CYFLD_CPUSS_FLASH_LOCK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_PROTECTION_LOCK__OFFSET
CYFLD_CPUSS_PROTECTION_LOCK__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_PROTECTION_LOCK__SIZE
CYFLD_CPUSS_PROTECTION_LOCK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_PRIV_ROM
CYREG_CPUSS_PRIV_ROM EQU 0x40100010
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_BROM_PROT_LIMIT__OFFSET
CYFLD_CPUSS_BROM_PROT_LIMIT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_BROM_PROT_LIMIT__SIZE
CYFLD_CPUSS_BROM_PROT_LIMIT__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_PRIV_RAM
CYREG_CPUSS_PRIV_RAM EQU 0x40100014
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_RAM_PROT_LIMIT__OFFSET
CYFLD_CPUSS_RAM_PROT_LIMIT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_RAM_PROT_LIMIT__SIZE
CYFLD_CPUSS_RAM_PROT_LIMIT__SIZE EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_PRIV_FLASH
CYREG_CPUSS_PRIV_FLASH EQU 0x40100018
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_PROT_LIMIT__OFFSET
CYFLD_CPUSS_FLASH_PROT_LIMIT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_PROT_LIMIT__SIZE
CYFLD_CPUSS_FLASH_PROT_LIMIT__SIZE EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_WOUNDING
CYREG_CPUSS_WOUNDING EQU 0x4010001c
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_RAM_WOUND__OFFSET
CYFLD_CPUSS_RAM_WOUND__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_RAM_WOUND__SIZE
CYFLD_CPUSS_RAM_WOUND__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_WOUND__OFFSET
CYFLD_CPUSS_FLASH_WOUND__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_WOUND__SIZE
CYFLD_CPUSS_FLASH_WOUND__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_INT_SEL
CYREG_CPUSS_INT_SEL EQU 0x40100020
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_DSI__OFFSET
CYFLD_CPUSS_DSI__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_DSI__SIZE
CYFLD_CPUSS_DSI__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_INT_MODE
CYREG_CPUSS_INT_MODE EQU 0x40100024
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_DSI_INT_PULSE__OFFSET
CYFLD_CPUSS_DSI_INT_PULSE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_DSI_INT_PULSE__SIZE
CYFLD_CPUSS_DSI_INT_PULSE__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_NMI_MODE
CYREG_CPUSS_NMI_MODE EQU 0x40100028
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_DSI_NMI_PULSE__OFFSET
CYFLD_CPUSS_DSI_NMI_PULSE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_DSI_NMI_PULSE__SIZE
CYFLD_CPUSS_DSI_NMI_PULSE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_FLASH_CTL
CYREG_CPUSS_FLASH_CTL EQU 0x40100030
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_WS__OFFSET
CYFLD_CPUSS_FLASH_WS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_WS__SIZE
CYFLD_CPUSS_FLASH_WS__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_PREF_EN__OFFSET
CYFLD_CPUSS_PREF_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_PREF_EN__SIZE
CYFLD_CPUSS_PREF_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_INVALIDATE__OFFSET
CYFLD_CPUSS_FLASH_INVALIDATE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_FLASH_INVALIDATE__SIZE
CYFLD_CPUSS_FLASH_INVALIDATE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CPUSS_ROM_CTL
CYREG_CPUSS_ROM_CTL EQU 0x40100034
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_ROM_WS__OFFSET
CYFLD_CPUSS_ROM_WS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CPUSS_ROM_WS__SIZE
CYFLD_CPUSS_ROM_WS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYDEV_SPCIF_BASE
CYDEV_SPCIF_BASE EQU 0x40110000
    ENDIF
    IF :LNOT::DEF:CYDEV_SPCIF_SIZE
CYDEV_SPCIF_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_SPCIF_GEOMETRY
CYREG_SPCIF_GEOMETRY EQU 0x40110000
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_FLASH__OFFSET
CYFLD_SPCIF_FLASH__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_FLASH__SIZE
CYFLD_SPCIF_FLASH__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_SFLASH__OFFSET
CYFLD_SPCIF_SFLASH__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_SFLASH__SIZE
CYFLD_SPCIF_SFLASH__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_NUM_FLASH__OFFSET
CYFLD_SPCIF_NUM_FLASH__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_NUM_FLASH__SIZE
CYFLD_SPCIF_NUM_FLASH__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_FLASH_ROW__OFFSET
CYFLD_SPCIF_FLASH_ROW__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_FLASH_ROW__SIZE
CYFLD_SPCIF_FLASH_ROW__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_NVL__OFFSET
CYFLD_SPCIF_NVL__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_NVL__SIZE
CYFLD_SPCIF_NVL__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_DE_CPD_LP__OFFSET
CYFLD_SPCIF_DE_CPD_LP__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_DE_CPD_LP__SIZE
CYFLD_SPCIF_DE_CPD_LP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SPCIF_NVL_WR_DATA
CYREG_SPCIF_NVL_WR_DATA EQU 0x4011001c
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_DATA__OFFSET
CYFLD_SPCIF_DATA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_DATA__SIZE
CYFLD_SPCIF_DATA__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SPCIF_INTR
CYREG_SPCIF_INTR EQU 0x401107f0
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_TIMER__OFFSET
CYFLD_SPCIF_TIMER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SPCIF_TIMER__SIZE
CYFLD_SPCIF_TIMER__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SPCIF_INTR_SET
CYREG_SPCIF_INTR_SET EQU 0x401107f4
    ENDIF
    IF :LNOT::DEF:CYREG_SPCIF_INTR_MASK
CYREG_SPCIF_INTR_MASK EQU 0x401107f8
    ENDIF
    IF :LNOT::DEF:CYREG_SPCIF_INTR_MASKED
CYREG_SPCIF_INTR_MASKED EQU 0x401107fc
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_BASE
CYDEV_TCPWM_BASE EQU 0x40200000
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_SIZE
CYDEV_TCPWM_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CTRL
CYREG_TCPWM_CTRL EQU 0x40200000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_ENABLED__OFFSET
CYFLD_TCPWM_COUNTER_ENABLED__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_ENABLED__SIZE
CYFLD_TCPWM_COUNTER_ENABLED__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CMD
CYREG_TCPWM_CMD EQU 0x40200008
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_CAPTURE__OFFSET
CYFLD_TCPWM_COUNTER_CAPTURE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_CAPTURE__SIZE
CYFLD_TCPWM_COUNTER_CAPTURE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_RELOAD__OFFSET
CYFLD_TCPWM_COUNTER_RELOAD__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_RELOAD__SIZE
CYFLD_TCPWM_COUNTER_RELOAD__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_STOP__OFFSET
CYFLD_TCPWM_COUNTER_STOP__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_STOP__SIZE
CYFLD_TCPWM_COUNTER_STOP__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_START__OFFSET
CYFLD_TCPWM_COUNTER_START__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_START__SIZE
CYFLD_TCPWM_COUNTER_START__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_INTR_CAUSE
CYREG_TCPWM_INTR_CAUSE EQU 0x4020000c
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_INT__OFFSET
CYFLD_TCPWM_COUNTER_INT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_COUNTER_INT__SIZE
CYFLD_TCPWM_COUNTER_INT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_CNT0_BASE
CYDEV_TCPWM_CNT0_BASE EQU 0x40200100
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_CNT0_SIZE
CYDEV_TCPWM_CNT0_SIZE EQU 0x00000040
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_CTRL
CYREG_TCPWM_CNT0_CTRL EQU 0x40200100
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__OFFSET
CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__SIZE
CYFLD_TCPWM_CNT_AUTO_RELOAD_CC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__OFFSET
CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__SIZE
CYFLD_TCPWM_CNT_AUTO_RELOAD_PERIOD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_PWM_SYNC_KILL__OFFSET
CYFLD_TCPWM_CNT_PWM_SYNC_KILL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_PWM_SYNC_KILL__SIZE
CYFLD_TCPWM_CNT_PWM_SYNC_KILL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__OFFSET
CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__SIZE
CYFLD_TCPWM_CNT_PWM_STOP_ON_KILL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_GENERIC__OFFSET
CYFLD_TCPWM_CNT_GENERIC__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_GENERIC__SIZE
CYFLD_TCPWM_CNT_GENERIC__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY1
CYVAL_TCPWM_CNT_GENERIC_DIVBY1 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY2
CYVAL_TCPWM_CNT_GENERIC_DIVBY2 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY4
CYVAL_TCPWM_CNT_GENERIC_DIVBY4 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY8
CYVAL_TCPWM_CNT_GENERIC_DIVBY8 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY16
CYVAL_TCPWM_CNT_GENERIC_DIVBY16 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY32
CYVAL_TCPWM_CNT_GENERIC_DIVBY32 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY64
CYVAL_TCPWM_CNT_GENERIC_DIVBY64 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_GENERIC_DIVBY128
CYVAL_TCPWM_CNT_GENERIC_DIVBY128 EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_UP_DOWN_MODE__OFFSET
CYFLD_TCPWM_CNT_UP_DOWN_MODE__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_UP_DOWN_MODE__SIZE
CYFLD_TCPWM_CNT_UP_DOWN_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UP
CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UP EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_DOWN
CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_DOWN EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN1
CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN2
CYVAL_TCPWM_CNT_UP_DOWN_MODE_COUNT_UPDN2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_ONE_SHOT__OFFSET
CYFLD_TCPWM_CNT_ONE_SHOT__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_ONE_SHOT__SIZE
CYFLD_TCPWM_CNT_ONE_SHOT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_QUADRATURE_MODE__OFFSET
CYFLD_TCPWM_CNT_QUADRATURE_MODE__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_QUADRATURE_MODE__SIZE
CYFLD_TCPWM_CNT_QUADRATURE_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_X1
CYVAL_TCPWM_CNT_QUADRATURE_MODE_X1 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_X2
CYVAL_TCPWM_CNT_QUADRATURE_MODE_X2 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_X4
CYVAL_TCPWM_CNT_QUADRATURE_MODE_X4 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_OUT
CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_OUT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_COMPL_OUT
CYVAL_TCPWM_CNT_QUADRATURE_MODE_INV_COMPL_OUT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_MODE__OFFSET
CYFLD_TCPWM_CNT_MODE__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_MODE__SIZE
CYFLD_TCPWM_CNT_MODE__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_TIMER
CYVAL_TCPWM_CNT_MODE_TIMER EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_CAPTURE
CYVAL_TCPWM_CNT_MODE_CAPTURE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_QUAD
CYVAL_TCPWM_CNT_MODE_QUAD EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_PWM
CYVAL_TCPWM_CNT_MODE_PWM EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_PWM_DT
CYVAL_TCPWM_CNT_MODE_PWM_DT EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_MODE_PWM_PR
CYVAL_TCPWM_CNT_MODE_PWM_PR EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_STATUS
CYREG_TCPWM_CNT0_STATUS EQU 0x40200104
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_DOWN__OFFSET
CYFLD_TCPWM_CNT_DOWN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_DOWN__SIZE
CYFLD_TCPWM_CNT_DOWN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_RUNNING__OFFSET
CYFLD_TCPWM_CNT_RUNNING__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_RUNNING__SIZE
CYFLD_TCPWM_CNT_RUNNING__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_COUNTER
CYREG_TCPWM_CNT0_COUNTER EQU 0x40200108
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNTER__OFFSET
CYFLD_TCPWM_CNT_COUNTER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNTER__SIZE
CYFLD_TCPWM_CNT_COUNTER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_CC
CYREG_TCPWM_CNT0_CC EQU 0x4020010c
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC__OFFSET
CYFLD_TCPWM_CNT_CC__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC__SIZE
CYFLD_TCPWM_CNT_CC__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_CC_BUFF
CYREG_TCPWM_CNT0_CC_BUFF EQU 0x40200110
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_PERIOD
CYREG_TCPWM_CNT0_PERIOD EQU 0x40200114
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_PERIOD__OFFSET
CYFLD_TCPWM_CNT_PERIOD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_PERIOD__SIZE
CYFLD_TCPWM_CNT_PERIOD__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_PERIOD_BUFF
CYREG_TCPWM_CNT0_PERIOD_BUFF EQU 0x40200118
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_TR_CTRL0
CYREG_TCPWM_CNT0_TR_CTRL0 EQU 0x40200120
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CAPTURE_SEL__OFFSET
CYFLD_TCPWM_CNT_CAPTURE_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CAPTURE_SEL__SIZE
CYFLD_TCPWM_CNT_CAPTURE_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNT_SEL__OFFSET
CYFLD_TCPWM_CNT_COUNT_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNT_SEL__SIZE
CYFLD_TCPWM_CNT_COUNT_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_RELOAD_SEL__OFFSET
CYFLD_TCPWM_CNT_RELOAD_SEL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_RELOAD_SEL__SIZE
CYFLD_TCPWM_CNT_RELOAD_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_STOP_SEL__OFFSET
CYFLD_TCPWM_CNT_STOP_SEL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_STOP_SEL__SIZE
CYFLD_TCPWM_CNT_STOP_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_START_SEL__OFFSET
CYFLD_TCPWM_CNT_START_SEL__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_START_SEL__SIZE
CYFLD_TCPWM_CNT_START_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_TR_CTRL1
CYREG_TCPWM_CNT0_TR_CTRL1 EQU 0x40200124
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CAPTURE_EDGE__OFFSET
CYFLD_TCPWM_CNT_CAPTURE_EDGE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CAPTURE_EDGE__SIZE
CYFLD_TCPWM_CNT_CAPTURE_EDGE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_CAPTURE_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_CAPTURE_EDGE_RISING_EDGE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_CAPTURE_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_CAPTURE_EDGE_FALLING_EDGE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_CAPTURE_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_CAPTURE_EDGE_BOTH_EDGES EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_CAPTURE_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_CAPTURE_EDGE_NO_EDGE_DET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNT_EDGE__OFFSET
CYFLD_TCPWM_CNT_COUNT_EDGE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_COUNT_EDGE__SIZE
CYFLD_TCPWM_CNT_COUNT_EDGE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_COUNT_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_COUNT_EDGE_RISING_EDGE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_COUNT_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_COUNT_EDGE_FALLING_EDGE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_COUNT_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_COUNT_EDGE_BOTH_EDGES EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_COUNT_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_COUNT_EDGE_NO_EDGE_DET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_RELOAD_EDGE__OFFSET
CYFLD_TCPWM_CNT_RELOAD_EDGE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_RELOAD_EDGE__SIZE
CYFLD_TCPWM_CNT_RELOAD_EDGE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_RELOAD_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_RELOAD_EDGE_RISING_EDGE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_RELOAD_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_RELOAD_EDGE_FALLING_EDGE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_RELOAD_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_RELOAD_EDGE_BOTH_EDGES EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_RELOAD_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_RELOAD_EDGE_NO_EDGE_DET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_STOP_EDGE__OFFSET
CYFLD_TCPWM_CNT_STOP_EDGE__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_STOP_EDGE__SIZE
CYFLD_TCPWM_CNT_STOP_EDGE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_STOP_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_STOP_EDGE_RISING_EDGE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_STOP_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_STOP_EDGE_FALLING_EDGE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_STOP_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_STOP_EDGE_BOTH_EDGES EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_STOP_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_STOP_EDGE_NO_EDGE_DET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_START_EDGE__OFFSET
CYFLD_TCPWM_CNT_START_EDGE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_START_EDGE__SIZE
CYFLD_TCPWM_CNT_START_EDGE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_START_EDGE_RISING_EDGE
CYVAL_TCPWM_CNT_START_EDGE_RISING_EDGE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_START_EDGE_FALLING_EDGE
CYVAL_TCPWM_CNT_START_EDGE_FALLING_EDGE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_START_EDGE_BOTH_EDGES
CYVAL_TCPWM_CNT_START_EDGE_BOTH_EDGES EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_START_EDGE_NO_EDGE_DET
CYVAL_TCPWM_CNT_START_EDGE_NO_EDGE_DET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_TR_CTRL2
CYREG_TCPWM_CNT0_TR_CTRL2 EQU 0x40200128
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC_MATCH_MODE__OFFSET
CYFLD_TCPWM_CNT_CC_MATCH_MODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC_MATCH_MODE__SIZE
CYFLD_TCPWM_CNT_CC_MATCH_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_CC_MATCH_MODE_SET
CYVAL_TCPWM_CNT_CC_MATCH_MODE_SET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_CC_MATCH_MODE_CLEAR
CYVAL_TCPWM_CNT_CC_MATCH_MODE_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_CC_MATCH_MODE_INVERT
CYVAL_TCPWM_CNT_CC_MATCH_MODE_INVERT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_CC_MATCH_MODE_NO_CHANGE
CYVAL_TCPWM_CNT_CC_MATCH_MODE_NO_CHANGE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_OVERFLOW_MODE__OFFSET
CYFLD_TCPWM_CNT_OVERFLOW_MODE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_OVERFLOW_MODE__SIZE
CYFLD_TCPWM_CNT_OVERFLOW_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_OVERFLOW_MODE_SET
CYVAL_TCPWM_CNT_OVERFLOW_MODE_SET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_OVERFLOW_MODE_CLEAR
CYVAL_TCPWM_CNT_OVERFLOW_MODE_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_OVERFLOW_MODE_INVERT
CYVAL_TCPWM_CNT_OVERFLOW_MODE_INVERT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_OVERFLOW_MODE_NO_CHANGE
CYVAL_TCPWM_CNT_OVERFLOW_MODE_NO_CHANGE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_UNDERFLOW_MODE__OFFSET
CYFLD_TCPWM_CNT_UNDERFLOW_MODE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_UNDERFLOW_MODE__SIZE
CYFLD_TCPWM_CNT_UNDERFLOW_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_UNDERFLOW_MODE_SET
CYVAL_TCPWM_CNT_UNDERFLOW_MODE_SET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_UNDERFLOW_MODE_CLEAR
CYVAL_TCPWM_CNT_UNDERFLOW_MODE_CLEAR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_UNDERFLOW_MODE_INVERT
CYVAL_TCPWM_CNT_UNDERFLOW_MODE_INVERT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_TCPWM_CNT_UNDERFLOW_MODE_NO_CHANGE
CYVAL_TCPWM_CNT_UNDERFLOW_MODE_NO_CHANGE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_INTR
CYREG_TCPWM_CNT0_INTR EQU 0x40200130
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_TC__OFFSET
CYFLD_TCPWM_CNT_TC__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_TC__SIZE
CYFLD_TCPWM_CNT_TC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC_MATCH__OFFSET
CYFLD_TCPWM_CNT_CC_MATCH__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_TCPWM_CNT_CC_MATCH__SIZE
CYFLD_TCPWM_CNT_CC_MATCH__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_INTR_SET
CYREG_TCPWM_CNT0_INTR_SET EQU 0x40200134
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_INTR_MASK
CYREG_TCPWM_CNT0_INTR_MASK EQU 0x40200138
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT0_INTR_MASKED
CYREG_TCPWM_CNT0_INTR_MASKED EQU 0x4020013c
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_CNT1_BASE
CYDEV_TCPWM_CNT1_BASE EQU 0x40200140
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_CNT1_SIZE
CYDEV_TCPWM_CNT1_SIZE EQU 0x00000040
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_CTRL
CYREG_TCPWM_CNT1_CTRL EQU 0x40200140
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_STATUS
CYREG_TCPWM_CNT1_STATUS EQU 0x40200144
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_COUNTER
CYREG_TCPWM_CNT1_COUNTER EQU 0x40200148
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_CC
CYREG_TCPWM_CNT1_CC EQU 0x4020014c
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_CC_BUFF
CYREG_TCPWM_CNT1_CC_BUFF EQU 0x40200150
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_PERIOD
CYREG_TCPWM_CNT1_PERIOD EQU 0x40200154
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_PERIOD_BUFF
CYREG_TCPWM_CNT1_PERIOD_BUFF EQU 0x40200158
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_TR_CTRL0
CYREG_TCPWM_CNT1_TR_CTRL0 EQU 0x40200160
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_TR_CTRL1
CYREG_TCPWM_CNT1_TR_CTRL1 EQU 0x40200164
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_TR_CTRL2
CYREG_TCPWM_CNT1_TR_CTRL2 EQU 0x40200168
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_INTR
CYREG_TCPWM_CNT1_INTR EQU 0x40200170
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_INTR_SET
CYREG_TCPWM_CNT1_INTR_SET EQU 0x40200174
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_INTR_MASK
CYREG_TCPWM_CNT1_INTR_MASK EQU 0x40200178
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT1_INTR_MASKED
CYREG_TCPWM_CNT1_INTR_MASKED EQU 0x4020017c
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_CNT2_BASE
CYDEV_TCPWM_CNT2_BASE EQU 0x40200180
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_CNT2_SIZE
CYDEV_TCPWM_CNT2_SIZE EQU 0x00000040
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_CTRL
CYREG_TCPWM_CNT2_CTRL EQU 0x40200180
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_STATUS
CYREG_TCPWM_CNT2_STATUS EQU 0x40200184
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_COUNTER
CYREG_TCPWM_CNT2_COUNTER EQU 0x40200188
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_CC
CYREG_TCPWM_CNT2_CC EQU 0x4020018c
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_CC_BUFF
CYREG_TCPWM_CNT2_CC_BUFF EQU 0x40200190
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_PERIOD
CYREG_TCPWM_CNT2_PERIOD EQU 0x40200194
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_PERIOD_BUFF
CYREG_TCPWM_CNT2_PERIOD_BUFF EQU 0x40200198
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_TR_CTRL0
CYREG_TCPWM_CNT2_TR_CTRL0 EQU 0x402001a0
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_TR_CTRL1
CYREG_TCPWM_CNT2_TR_CTRL1 EQU 0x402001a4
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_TR_CTRL2
CYREG_TCPWM_CNT2_TR_CTRL2 EQU 0x402001a8
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_INTR
CYREG_TCPWM_CNT2_INTR EQU 0x402001b0
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_INTR_SET
CYREG_TCPWM_CNT2_INTR_SET EQU 0x402001b4
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_INTR_MASK
CYREG_TCPWM_CNT2_INTR_MASK EQU 0x402001b8
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT2_INTR_MASKED
CYREG_TCPWM_CNT2_INTR_MASKED EQU 0x402001bc
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_CNT3_BASE
CYDEV_TCPWM_CNT3_BASE EQU 0x402001c0
    ENDIF
    IF :LNOT::DEF:CYDEV_TCPWM_CNT3_SIZE
CYDEV_TCPWM_CNT3_SIZE EQU 0x00000040
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_CTRL
CYREG_TCPWM_CNT3_CTRL EQU 0x402001c0
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_STATUS
CYREG_TCPWM_CNT3_STATUS EQU 0x402001c4
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_COUNTER
CYREG_TCPWM_CNT3_COUNTER EQU 0x402001c8
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_CC
CYREG_TCPWM_CNT3_CC EQU 0x402001cc
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_CC_BUFF
CYREG_TCPWM_CNT3_CC_BUFF EQU 0x402001d0
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_PERIOD
CYREG_TCPWM_CNT3_PERIOD EQU 0x402001d4
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_PERIOD_BUFF
CYREG_TCPWM_CNT3_PERIOD_BUFF EQU 0x402001d8
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_TR_CTRL0
CYREG_TCPWM_CNT3_TR_CTRL0 EQU 0x402001e0
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_TR_CTRL1
CYREG_TCPWM_CNT3_TR_CTRL1 EQU 0x402001e4
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_TR_CTRL2
CYREG_TCPWM_CNT3_TR_CTRL2 EQU 0x402001e8
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_INTR
CYREG_TCPWM_CNT3_INTR EQU 0x402001f0
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_INTR_SET
CYREG_TCPWM_CNT3_INTR_SET EQU 0x402001f4
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_INTR_MASK
CYREG_TCPWM_CNT3_INTR_MASK EQU 0x402001f8
    ENDIF
    IF :LNOT::DEF:CYREG_TCPWM_CNT3_INTR_MASKED
CYREG_TCPWM_CNT3_INTR_MASKED EQU 0x402001fc
    ENDIF
    IF :LNOT::DEF:CYDEV_SCB0_BASE
CYDEV_SCB0_BASE EQU 0x40240000
    ENDIF
    IF :LNOT::DEF:CYDEV_SCB0_SIZE
CYDEV_SCB0_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_CTRL
CYREG_SCB0_CTRL EQU 0x40240000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_OVS__OFFSET
CYFLD_SCB_OVS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_OVS__SIZE
CYFLD_SCB_OVS__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EC_AM_MODE__OFFSET
CYFLD_SCB_EC_AM_MODE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EC_AM_MODE__SIZE
CYFLD_SCB_EC_AM_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EC_OP_MODE__OFFSET
CYFLD_SCB_EC_OP_MODE__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EC_OP_MODE__SIZE
CYFLD_SCB_EC_OP_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_MODE__OFFSET
CYFLD_SCB_EZ_MODE__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_MODE__SIZE
CYFLD_SCB_EZ_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BYTE_MODE__OFFSET
CYFLD_SCB_BYTE_MODE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BYTE_MODE__SIZE
CYFLD_SCB_BYTE_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_ADDR_ACCEPT__OFFSET
CYFLD_SCB_ADDR_ACCEPT__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_ADDR_ACCEPT__SIZE
CYFLD_SCB_ADDR_ACCEPT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BLOCK__OFFSET
CYFLD_SCB_BLOCK__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BLOCK__SIZE
CYFLD_SCB_BLOCK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MODE__OFFSET
CYFLD_SCB_MODE__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MODE__SIZE
CYFLD_SCB_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SCB_MODE_I2C
CYVAL_SCB_MODE_I2C EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SCB_MODE_SPI
CYVAL_SCB_MODE_SPI EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SCB_MODE_UART
CYVAL_SCB_MODE_UART EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_ENABLED__OFFSET
CYFLD_SCB_ENABLED__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_ENABLED__SIZE
CYFLD_SCB_ENABLED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_STATUS
CYREG_SCB0_STATUS EQU 0x40240004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EC_BUSY__OFFSET
CYFLD_SCB_EC_BUSY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EC_BUSY__SIZE
CYFLD_SCB_EC_BUSY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_SPI_CTRL
CYREG_SCB0_SPI_CTRL EQU 0x40240020
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CONTINUOUS__OFFSET
CYFLD_SCB_CONTINUOUS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CONTINUOUS__SIZE
CYFLD_SCB_CONTINUOUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SELECT_PRECEDE__OFFSET
CYFLD_SCB_SELECT_PRECEDE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SELECT_PRECEDE__SIZE
CYFLD_SCB_SELECT_PRECEDE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CPHA__OFFSET
CYFLD_SCB_CPHA__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CPHA__SIZE
CYFLD_SCB_CPHA__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CPOL__OFFSET
CYFLD_SCB_CPOL__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CPOL__SIZE
CYFLD_SCB_CPOL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_LATE_MISO_SAMPLE__OFFSET
CYFLD_SCB_LATE_MISO_SAMPLE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_LATE_MISO_SAMPLE__SIZE
CYFLD_SCB_LATE_MISO_SAMPLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SCLK_CONTINUOUS__OFFSET
CYFLD_SCB_SCLK_CONTINUOUS__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SCLK_CONTINUOUS__SIZE
CYFLD_SCB_SCLK_CONTINUOUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SSEL_POLARITY0__OFFSET
CYFLD_SCB_SSEL_POLARITY0__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SSEL_POLARITY0__SIZE
CYFLD_SCB_SSEL_POLARITY0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SSEL_POLARITY1__OFFSET
CYFLD_SCB_SSEL_POLARITY1__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SSEL_POLARITY1__SIZE
CYFLD_SCB_SSEL_POLARITY1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SSEL_POLARITY2__OFFSET
CYFLD_SCB_SSEL_POLARITY2__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SSEL_POLARITY2__SIZE
CYFLD_SCB_SSEL_POLARITY2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SSEL_POLARITY3__OFFSET
CYFLD_SCB_SSEL_POLARITY3__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SSEL_POLARITY3__SIZE
CYFLD_SCB_SSEL_POLARITY3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_LOOPBACK__OFFSET
CYFLD_SCB_LOOPBACK__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_LOOPBACK__SIZE
CYFLD_SCB_LOOPBACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SLAVE_SELECT__OFFSET
CYFLD_SCB_SLAVE_SELECT__OFFSET EQU 0x0000001a
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SLAVE_SELECT__SIZE
CYFLD_SCB_SLAVE_SELECT__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MASTER_MODE__OFFSET
CYFLD_SCB_MASTER_MODE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MASTER_MODE__SIZE
CYFLD_SCB_MASTER_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_SPI_STATUS
CYREG_SCB0_SPI_STATUS EQU 0x40240024
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BUS_BUSY__OFFSET
CYFLD_SCB_BUS_BUSY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BUS_BUSY__SIZE
CYFLD_SCB_BUS_BUSY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_EC_BUSY__OFFSET
CYFLD_SCB_SPI_EC_BUSY__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_EC_BUSY__SIZE
CYFLD_SCB_SPI_EC_BUSY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CURR_EZ_ADDR__OFFSET
CYFLD_SCB_CURR_EZ_ADDR__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CURR_EZ_ADDR__SIZE
CYFLD_SCB_CURR_EZ_ADDR__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BASE_EZ_ADDR__OFFSET
CYFLD_SCB_BASE_EZ_ADDR__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BASE_EZ_ADDR__SIZE
CYFLD_SCB_BASE_EZ_ADDR__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_UART_CTRL
CYREG_SCB0_UART_CTRL EQU 0x40240040
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_UART_TX_CTRL
CYREG_SCB0_UART_TX_CTRL EQU 0x40240044
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_STOP_BITS__OFFSET
CYFLD_SCB_STOP_BITS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_STOP_BITS__SIZE
CYFLD_SCB_STOP_BITS__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_PARITY__OFFSET
CYFLD_SCB_PARITY__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_PARITY__SIZE
CYFLD_SCB_PARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_PARITY_ENABLED__OFFSET
CYFLD_SCB_PARITY_ENABLED__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_PARITY_ENABLED__SIZE
CYFLD_SCB_PARITY_ENABLED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_RETRY_ON_NACK__OFFSET
CYFLD_SCB_RETRY_ON_NACK__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_RETRY_ON_NACK__SIZE
CYFLD_SCB_RETRY_ON_NACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_UART_RX_CTRL
CYREG_SCB0_UART_RX_CTRL EQU 0x40240048
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_POLARITY__OFFSET
CYFLD_SCB_POLARITY__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_POLARITY__SIZE
CYFLD_SCB_POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_DROP_ON_PARITY_ERROR__OFFSET
CYFLD_SCB_DROP_ON_PARITY_ERROR__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_DROP_ON_PARITY_ERROR__SIZE
CYFLD_SCB_DROP_ON_PARITY_ERROR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_DROP_ON_FRAME_ERROR__OFFSET
CYFLD_SCB_DROP_ON_FRAME_ERROR__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_DROP_ON_FRAME_ERROR__SIZE
CYFLD_SCB_DROP_ON_FRAME_ERROR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MP_MODE__OFFSET
CYFLD_SCB_MP_MODE__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MP_MODE__SIZE
CYFLD_SCB_MP_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_LIN_MODE__OFFSET
CYFLD_SCB_LIN_MODE__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_LIN_MODE__SIZE
CYFLD_SCB_LIN_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SKIP_START__OFFSET
CYFLD_SCB_SKIP_START__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SKIP_START__SIZE
CYFLD_SCB_SKIP_START__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BREAK_WIDTH__OFFSET
CYFLD_SCB_BREAK_WIDTH__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BREAK_WIDTH__SIZE
CYFLD_SCB_BREAK_WIDTH__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_UART_RX_STATUS
CYREG_SCB0_UART_RX_STATUS EQU 0x4024004c
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BR_COUNTER__OFFSET
CYFLD_SCB_BR_COUNTER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BR_COUNTER__SIZE
CYFLD_SCB_BR_COUNTER__SIZE EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_UART_FLOW_CTRL
CYREG_SCB0_UART_FLOW_CTRL EQU 0x40240050
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_TRIGGER_LEVEL__OFFSET
CYFLD_SCB_TRIGGER_LEVEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_TRIGGER_LEVEL__SIZE
CYFLD_SCB_TRIGGER_LEVEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_RTS_POLARITY__OFFSET
CYFLD_SCB_RTS_POLARITY__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_RTS_POLARITY__SIZE
CYFLD_SCB_RTS_POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CTS_POLARITY__OFFSET
CYFLD_SCB_CTS_POLARITY__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CTS_POLARITY__SIZE
CYFLD_SCB_CTS_POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CTS_ENABLED__OFFSET
CYFLD_SCB_CTS_ENABLED__OFFSET EQU 0x00000019
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CTS_ENABLED__SIZE
CYFLD_SCB_CTS_ENABLED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_I2C_CTRL
CYREG_SCB0_I2C_CTRL EQU 0x40240060
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_HIGH_PHASE_OVS__OFFSET
CYFLD_SCB_HIGH_PHASE_OVS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_HIGH_PHASE_OVS__SIZE
CYFLD_SCB_HIGH_PHASE_OVS__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_LOW_PHASE_OVS__OFFSET
CYFLD_SCB_LOW_PHASE_OVS__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_LOW_PHASE_OVS__SIZE
CYFLD_SCB_LOW_PHASE_OVS__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_READY_DATA_ACK__OFFSET
CYFLD_SCB_M_READY_DATA_ACK__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_READY_DATA_ACK__SIZE
CYFLD_SCB_M_READY_DATA_ACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_NOT_READY_DATA_NACK__OFFSET
CYFLD_SCB_M_NOT_READY_DATA_NACK__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_NOT_READY_DATA_NACK__SIZE
CYFLD_SCB_M_NOT_READY_DATA_NACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_GENERAL_IGNORE__OFFSET
CYFLD_SCB_S_GENERAL_IGNORE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_GENERAL_IGNORE__SIZE
CYFLD_SCB_S_GENERAL_IGNORE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_READY_ADDR_ACK__OFFSET
CYFLD_SCB_S_READY_ADDR_ACK__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_READY_ADDR_ACK__SIZE
CYFLD_SCB_S_READY_ADDR_ACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_READY_DATA_ACK__OFFSET
CYFLD_SCB_S_READY_DATA_ACK__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_READY_DATA_ACK__SIZE
CYFLD_SCB_S_READY_DATA_ACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_NOT_READY_ADDR_NACK__OFFSET
CYFLD_SCB_S_NOT_READY_ADDR_NACK__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_NOT_READY_ADDR_NACK__SIZE
CYFLD_SCB_S_NOT_READY_ADDR_NACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_NOT_READY_DATA_NACK__OFFSET
CYFLD_SCB_S_NOT_READY_DATA_NACK__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_NOT_READY_DATA_NACK__SIZE
CYFLD_SCB_S_NOT_READY_DATA_NACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SLAVE_MODE__OFFSET
CYFLD_SCB_SLAVE_MODE__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SLAVE_MODE__SIZE
CYFLD_SCB_SLAVE_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_I2C_STATUS
CYREG_SCB0_I2C_STATUS EQU 0x40240064
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_EC_BUSY__OFFSET
CYFLD_SCB_I2C_EC_BUSY__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_EC_BUSY__SIZE
CYFLD_SCB_I2C_EC_BUSY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_READ__OFFSET
CYFLD_SCB_S_READ__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_READ__SIZE
CYFLD_SCB_S_READ__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_READ__OFFSET
CYFLD_SCB_M_READ__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_READ__SIZE
CYFLD_SCB_M_READ__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_I2C_M_CMD
CYREG_SCB0_I2C_M_CMD EQU 0x40240068
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_START__OFFSET
CYFLD_SCB_M_START__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_START__SIZE
CYFLD_SCB_M_START__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_START_ON_IDLE__OFFSET
CYFLD_SCB_M_START_ON_IDLE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_START_ON_IDLE__SIZE
CYFLD_SCB_M_START_ON_IDLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_ACK__OFFSET
CYFLD_SCB_M_ACK__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_ACK__SIZE
CYFLD_SCB_M_ACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_NACK__OFFSET
CYFLD_SCB_M_NACK__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_NACK__SIZE
CYFLD_SCB_M_NACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_STOP__OFFSET
CYFLD_SCB_M_STOP__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M_STOP__SIZE
CYFLD_SCB_M_STOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_I2C_S_CMD
CYREG_SCB0_I2C_S_CMD EQU 0x4024006c
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_ACK__OFFSET
CYFLD_SCB_S_ACK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_ACK__SIZE
CYFLD_SCB_S_ACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_NACK__OFFSET
CYFLD_SCB_S_NACK__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S_NACK__SIZE
CYFLD_SCB_S_NACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_I2C_CFG
CYREG_SCB0_I2C_CFG EQU 0x40240070
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_IN_FILT_TRIM__OFFSET
CYFLD_SCB_SDA_IN_FILT_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_IN_FILT_TRIM__SIZE
CYFLD_SCB_SDA_IN_FILT_TRIM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_IN_FILT_SEL__OFFSET
CYFLD_SCB_SDA_IN_FILT_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_IN_FILT_SEL__SIZE
CYFLD_SCB_SDA_IN_FILT_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SCL_IN_FILT_TRIM__OFFSET
CYFLD_SCB_SCL_IN_FILT_TRIM__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SCL_IN_FILT_TRIM__SIZE
CYFLD_SCB_SCL_IN_FILT_TRIM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SCL_IN_FILT_SEL__OFFSET
CYFLD_SCB_SCL_IN_FILT_SEL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SCL_IN_FILT_SEL__SIZE
CYFLD_SCB_SCL_IN_FILT_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_OUT_FILT0_TRIM__OFFSET
CYFLD_SCB_SDA_OUT_FILT0_TRIM__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_OUT_FILT0_TRIM__SIZE
CYFLD_SCB_SDA_OUT_FILT0_TRIM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_OUT_FILT1_TRIM__OFFSET
CYFLD_SCB_SDA_OUT_FILT1_TRIM__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_OUT_FILT1_TRIM__SIZE
CYFLD_SCB_SDA_OUT_FILT1_TRIM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_OUT_FILT2_TRIM__OFFSET
CYFLD_SCB_SDA_OUT_FILT2_TRIM__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_OUT_FILT2_TRIM__SIZE
CYFLD_SCB_SDA_OUT_FILT2_TRIM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_OUT_FILT_SEL__OFFSET
CYFLD_SCB_SDA_OUT_FILT_SEL__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SDA_OUT_FILT_SEL__SIZE
CYFLD_SCB_SDA_OUT_FILT_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_TX_CTRL
CYREG_SCB0_TX_CTRL EQU 0x40240200
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_DATA_WIDTH__OFFSET
CYFLD_SCB_DATA_WIDTH__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_DATA_WIDTH__SIZE
CYFLD_SCB_DATA_WIDTH__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MSB_FIRST__OFFSET
CYFLD_SCB_MSB_FIRST__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MSB_FIRST__SIZE
CYFLD_SCB_MSB_FIRST__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_TX_FIFO_CTRL
CYREG_SCB0_TX_FIFO_CTRL EQU 0x40240204
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CLEAR__OFFSET
CYFLD_SCB_CLEAR__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_CLEAR__SIZE
CYFLD_SCB_CLEAR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_FREEZE__OFFSET
CYFLD_SCB_FREEZE__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_FREEZE__SIZE
CYFLD_SCB_FREEZE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_TX_FIFO_STATUS
CYREG_SCB0_TX_FIFO_STATUS EQU 0x40240208
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_USED__OFFSET
CYFLD_SCB_USED__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_USED__SIZE
CYFLD_SCB_USED__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SR_VALID__OFFSET
CYFLD_SCB_SR_VALID__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SR_VALID__SIZE
CYFLD_SCB_SR_VALID__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_RD_PTR__OFFSET
CYFLD_SCB_RD_PTR__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_RD_PTR__SIZE
CYFLD_SCB_RD_PTR__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_WR_PTR__OFFSET
CYFLD_SCB_WR_PTR__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_WR_PTR__SIZE
CYFLD_SCB_WR_PTR__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_TX_FIFO_WR
CYREG_SCB0_TX_FIFO_WR EQU 0x40240240
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_DATA__OFFSET
CYFLD_SCB_DATA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_DATA__SIZE
CYFLD_SCB_DATA__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_RX_CTRL
CYREG_SCB0_RX_CTRL EQU 0x40240300
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MEDIAN__OFFSET
CYFLD_SCB_MEDIAN__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MEDIAN__SIZE
CYFLD_SCB_MEDIAN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_RX_FIFO_CTRL
CYREG_SCB0_RX_FIFO_CTRL EQU 0x40240304
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_RX_FIFO_STATUS
CYREG_SCB0_RX_FIFO_STATUS EQU 0x40240308
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_RX_MATCH
CYREG_SCB0_RX_MATCH EQU 0x40240310
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_ADDR__OFFSET
CYFLD_SCB_ADDR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_ADDR__SIZE
CYFLD_SCB_ADDR__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MASK__OFFSET
CYFLD_SCB_MASK__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_MASK__SIZE
CYFLD_SCB_MASK__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_RX_FIFO_RD
CYREG_SCB0_RX_FIFO_RD EQU 0x40240340
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_RX_FIFO_RD_SILENT
CYREG_SCB0_RX_FIFO_RD_SILENT EQU 0x40240344
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA0
CYREG_SCB0_EZ_DATA0 EQU 0x40240400
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_DATA__OFFSET
CYFLD_SCB_EZ_DATA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_DATA__SIZE
CYFLD_SCB_EZ_DATA__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA1
CYREG_SCB0_EZ_DATA1 EQU 0x40240404
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA2
CYREG_SCB0_EZ_DATA2 EQU 0x40240408
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA3
CYREG_SCB0_EZ_DATA3 EQU 0x4024040c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA4
CYREG_SCB0_EZ_DATA4 EQU 0x40240410
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA5
CYREG_SCB0_EZ_DATA5 EQU 0x40240414
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA6
CYREG_SCB0_EZ_DATA6 EQU 0x40240418
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA7
CYREG_SCB0_EZ_DATA7 EQU 0x4024041c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA8
CYREG_SCB0_EZ_DATA8 EQU 0x40240420
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA9
CYREG_SCB0_EZ_DATA9 EQU 0x40240424
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA10
CYREG_SCB0_EZ_DATA10 EQU 0x40240428
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA11
CYREG_SCB0_EZ_DATA11 EQU 0x4024042c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA12
CYREG_SCB0_EZ_DATA12 EQU 0x40240430
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA13
CYREG_SCB0_EZ_DATA13 EQU 0x40240434
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA14
CYREG_SCB0_EZ_DATA14 EQU 0x40240438
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA15
CYREG_SCB0_EZ_DATA15 EQU 0x4024043c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA16
CYREG_SCB0_EZ_DATA16 EQU 0x40240440
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA17
CYREG_SCB0_EZ_DATA17 EQU 0x40240444
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA18
CYREG_SCB0_EZ_DATA18 EQU 0x40240448
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA19
CYREG_SCB0_EZ_DATA19 EQU 0x4024044c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA20
CYREG_SCB0_EZ_DATA20 EQU 0x40240450
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA21
CYREG_SCB0_EZ_DATA21 EQU 0x40240454
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA22
CYREG_SCB0_EZ_DATA22 EQU 0x40240458
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA23
CYREG_SCB0_EZ_DATA23 EQU 0x4024045c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA24
CYREG_SCB0_EZ_DATA24 EQU 0x40240460
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA25
CYREG_SCB0_EZ_DATA25 EQU 0x40240464
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA26
CYREG_SCB0_EZ_DATA26 EQU 0x40240468
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA27
CYREG_SCB0_EZ_DATA27 EQU 0x4024046c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA28
CYREG_SCB0_EZ_DATA28 EQU 0x40240470
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA29
CYREG_SCB0_EZ_DATA29 EQU 0x40240474
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA30
CYREG_SCB0_EZ_DATA30 EQU 0x40240478
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA31
CYREG_SCB0_EZ_DATA31 EQU 0x4024047c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_CAUSE
CYREG_SCB0_INTR_CAUSE EQU 0x40240e00
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M__OFFSET
CYFLD_SCB_M__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_M__SIZE
CYFLD_SCB_M__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S__OFFSET
CYFLD_SCB_S__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_S__SIZE
CYFLD_SCB_S__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_TX__OFFSET
CYFLD_SCB_TX__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_TX__SIZE
CYFLD_SCB_TX__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_RX__OFFSET
CYFLD_SCB_RX__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_RX__SIZE
CYFLD_SCB_RX__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_EC__OFFSET
CYFLD_SCB_I2C_EC__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_EC__SIZE
CYFLD_SCB_I2C_EC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_EC__OFFSET
CYFLD_SCB_SPI_EC__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_EC__SIZE
CYFLD_SCB_SPI_EC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_I2C_EC
CYREG_SCB0_INTR_I2C_EC EQU 0x40240e80
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_WAKE_UP__OFFSET
CYFLD_SCB_WAKE_UP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_WAKE_UP__SIZE
CYFLD_SCB_WAKE_UP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_STOP__OFFSET
CYFLD_SCB_EZ_STOP__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_STOP__SIZE
CYFLD_SCB_EZ_STOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_WRITE_STOP__OFFSET
CYFLD_SCB_EZ_WRITE_STOP__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_WRITE_STOP__SIZE
CYFLD_SCB_EZ_WRITE_STOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_READ_STOP__OFFSET
CYFLD_SCB_EZ_READ_STOP__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EZ_READ_STOP__SIZE
CYFLD_SCB_EZ_READ_STOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_I2C_EC_MASK
CYREG_SCB0_INTR_I2C_EC_MASK EQU 0x40240e88
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_I2C_EC_MASKED
CYREG_SCB0_INTR_I2C_EC_MASKED EQU 0x40240e8c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_SPI_EC
CYREG_SCB0_INTR_SPI_EC EQU 0x40240ec0
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_SPI_EC_MASK
CYREG_SCB0_INTR_SPI_EC_MASK EQU 0x40240ec8
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_SPI_EC_MASKED
CYREG_SCB0_INTR_SPI_EC_MASKED EQU 0x40240ecc
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_M
CYREG_SCB0_INTR_M EQU 0x40240f00
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_ARB_LOST__OFFSET
CYFLD_SCB_I2C_ARB_LOST__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_ARB_LOST__SIZE
CYFLD_SCB_I2C_ARB_LOST__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_NACK__OFFSET
CYFLD_SCB_I2C_NACK__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_NACK__SIZE
CYFLD_SCB_I2C_NACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_ACK__OFFSET
CYFLD_SCB_I2C_ACK__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_ACK__SIZE
CYFLD_SCB_I2C_ACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_STOP__OFFSET
CYFLD_SCB_I2C_STOP__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_STOP__SIZE
CYFLD_SCB_I2C_STOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_BUS_ERROR__OFFSET
CYFLD_SCB_I2C_BUS_ERROR__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_BUS_ERROR__SIZE
CYFLD_SCB_I2C_BUS_ERROR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_DONE__OFFSET
CYFLD_SCB_SPI_DONE__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_DONE__SIZE
CYFLD_SCB_SPI_DONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_M_SET
CYREG_SCB0_INTR_M_SET EQU 0x40240f04
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_M_MASK
CYREG_SCB0_INTR_M_MASK EQU 0x40240f08
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_M_MASKED
CYREG_SCB0_INTR_M_MASKED EQU 0x40240f0c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_S
CYREG_SCB0_INTR_S EQU 0x40240f40
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_WRITE_STOP__OFFSET
CYFLD_SCB_I2C_WRITE_STOP__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_WRITE_STOP__SIZE
CYFLD_SCB_I2C_WRITE_STOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_START__OFFSET
CYFLD_SCB_I2C_START__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_START__SIZE
CYFLD_SCB_I2C_START__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_ADDR_MATCH__OFFSET
CYFLD_SCB_I2C_ADDR_MATCH__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_ADDR_MATCH__SIZE
CYFLD_SCB_I2C_ADDR_MATCH__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_GENERAL__OFFSET
CYFLD_SCB_I2C_GENERAL__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_I2C_GENERAL__SIZE
CYFLD_SCB_I2C_GENERAL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_EZ_WRITE_STOP__OFFSET
CYFLD_SCB_SPI_EZ_WRITE_STOP__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_EZ_WRITE_STOP__SIZE
CYFLD_SCB_SPI_EZ_WRITE_STOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_EZ_STOP__OFFSET
CYFLD_SCB_SPI_EZ_STOP__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_EZ_STOP__SIZE
CYFLD_SCB_SPI_EZ_STOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_BUS_ERROR__OFFSET
CYFLD_SCB_SPI_BUS_ERROR__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_SPI_BUS_ERROR__SIZE
CYFLD_SCB_SPI_BUS_ERROR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_S_SET
CYREG_SCB0_INTR_S_SET EQU 0x40240f44
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_S_MASK
CYREG_SCB0_INTR_S_MASK EQU 0x40240f48
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_S_MASKED
CYREG_SCB0_INTR_S_MASKED EQU 0x40240f4c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_TX
CYREG_SCB0_INTR_TX EQU 0x40240f80
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_TRIGGER__OFFSET
CYFLD_SCB_TRIGGER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_TRIGGER__SIZE
CYFLD_SCB_TRIGGER__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_NOT_FULL__OFFSET
CYFLD_SCB_NOT_FULL__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_NOT_FULL__SIZE
CYFLD_SCB_NOT_FULL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EMPTY__OFFSET
CYFLD_SCB_EMPTY__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_EMPTY__SIZE
CYFLD_SCB_EMPTY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_OVERFLOW__OFFSET
CYFLD_SCB_OVERFLOW__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_OVERFLOW__SIZE
CYFLD_SCB_OVERFLOW__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_UNDERFLOW__OFFSET
CYFLD_SCB_UNDERFLOW__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_UNDERFLOW__SIZE
CYFLD_SCB_UNDERFLOW__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BLOCKED__OFFSET
CYFLD_SCB_BLOCKED__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BLOCKED__SIZE
CYFLD_SCB_BLOCKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_UART_NACK__OFFSET
CYFLD_SCB_UART_NACK__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_UART_NACK__SIZE
CYFLD_SCB_UART_NACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_UART_DONE__OFFSET
CYFLD_SCB_UART_DONE__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_UART_DONE__SIZE
CYFLD_SCB_UART_DONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_UART_ARB_LOST__OFFSET
CYFLD_SCB_UART_ARB_LOST__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_UART_ARB_LOST__SIZE
CYFLD_SCB_UART_ARB_LOST__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_TX_SET
CYREG_SCB0_INTR_TX_SET EQU 0x40240f84
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_TX_MASK
CYREG_SCB0_INTR_TX_MASK EQU 0x40240f88
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_TX_MASKED
CYREG_SCB0_INTR_TX_MASKED EQU 0x40240f8c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_RX
CYREG_SCB0_INTR_RX EQU 0x40240fc0
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_NOT_EMPTY__OFFSET
CYFLD_SCB_NOT_EMPTY__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_NOT_EMPTY__SIZE
CYFLD_SCB_NOT_EMPTY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_FULL__OFFSET
CYFLD_SCB_FULL__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_FULL__SIZE
CYFLD_SCB_FULL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_FRAME_ERROR__OFFSET
CYFLD_SCB_FRAME_ERROR__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_FRAME_ERROR__SIZE
CYFLD_SCB_FRAME_ERROR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_PARITY_ERROR__OFFSET
CYFLD_SCB_PARITY_ERROR__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_PARITY_ERROR__SIZE
CYFLD_SCB_PARITY_ERROR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BAUD_DETECT__OFFSET
CYFLD_SCB_BAUD_DETECT__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BAUD_DETECT__SIZE
CYFLD_SCB_BAUD_DETECT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BREAK_DETECT__OFFSET
CYFLD_SCB_BREAK_DETECT__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_SCB_BREAK_DETECT__SIZE
CYFLD_SCB_BREAK_DETECT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_RX_SET
CYREG_SCB0_INTR_RX_SET EQU 0x40240fc4
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_RX_MASK
CYREG_SCB0_INTR_RX_MASK EQU 0x40240fc8
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_INTR_RX_MASKED
CYREG_SCB0_INTR_RX_MASKED EQU 0x40240fcc
    ENDIF
    IF :LNOT::DEF:CYDEV_SCB1_BASE
CYDEV_SCB1_BASE EQU 0x40250000
    ENDIF
    IF :LNOT::DEF:CYDEV_SCB1_SIZE
CYDEV_SCB1_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_CTRL
CYREG_SCB1_CTRL EQU 0x40250000
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_STATUS
CYREG_SCB1_STATUS EQU 0x40250004
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_SPI_CTRL
CYREG_SCB1_SPI_CTRL EQU 0x40250020
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_SPI_STATUS
CYREG_SCB1_SPI_STATUS EQU 0x40250024
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_UART_CTRL
CYREG_SCB1_UART_CTRL EQU 0x40250040
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_UART_TX_CTRL
CYREG_SCB1_UART_TX_CTRL EQU 0x40250044
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_UART_RX_CTRL
CYREG_SCB1_UART_RX_CTRL EQU 0x40250048
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_UART_RX_STATUS
CYREG_SCB1_UART_RX_STATUS EQU 0x4025004c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_UART_FLOW_CTRL
CYREG_SCB1_UART_FLOW_CTRL EQU 0x40250050
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_I2C_CTRL
CYREG_SCB1_I2C_CTRL EQU 0x40250060
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_I2C_STATUS
CYREG_SCB1_I2C_STATUS EQU 0x40250064
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_I2C_M_CMD
CYREG_SCB1_I2C_M_CMD EQU 0x40250068
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_I2C_S_CMD
CYREG_SCB1_I2C_S_CMD EQU 0x4025006c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_I2C_CFG
CYREG_SCB1_I2C_CFG EQU 0x40250070
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_TX_CTRL
CYREG_SCB1_TX_CTRL EQU 0x40250200
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_TX_FIFO_CTRL
CYREG_SCB1_TX_FIFO_CTRL EQU 0x40250204
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_TX_FIFO_STATUS
CYREG_SCB1_TX_FIFO_STATUS EQU 0x40250208
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_TX_FIFO_WR
CYREG_SCB1_TX_FIFO_WR EQU 0x40250240
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_RX_CTRL
CYREG_SCB1_RX_CTRL EQU 0x40250300
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_RX_FIFO_CTRL
CYREG_SCB1_RX_FIFO_CTRL EQU 0x40250304
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_RX_FIFO_STATUS
CYREG_SCB1_RX_FIFO_STATUS EQU 0x40250308
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_RX_MATCH
CYREG_SCB1_RX_MATCH EQU 0x40250310
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_RX_FIFO_RD
CYREG_SCB1_RX_FIFO_RD EQU 0x40250340
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_RX_FIFO_RD_SILENT
CYREG_SCB1_RX_FIFO_RD_SILENT EQU 0x40250344
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA0
CYREG_SCB1_EZ_DATA0 EQU 0x40250400
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA1
CYREG_SCB1_EZ_DATA1 EQU 0x40250404
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA2
CYREG_SCB1_EZ_DATA2 EQU 0x40250408
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA3
CYREG_SCB1_EZ_DATA3 EQU 0x4025040c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA4
CYREG_SCB1_EZ_DATA4 EQU 0x40250410
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA5
CYREG_SCB1_EZ_DATA5 EQU 0x40250414
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA6
CYREG_SCB1_EZ_DATA6 EQU 0x40250418
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA7
CYREG_SCB1_EZ_DATA7 EQU 0x4025041c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA8
CYREG_SCB1_EZ_DATA8 EQU 0x40250420
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA9
CYREG_SCB1_EZ_DATA9 EQU 0x40250424
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA10
CYREG_SCB1_EZ_DATA10 EQU 0x40250428
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA11
CYREG_SCB1_EZ_DATA11 EQU 0x4025042c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA12
CYREG_SCB1_EZ_DATA12 EQU 0x40250430
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA13
CYREG_SCB1_EZ_DATA13 EQU 0x40250434
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA14
CYREG_SCB1_EZ_DATA14 EQU 0x40250438
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA15
CYREG_SCB1_EZ_DATA15 EQU 0x4025043c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA16
CYREG_SCB1_EZ_DATA16 EQU 0x40250440
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA17
CYREG_SCB1_EZ_DATA17 EQU 0x40250444
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA18
CYREG_SCB1_EZ_DATA18 EQU 0x40250448
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA19
CYREG_SCB1_EZ_DATA19 EQU 0x4025044c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA20
CYREG_SCB1_EZ_DATA20 EQU 0x40250450
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA21
CYREG_SCB1_EZ_DATA21 EQU 0x40250454
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA22
CYREG_SCB1_EZ_DATA22 EQU 0x40250458
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA23
CYREG_SCB1_EZ_DATA23 EQU 0x4025045c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA24
CYREG_SCB1_EZ_DATA24 EQU 0x40250460
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA25
CYREG_SCB1_EZ_DATA25 EQU 0x40250464
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA26
CYREG_SCB1_EZ_DATA26 EQU 0x40250468
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA27
CYREG_SCB1_EZ_DATA27 EQU 0x4025046c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA28
CYREG_SCB1_EZ_DATA28 EQU 0x40250470
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA29
CYREG_SCB1_EZ_DATA29 EQU 0x40250474
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA30
CYREG_SCB1_EZ_DATA30 EQU 0x40250478
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA31
CYREG_SCB1_EZ_DATA31 EQU 0x4025047c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_CAUSE
CYREG_SCB1_INTR_CAUSE EQU 0x40250e00
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_I2C_EC
CYREG_SCB1_INTR_I2C_EC EQU 0x40250e80
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_I2C_EC_MASK
CYREG_SCB1_INTR_I2C_EC_MASK EQU 0x40250e88
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_I2C_EC_MASKED
CYREG_SCB1_INTR_I2C_EC_MASKED EQU 0x40250e8c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_SPI_EC
CYREG_SCB1_INTR_SPI_EC EQU 0x40250ec0
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_SPI_EC_MASK
CYREG_SCB1_INTR_SPI_EC_MASK EQU 0x40250ec8
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_SPI_EC_MASKED
CYREG_SCB1_INTR_SPI_EC_MASKED EQU 0x40250ecc
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_M
CYREG_SCB1_INTR_M EQU 0x40250f00
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_M_SET
CYREG_SCB1_INTR_M_SET EQU 0x40250f04
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_M_MASK
CYREG_SCB1_INTR_M_MASK EQU 0x40250f08
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_M_MASKED
CYREG_SCB1_INTR_M_MASKED EQU 0x40250f0c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_S
CYREG_SCB1_INTR_S EQU 0x40250f40
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_S_SET
CYREG_SCB1_INTR_S_SET EQU 0x40250f44
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_S_MASK
CYREG_SCB1_INTR_S_MASK EQU 0x40250f48
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_S_MASKED
CYREG_SCB1_INTR_S_MASKED EQU 0x40250f4c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_TX
CYREG_SCB1_INTR_TX EQU 0x40250f80
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_TX_SET
CYREG_SCB1_INTR_TX_SET EQU 0x40250f84
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_TX_MASK
CYREG_SCB1_INTR_TX_MASK EQU 0x40250f88
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_TX_MASKED
CYREG_SCB1_INTR_TX_MASKED EQU 0x40250f8c
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_RX
CYREG_SCB1_INTR_RX EQU 0x40250fc0
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_RX_SET
CYREG_SCB1_INTR_RX_SET EQU 0x40250fc4
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_RX_MASK
CYREG_SCB1_INTR_RX_MASK EQU 0x40250fc8
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_INTR_RX_MASKED
CYREG_SCB1_INTR_RX_MASKED EQU 0x40250fcc
    ENDIF
    IF :LNOT::DEF:CYDEV_CSD_BASE
CYDEV_CSD_BASE EQU 0x40280000
    ENDIF
    IF :LNOT::DEF:CYDEV_CSD_SIZE
CYDEV_CSD_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_ID
CYREG_CSD_ID EQU 0x40280000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_ID__OFFSET
CYFLD_CSD_ID__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_ID__SIZE
CYFLD_CSD_ID__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_REVISION__OFFSET
CYFLD_CSD_REVISION__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_REVISION__SIZE
CYFLD_CSD_REVISION__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_CONFIG
CYREG_CSD_CONFIG EQU 0x40280004
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DSI_SAMPLE_EN__OFFSET
CYFLD_CSD_DSI_SAMPLE_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DSI_SAMPLE_EN__SIZE
CYFLD_CSD_DSI_SAMPLE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SAMPLE_SYNC__OFFSET
CYFLD_CSD_SAMPLE_SYNC__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SAMPLE_SYNC__SIZE
CYFLD_CSD_SAMPLE_SYNC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_BYPASS_SEL__OFFSET
CYFLD_CSD_BYPASS_SEL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_BYPASS_SEL__SIZE
CYFLD_CSD_BYPASS_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_BYPASS_SEL_PRS_OR_DIV2
CYVAL_CSD_BYPASS_SEL_PRS_OR_DIV2 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_BYPASS_SEL_DIRECT_CLOCK
CYVAL_CSD_BYPASS_SEL_DIRECT_CLOCK EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_FILTER_ENABLE__OFFSET
CYFLD_CSD_FILTER_ENABLE__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_FILTER_ENABLE__SIZE
CYFLD_CSD_FILTER_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_FILTER_ENABLE_FILTER_OFF
CYVAL_CSD_FILTER_ENABLE_FILTER_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_FILTER_ENABLE_FILTER_ON
CYVAL_CSD_FILTER_ENABLE_FILTER_ON EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DUAL_CAP_EN__OFFSET
CYFLD_CSD_DUAL_CAP_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DUAL_CAP_EN__SIZE
CYFLD_CSD_DUAL_CAP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_DUAL_CAP_EN_DISABLE
CYVAL_CSD_DUAL_CAP_EN_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_DUAL_CAP_EN_ENABLE
CYVAL_CSD_DUAL_CAP_EN_ENABLE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PRS_CLEAR__OFFSET
CYFLD_CSD_PRS_CLEAR__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PRS_CLEAR__SIZE
CYFLD_CSD_PRS_CLEAR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PRS_SELECT__OFFSET
CYFLD_CSD_PRS_SELECT__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PRS_SELECT__SIZE
CYFLD_CSD_PRS_SELECT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_PRS_SELECT_DIV2
CYVAL_CSD_PRS_SELECT_DIV2 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_PRS_SELECT_PRS
CYVAL_CSD_PRS_SELECT_PRS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PRS_12_8__OFFSET
CYFLD_CSD_PRS_12_8__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PRS_12_8__SIZE
CYFLD_CSD_PRS_12_8__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_PRS_12_8_8B
CYVAL_CSD_PRS_12_8_8B EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_PRS_12_8_12B
CYVAL_CSD_PRS_12_8_12B EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DSI_SENSE_EN__OFFSET
CYFLD_CSD_DSI_SENSE_EN__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DSI_SENSE_EN__SIZE
CYFLD_CSD_DSI_SENSE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SHIELD_DELAY__OFFSET
CYFLD_CSD_SHIELD_DELAY__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SHIELD_DELAY__SIZE
CYFLD_CSD_SHIELD_DELAY__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_SHIELD_DELAY_OFF
CYVAL_CSD_SHIELD_DELAY_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_SHIELD_DELAY_50NS
CYVAL_CSD_SHIELD_DELAY_50NS EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_SHIELD_DELAY_10NS
CYVAL_CSD_SHIELD_DELAY_10NS EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SENSE_COMP_BW__OFFSET
CYFLD_CSD_SENSE_COMP_BW__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SENSE_COMP_BW__SIZE
CYFLD_CSD_SENSE_COMP_BW__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_SENSE_COMP_BW_LOW
CYVAL_CSD_SENSE_COMP_BW_LOW EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_SENSE_COMP_BW_HIGH
CYVAL_CSD_SENSE_COMP_BW_HIGH EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SENSE_EN__OFFSET
CYFLD_CSD_SENSE_EN__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SENSE_EN__SIZE
CYFLD_CSD_SENSE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_REFBUF_EN__OFFSET
CYFLD_CSD_REFBUF_EN__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_REFBUF_EN__SIZE
CYFLD_CSD_REFBUF_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_COMP_MODE__OFFSET
CYFLD_CSD_COMP_MODE__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_COMP_MODE__SIZE
CYFLD_CSD_COMP_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_COMP_MODE_CHARGE_BUF
CYVAL_CSD_COMP_MODE_CHARGE_BUF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_COMP_MODE_CHARGE_IO
CYVAL_CSD_COMP_MODE_CHARGE_IO EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_COMP_PIN__OFFSET
CYFLD_CSD_COMP_PIN__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_COMP_PIN__SIZE
CYFLD_CSD_COMP_PIN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_COMP_PIN_CHANNEL1
CYVAL_CSD_COMP_PIN_CHANNEL1 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_COMP_PIN_CHANNEL2
CYVAL_CSD_COMP_PIN_CHANNEL2 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_POLARITY__OFFSET
CYFLD_CSD_POLARITY__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_POLARITY__SIZE
CYFLD_CSD_POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_POLARITY_VSSIO
CYVAL_CSD_POLARITY_VSSIO EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_POLARITY_VDDIO
CYVAL_CSD_POLARITY_VDDIO EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_POLARITY2__OFFSET
CYFLD_CSD_POLARITY2__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_POLARITY2__SIZE
CYFLD_CSD_POLARITY2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_POLARITY2_VSSIO
CYVAL_CSD_POLARITY2_VSSIO EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_POLARITY2_VDDIO
CYVAL_CSD_POLARITY2_VDDIO EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_MUTUAL_CAP__OFFSET
CYFLD_CSD_MUTUAL_CAP__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_MUTUAL_CAP__SIZE
CYFLD_CSD_MUTUAL_CAP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_MUTUAL_CAP_SELFCAP
CYVAL_CSD_MUTUAL_CAP_SELFCAP EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_MUTUAL_CAP_MUTUALCAP
CYVAL_CSD_MUTUAL_CAP_MUTUALCAP EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SENSE_COMP_EN__OFFSET
CYFLD_CSD_SENSE_COMP_EN__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SENSE_COMP_EN__SIZE
CYFLD_CSD_SENSE_COMP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_REBUF_OUTSEL__OFFSET
CYFLD_CSD_REBUF_OUTSEL__OFFSET EQU 0x00000015
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_REBUF_OUTSEL__SIZE
CYFLD_CSD_REBUF_OUTSEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_REBUF_OUTSEL_AMUXA
CYVAL_CSD_REBUF_OUTSEL_AMUXA EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_REBUF_OUTSEL_AMUXB
CYVAL_CSD_REBUF_OUTSEL_AMUXB EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SENSE_INSEL__OFFSET
CYFLD_CSD_SENSE_INSEL__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SENSE_INSEL__SIZE
CYFLD_CSD_SENSE_INSEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_SENSE_INSEL_SENSE_CHANNEL1
CYVAL_CSD_SENSE_INSEL_SENSE_CHANNEL1 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_SENSE_INSEL_SENSE_AMUXA
CYVAL_CSD_SENSE_INSEL_SENSE_AMUXA EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_REFBUF_DRV__OFFSET
CYFLD_CSD_REFBUF_DRV__OFFSET EQU 0x00000017
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_REFBUF_DRV__SIZE
CYFLD_CSD_REFBUF_DRV__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_REFBUF_DRV_OFF
CYVAL_CSD_REFBUF_DRV_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_REFBUF_DRV_DRV_1
CYVAL_CSD_REFBUF_DRV_DRV_1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_REFBUF_DRV_DRV_2
CYVAL_CSD_REFBUF_DRV_DRV_2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_REFBUF_DRV_DRV_3
CYVAL_CSD_REFBUF_DRV_DRV_3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DDFTSEL__OFFSET
CYFLD_CSD_DDFTSEL__OFFSET EQU 0x0000001a
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DDFTSEL__SIZE
CYFLD_CSD_DDFTSEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_NORMAL
CYVAL_CSD_DDFTSEL_NORMAL EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_CSD_SENSE
CYVAL_CSD_DDFTSEL_CSD_SENSE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_CSD_SHIELD
CYVAL_CSD_DDFTSEL_CSD_SHIELD EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_CLK_SAMPLE
CYVAL_CSD_DDFTSEL_CLK_SAMPLE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_DDFTSEL_COMP_OUT
CYVAL_CSD_DDFTSEL_COMP_OUT EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_ADFTEN__OFFSET
CYFLD_CSD_ADFTEN__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_ADFTEN__SIZE
CYFLD_CSD_ADFTEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DDFTCOMP__OFFSET
CYFLD_CSD_DDFTCOMP__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_DDFTCOMP__SIZE
CYFLD_CSD_DDFTCOMP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_DDFTCOMP_REFBUFCOMP
CYVAL_CSD_DDFTCOMP_REFBUFCOMP EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_DDFTCOMP_SENSECOMP
CYVAL_CSD_DDFTCOMP_SENSECOMP EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_ENABLE__OFFSET
CYFLD_CSD_ENABLE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_ENABLE__SIZE
CYFLD_CSD_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_IDAC
CYREG_CSD_IDAC EQU 0x40280008
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1__OFFSET
CYFLD_CSD_IDAC1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1__SIZE
CYFLD_CSD_IDAC1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1_MODE__OFFSET
CYFLD_CSD_IDAC1_MODE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1_MODE__SIZE
CYFLD_CSD_IDAC1_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC1_MODE_OFF
CYVAL_CSD_IDAC1_MODE_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC1_MODE_FIXED
CYVAL_CSD_IDAC1_MODE_FIXED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC1_MODE_VARIABLE
CYVAL_CSD_IDAC1_MODE_VARIABLE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC1_MODE_DSI
CYVAL_CSD_IDAC1_MODE_DSI EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1_RANGE__OFFSET
CYFLD_CSD_IDAC1_RANGE__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1_RANGE__SIZE
CYFLD_CSD_IDAC1_RANGE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC1_RANGE_4X
CYVAL_CSD_IDAC1_RANGE_4X EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC1_RANGE_8X
CYVAL_CSD_IDAC1_RANGE_8X EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_POLARITY1_MIR__OFFSET
CYFLD_CSD_POLARITY1_MIR__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_POLARITY1_MIR__SIZE
CYFLD_CSD_POLARITY1_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2__OFFSET
CYFLD_CSD_IDAC2__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2__SIZE
CYFLD_CSD_IDAC2__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2_MODE__OFFSET
CYFLD_CSD_IDAC2_MODE__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2_MODE__SIZE
CYFLD_CSD_IDAC2_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC2_MODE_OFF
CYVAL_CSD_IDAC2_MODE_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC2_MODE_FIXED
CYVAL_CSD_IDAC2_MODE_FIXED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC2_MODE_VARIABLE
CYVAL_CSD_IDAC2_MODE_VARIABLE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC2_MODE_DSI
CYVAL_CSD_IDAC2_MODE_DSI EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2_RANGE__OFFSET
CYFLD_CSD_IDAC2_RANGE__OFFSET EQU 0x0000001a
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2_RANGE__SIZE
CYFLD_CSD_IDAC2_RANGE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC2_RANGE_4X
CYVAL_CSD_IDAC2_RANGE_4X EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_IDAC2_RANGE_8X
CYVAL_CSD_IDAC2_RANGE_8X EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_POLARITY2_MIR__OFFSET
CYFLD_CSD_POLARITY2_MIR__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_POLARITY2_MIR__SIZE
CYFLD_CSD_POLARITY2_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_FEEDBACK_MODE__OFFSET
CYFLD_CSD_FEEDBACK_MODE__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_FEEDBACK_MODE__SIZE
CYFLD_CSD_FEEDBACK_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_FEEDBACK_MODE_FLOP
CYVAL_CSD_FEEDBACK_MODE_FLOP EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_FEEDBACK_MODE_COMP
CYVAL_CSD_FEEDBACK_MODE_COMP EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_COUNTER
CYREG_CSD_COUNTER EQU 0x4028000c
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_COUNTER__OFFSET
CYFLD_CSD_COUNTER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_COUNTER__SIZE
CYFLD_CSD_COUNTER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PERIOD__OFFSET
CYFLD_CSD_PERIOD__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PERIOD__SIZE
CYFLD_CSD_PERIOD__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_STATUS
CYREG_CSD_STATUS EQU 0x40280010
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_CSD_CHARGE__OFFSET
CYFLD_CSD_CSD_CHARGE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_CSD_CHARGE__SIZE
CYFLD_CSD_CSD_CHARGE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_CSD_SENSE__OFFSET
CYFLD_CSD_CSD_SENSE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_CSD_SENSE__SIZE
CYFLD_CSD_CSD_SENSE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_COMP_OUT__OFFSET
CYFLD_CSD_COMP_OUT__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_COMP_OUT__SIZE
CYFLD_CSD_COMP_OUT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_COMP_OUT_C_LT_VREF
CYVAL_CSD_COMP_OUT_C_LT_VREF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_COMP_OUT_C_GT_VREF
CYVAL_CSD_COMP_OUT_C_GT_VREF EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SAMPLE__OFFSET
CYFLD_CSD_SAMPLE__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_SAMPLE__SIZE
CYFLD_CSD_SAMPLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_INTR
CYREG_CSD_INTR EQU 0x40280014
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_CSD__OFFSET
CYFLD_CSD_CSD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_CSD__SIZE
CYFLD_CSD_CSD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_INTR_SET
CYREG_CSD_INTR_SET EQU 0x40280018
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_PWM
CYREG_CSD_PWM EQU 0x4028001c
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PWM_COUNT__OFFSET
CYFLD_CSD_PWM_COUNT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PWM_COUNT__SIZE
CYFLD_CSD_PWM_COUNT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PWM_SEL__OFFSET
CYFLD_CSD_PWM_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_PWM_SEL__SIZE
CYFLD_CSD_PWM_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_PWM_SEL_OFF
CYVAL_CSD_PWM_SEL_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_PWM_SEL_FIXED_HIGH
CYVAL_CSD_PWM_SEL_FIXED_HIGH EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CSD_PWM_SEL_FIXED_LOW
CYVAL_CSD_PWM_SEL_FIXED_LOW EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_TRIM1
CYREG_CSD_TRIM1 EQU 0x4028ff00
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1_SRC_TRIM__OFFSET
CYFLD_CSD_IDAC1_SRC_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1_SRC_TRIM__SIZE
CYFLD_CSD_IDAC1_SRC_TRIM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2_SRC_TRIM__OFFSET
CYFLD_CSD_IDAC2_SRC_TRIM__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2_SRC_TRIM__SIZE
CYFLD_CSD_IDAC2_SRC_TRIM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_CSD_TRIM2
CYREG_CSD_TRIM2 EQU 0x4028ff04
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1_SNK_TRIM__OFFSET
CYFLD_CSD_IDAC1_SNK_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC1_SNK_TRIM__SIZE
CYFLD_CSD_IDAC1_SNK_TRIM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2_SNK_TRIM__OFFSET
CYFLD_CSD_IDAC2_SNK_TRIM__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CSD_IDAC2_SNK_TRIM__SIZE
CYFLD_CSD_IDAC2_SNK_TRIM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYDEV_LCD_BASE
CYDEV_LCD_BASE EQU 0x402a0000
    ENDIF
    IF :LNOT::DEF:CYDEV_LCD_SIZE
CYDEV_LCD_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_LCD_ID
CYREG_LCD_ID EQU 0x402a0000
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_ID__OFFSET
CYFLD_LCD_ID__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_ID__SIZE
CYFLD_LCD_ID__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_REVISION__OFFSET
CYFLD_LCD_REVISION__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_REVISION__SIZE
CYFLD_LCD_REVISION__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_LCD_DIVIDER
CYREG_LCD_DIVIDER EQU 0x402a0004
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_SUBFR_DIV__OFFSET
CYFLD_LCD_SUBFR_DIV__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_SUBFR_DIV__SIZE
CYFLD_LCD_SUBFR_DIV__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_DEAD_DIV__OFFSET
CYFLD_LCD_DEAD_DIV__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_DEAD_DIV__SIZE
CYFLD_LCD_DEAD_DIV__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_LCD_CONTROL
CYREG_LCD_CONTROL EQU 0x402a0008
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_LS_EN__OFFSET
CYFLD_LCD_LS_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_LS_EN__SIZE
CYFLD_LCD_LS_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_HS_EN__OFFSET
CYFLD_LCD_HS_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_HS_EN__SIZE
CYFLD_LCD_HS_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_LCD_MODE__OFFSET
CYFLD_LCD_LCD_MODE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_LCD_MODE__SIZE
CYFLD_LCD_LCD_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_LCD_MODE_LS
CYVAL_LCD_LCD_MODE_LS EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_LCD_MODE_HS
CYVAL_LCD_LCD_MODE_HS EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_TYPE__OFFSET
CYFLD_LCD_TYPE__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_TYPE__SIZE
CYFLD_LCD_TYPE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_TYPE_TYPE_A
CYVAL_LCD_TYPE_TYPE_A EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_TYPE_TYPE_B
CYVAL_LCD_TYPE_TYPE_B EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_OP_MODE__OFFSET
CYFLD_LCD_OP_MODE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_OP_MODE__SIZE
CYFLD_LCD_OP_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_OP_MODE_PWM
CYVAL_LCD_OP_MODE_PWM EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_OP_MODE_CORRELATION
CYVAL_LCD_OP_MODE_CORRELATION EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_BIAS__OFFSET
CYFLD_LCD_BIAS__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_BIAS__SIZE
CYFLD_LCD_BIAS__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_BIAS_HALF
CYVAL_LCD_BIAS_HALF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_BIAS_THIRD
CYVAL_LCD_BIAS_THIRD EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_BIAS_FOURTH
CYVAL_LCD_BIAS_FOURTH EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_LCD_BIAS_FIFTH
CYVAL_LCD_BIAS_FIFTH EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_COM_NUM__OFFSET
CYFLD_LCD_COM_NUM__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_COM_NUM__SIZE
CYFLD_LCD_COM_NUM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_LS_EN_STAT__OFFSET
CYFLD_LCD_LS_EN_STAT__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_LS_EN_STAT__SIZE
CYFLD_LCD_LS_EN_STAT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_LCD_DATA00
CYREG_LCD_DATA00 EQU 0x402a0100
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_DATA__OFFSET
CYFLD_LCD_DATA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LCD_DATA__SIZE
CYFLD_LCD_DATA__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_LCD_DATA01
CYREG_LCD_DATA01 EQU 0x402a0104
    ENDIF
    IF :LNOT::DEF:CYREG_LCD_DATA02
CYREG_LCD_DATA02 EQU 0x402a0108
    ENDIF
    IF :LNOT::DEF:CYREG_LCD_DATA03
CYREG_LCD_DATA03 EQU 0x402a010c
    ENDIF
    IF :LNOT::DEF:CYREG_LCD_DATA04
CYREG_LCD_DATA04 EQU 0x402a0110
    ENDIF
    IF :LNOT::DEF:CYDEV_LPCOMP_BASE
CYDEV_LPCOMP_BASE EQU 0x402b0000
    ENDIF
    IF :LNOT::DEF:CYDEV_LPCOMP_SIZE
CYDEV_LPCOMP_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_ID
CYREG_LPCOMP_ID EQU 0x402b0000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_ID__OFFSET
CYFLD_LPCOMP_ID__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_ID__SIZE
CYFLD_LPCOMP_ID__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_REVISION__OFFSET
CYFLD_LPCOMP_REVISION__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_REVISION__SIZE
CYFLD_LPCOMP_REVISION__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_CONFIG
CYREG_LPCOMP_CONFIG EQU 0x402b0004
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_MODE1__OFFSET
CYFLD_LPCOMP_MODE1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_MODE1__SIZE
CYFLD_LPCOMP_MODE1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_MODE1_SLOW
CYVAL_LPCOMP_MODE1_SLOW EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_MODE1_FAST
CYVAL_LPCOMP_MODE1_FAST EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_MODE1_ULP
CYVAL_LPCOMP_MODE1_ULP EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_HYST1__OFFSET
CYFLD_LPCOMP_HYST1__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_HYST1__SIZE
CYFLD_LPCOMP_HYST1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_FILTER1__OFFSET
CYFLD_LPCOMP_FILTER1__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_FILTER1__SIZE
CYFLD_LPCOMP_FILTER1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_INTTYPE1__OFFSET
CYFLD_LPCOMP_INTTYPE1__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_INTTYPE1__SIZE
CYFLD_LPCOMP_INTTYPE1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE1_DISABLE
CYVAL_LPCOMP_INTTYPE1_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE1_RISING
CYVAL_LPCOMP_INTTYPE1_RISING EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE1_FALLING
CYVAL_LPCOMP_INTTYPE1_FALLING EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE1_BOTH
CYVAL_LPCOMP_INTTYPE1_BOTH EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_OUT1__OFFSET
CYFLD_LPCOMP_OUT1__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_OUT1__SIZE
CYFLD_LPCOMP_OUT1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_ENABLE1__OFFSET
CYFLD_LPCOMP_ENABLE1__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_ENABLE1__SIZE
CYFLD_LPCOMP_ENABLE1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_MODE2__OFFSET
CYFLD_LPCOMP_MODE2__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_MODE2__SIZE
CYFLD_LPCOMP_MODE2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_MODE2_SLOW
CYVAL_LPCOMP_MODE2_SLOW EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_MODE2_FAST
CYVAL_LPCOMP_MODE2_FAST EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_MODE2_ULP
CYVAL_LPCOMP_MODE2_ULP EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_HYST2__OFFSET
CYFLD_LPCOMP_HYST2__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_HYST2__SIZE
CYFLD_LPCOMP_HYST2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_FILTER2__OFFSET
CYFLD_LPCOMP_FILTER2__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_FILTER2__SIZE
CYFLD_LPCOMP_FILTER2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_INTTYPE2__OFFSET
CYFLD_LPCOMP_INTTYPE2__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_INTTYPE2__SIZE
CYFLD_LPCOMP_INTTYPE2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE2_DISABLE
CYVAL_LPCOMP_INTTYPE2_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE2_RISING
CYVAL_LPCOMP_INTTYPE2_RISING EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE2_FALLING
CYVAL_LPCOMP_INTTYPE2_FALLING EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_LPCOMP_INTTYPE2_BOTH
CYVAL_LPCOMP_INTTYPE2_BOTH EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_OUT2__OFFSET
CYFLD_LPCOMP_OUT2__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_OUT2__SIZE
CYFLD_LPCOMP_OUT2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_ENABLE2__OFFSET
CYFLD_LPCOMP_ENABLE2__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_ENABLE2__SIZE
CYFLD_LPCOMP_ENABLE2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_DSI_BYPASS1__OFFSET
CYFLD_LPCOMP_DSI_BYPASS1__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_DSI_BYPASS1__SIZE
CYFLD_LPCOMP_DSI_BYPASS1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_DSI_LEVEL1__OFFSET
CYFLD_LPCOMP_DSI_LEVEL1__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_DSI_LEVEL1__SIZE
CYFLD_LPCOMP_DSI_LEVEL1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_DSI_BYPASS2__OFFSET
CYFLD_LPCOMP_DSI_BYPASS2__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_DSI_BYPASS2__SIZE
CYFLD_LPCOMP_DSI_BYPASS2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_DSI_LEVEL2__OFFSET
CYFLD_LPCOMP_DSI_LEVEL2__OFFSET EQU 0x00000015
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_DSI_LEVEL2__SIZE
CYFLD_LPCOMP_DSI_LEVEL2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_DFT
CYREG_LPCOMP_DFT EQU 0x402b0008
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_CAL_EN__OFFSET
CYFLD_LPCOMP_CAL_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_CAL_EN__SIZE
CYFLD_LPCOMP_CAL_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_BYPASS__OFFSET
CYFLD_LPCOMP_BYPASS__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_BYPASS__SIZE
CYFLD_LPCOMP_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_INTR
CYREG_LPCOMP_INTR EQU 0x402b0010
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1__OFFSET
CYFLD_LPCOMP_COMP1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1__SIZE
CYFLD_LPCOMP_COMP1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2__OFFSET
CYFLD_LPCOMP_COMP2__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2__SIZE
CYFLD_LPCOMP_COMP2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_INTR_SET
CYREG_LPCOMP_INTR_SET EQU 0x402b0014
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_INTR_MASK
CYREG_LPCOMP_INTR_MASK EQU 0x402b0018
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_MASK__OFFSET
CYFLD_LPCOMP_COMP1_MASK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_MASK__SIZE
CYFLD_LPCOMP_COMP1_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_MASK__OFFSET
CYFLD_LPCOMP_COMP2_MASK__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_MASK__SIZE
CYFLD_LPCOMP_COMP2_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_INTR_MASKED
CYREG_LPCOMP_INTR_MASKED EQU 0x402b001c
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_MASKED__OFFSET
CYFLD_LPCOMP_COMP1_MASKED__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_MASKED__SIZE
CYFLD_LPCOMP_COMP1_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_MASKED__OFFSET
CYFLD_LPCOMP_COMP2_MASKED__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_MASKED__SIZE
CYFLD_LPCOMP_COMP2_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_TRIM1
CYREG_LPCOMP_TRIM1 EQU 0x402bff00
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_TRIMA__OFFSET
CYFLD_LPCOMP_COMP1_TRIMA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_TRIMA__SIZE
CYFLD_LPCOMP_COMP1_TRIMA__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_TRIM2
CYREG_LPCOMP_TRIM2 EQU 0x402bff04
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_TRIMB__OFFSET
CYFLD_LPCOMP_COMP1_TRIMB__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP1_TRIMB__SIZE
CYFLD_LPCOMP_COMP1_TRIMB__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_TRIM3
CYREG_LPCOMP_TRIM3 EQU 0x402bff08
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_TRIMA__OFFSET
CYFLD_LPCOMP_COMP2_TRIMA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_TRIMA__SIZE
CYFLD_LPCOMP_COMP2_TRIMA__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_LPCOMP_TRIM4
CYREG_LPCOMP_TRIM4 EQU 0x402bff0c
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_TRIMB__OFFSET
CYFLD_LPCOMP_COMP2_TRIMB__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_LPCOMP_COMP2_TRIMB__SIZE
CYFLD_LPCOMP_COMP2_TRIMB__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYDEV_BLE_BASE
CYDEV_BLE_BASE EQU 0x402e0000
    ENDIF
    IF :LNOT::DEF:CYDEV_BLE_SIZE
CYDEV_BLE_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYDEV_BLE_BLERD_BASE
CYDEV_BLE_BLERD_BASE EQU 0x402e0000
    ENDIF
    IF :LNOT::DEF:CYDEV_BLE_BLERD_SIZE
CYDEV_BLE_BLERD_SIZE EQU 0x00000200
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CFG1
CYREG_BLE_BLERD_CFG1 EQU 0x402e0000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_DATA_INVERSE__OFFSET
CYFLD_BLE_BLERD_RX_DATA_INVERSE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_DATA_INVERSE__SIZE
CYFLD_BLE_BLERD_RX_DATA_INVERSE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_DATA_INVERSE__OFFSET
CYFLD_BLE_BLERD_TX_DATA_INVERSE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_DATA_INVERSE__SIZE
CYFLD_BLE_BLERD_TX_DATA_INVERSE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC_DISABLE__OFFSET
CYFLD_BLE_BLERD_AGC_DISABLE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC_DISABLE__SIZE
CYFLD_BLE_BLERD_AGC_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RF_PLL_DIRECT__OFFSET
CYFLD_BLE_BLERD_RF_PLL_DIRECT__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RF_PLL_DIRECT__SIZE
CYFLD_BLE_BLERD_RF_PLL_DIRECT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CLKGATING_DISABLE__OFFSET
CYFLD_BLE_BLERD_CLKGATING_DISABLE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CLKGATING_DISABLE__SIZE
CYFLD_BLE_BLERD_CLKGATING_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_BR_CLK__OFFSET
CYFLD_BLE_BLERD_EN_BR_CLK__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_BR_CLK__SIZE
CYFLD_BLE_BLERD_EN_BR_CLK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_IQ_INVERSE__OFFSET
CYFLD_BLE_BLERD_ADC_IQ_INVERSE__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_IQ_INVERSE__SIZE
CYFLD_BLE_BLERD_ADC_IQ_INVERSE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_PA_RAMP_MODE__OFFSET
CYFLD_BLE_BLERD_TX_PA_RAMP_MODE__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_PA_RAMP_MODE__SIZE
CYFLD_BLE_BLERD_TX_PA_RAMP_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RADIO_STANDALONE__OFFSET
CYFLD_BLE_BLERD_RADIO_STANDALONE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RADIO_STANDALONE__SIZE
CYFLD_BLE_BLERD_RADIO_STANDALONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_DC_CAPTURE_EN__OFFSET
CYFLD_BLE_BLERD_ADC_DC_CAPTURE_EN__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_DC_CAPTURE_EN__SIZE
CYFLD_BLE_BLERD_ADC_DC_CAPTURE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BURNIN_CLK_EN__OFFSET
CYFLD_BLE_BLERD_BURNIN_CLK_EN__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BURNIN_CLK_EN__SIZE
CYFLD_BLE_BLERD_BURNIN_CLK_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF_GAIN__OFFSET
CYFLD_BLE_BLERD_CBPF_GAIN__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF_GAIN__SIZE
CYFLD_BLE_BLERD_CBPF_GAIN__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LNA_GAIN__OFFSET
CYFLD_BLE_BLERD_LNA_GAIN__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LNA_GAIN__SIZE
CYFLD_BLE_BLERD_LNA_GAIN__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CFG2
CYREG_BLE_BLERD_CFG2 EQU 0x402e0004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_REG_DATA__OFFSET
CYFLD_BLE_BLERD_DAC_REG_DATA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_REG_DATA__SIZE
CYFLD_BLE_BLERD_DAC_REG_DATA__SIZE EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_DFT_MODE__OFFSET
CYFLD_BLE_BLERD_DAC_DFT_MODE__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_DFT_MODE__SIZE
CYFLD_BLE_BLERD_DAC_DFT_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_DFT_EN__OFFSET
CYFLD_BLE_BLERD_DAC_DFT_EN__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_DFT_EN__SIZE
CYFLD_BLE_BLERD_DAC_DFT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_DFT_MODE__OFFSET
CYFLD_BLE_BLERD_ADC_DFT_MODE__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_DFT_MODE__SIZE
CYFLD_BLE_BLERD_ADC_DFT_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_DFT_EN__OFFSET
CYFLD_BLE_BLERD_ADC_DFT_EN__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_DFT_EN__SIZE
CYFLD_BLE_BLERD_ADC_DFT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_MODEM
CYREG_BLE_BLERD_MODEM EQU 0x402e0008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_NARROW_SPD__OFFSET
CYFLD_BLE_BLERD_NARROW_SPD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_NARROW_SPD__SIZE
CYFLD_BLE_BLERD_NARROW_SPD__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_WIDE_SPD__OFFSET
CYFLD_BLE_BLERD_WIDE_SPD__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_WIDE_SPD__SIZE
CYFLD_BLE_BLERD_WIDE_SPD__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RST_CNT2_SEL__OFFSET
CYFLD_BLE_BLERD_RST_CNT2_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RST_CNT2_SEL__SIZE
CYFLD_BLE_BLERD_RST_CNT2_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RESET2_EN__OFFSET
CYFLD_BLE_BLERD_RESET2_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RESET2_EN__SIZE
CYFLD_BLE_BLERD_RESET2_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DC_PARAM__OFFSET
CYFLD_BLE_BLERD_DC_PARAM__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DC_PARAM__SIZE
CYFLD_BLE_BLERD_DC_PARAM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IMREJ_BYPASS__OFFSET
CYFLD_BLE_BLERD_IMREJ_BYPASS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IMREJ_BYPASS__SIZE
CYFLD_BLE_BLERD_IMREJ_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_FULL_SWING_DETECT_EN__OFFSET
CYFLD_BLE_BLERD_ADC_FULL_SWING_DETECT_EN__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_FULL_SWING_DETECT_EN__SIZE
CYFLD_BLE_BLERD_ADC_FULL_SWING_DETECT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DC_SCALING_EN__OFFSET
CYFLD_BLE_BLERD_DC_SCALING_EN__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DC_SCALING_EN__SIZE
CYFLD_BLE_BLERD_DC_SCALING_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_PWR_EST_EN__OFFSET
CYFLD_BLE_BLERD_ADC_PWR_EST_EN__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_PWR_EST_EN__SIZE
CYFLD_BLE_BLERD_ADC_PWR_EST_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOAD_PREV_GAIN_EN__OFFSET
CYFLD_BLE_BLERD_LOAD_PREV_GAIN_EN__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOAD_PREV_GAIN_EN__SIZE
CYFLD_BLE_BLERD_LOAD_PREV_GAIN_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_READ_DC_OFFSET_SEL__OFFSET
CYFLD_BLE_BLERD_READ_DC_OFFSET_SEL__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_READ_DC_OFFSET_SEL__SIZE
CYFLD_BLE_BLERD_READ_DC_OFFSET_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADCDFT_SEL__OFFSET
CYFLD_BLE_BLERD_ADCDFT_SEL__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADCDFT_SEL__SIZE
CYFLD_BLE_BLERD_ADCDFT_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CW_MODE__OFFSET
CYFLD_BLE_BLERD_CW_MODE__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CW_MODE__SIZE
CYFLD_BLE_BLERD_CW_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_FSM
CYREG_BLE_BLERD_FSM EQU 0x402e000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_XO_AMP_DETECT__OFFSET
CYFLD_BLE_BLERD_XO_AMP_DETECT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_XO_AMP_DETECT__SIZE
CYFLD_BLE_BLERD_XO_AMP_DETECT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LSLDO_OK__OFFSET
CYFLD_BLE_BLERD_LSLDO_OK__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LSLDO_OK__SIZE
CYFLD_BLE_BLERD_LSLDO_OK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LFLDO_OK__OFFSET
CYFLD_BLE_BLERD_LFLDO_OK__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LFLDO_OK__SIZE
CYFLD_BLE_BLERD_LFLDO_OK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_PASS_DETECT__OFFSET
CYFLD_BLE_BLERD_FCAL_PASS_DETECT__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_PASS_DETECT__SIZE
CYFLD_BLE_BLERD_FCAL_PASS_DETECT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ISO_ENABLE__OFFSET
CYFLD_BLE_BLERD_ISO_ENABLE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ISO_ENABLE__SIZE
CYFLD_BLE_BLERD_ISO_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_STATE__OFFSET
CYFLD_BLE_BLERD_RX_STATE__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_STATE__SIZE
CYFLD_BLE_BLERD_RX_STATE__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_STATE__OFFSET
CYFLD_BLE_BLERD_TX_STATE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_STATE__SIZE
CYFLD_BLE_BLERD_TX_STATE__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_STATE__OFFSET
CYFLD_BLE_BLERD_SY_STATE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_STATE__SIZE
CYFLD_BLE_BLERD_SY_STATE__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_STATE__OFFSET
CYFLD_BLE_BLERD_STATE__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_STATE__SIZE
CYFLD_BLE_BLERD_STATE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DBUS
CYREG_BLE_BLERD_DBUS EQU 0x402e0010
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RF_FREQ__OFFSET
CYFLD_BLE_BLERD_RF_FREQ__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RF_FREQ__SIZE
CYFLD_BLE_BLERD_RF_FREQ__SIZE EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIRECT_RXEN__OFFSET
CYFLD_BLE_BLERD_DIRECT_RXEN__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIRECT_RXEN__SIZE
CYFLD_BLE_BLERD_DIRECT_RXEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIRECT_TXEN__OFFSET
CYFLD_BLE_BLERD_DIRECT_TXEN__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIRECT_TXEN__SIZE
CYFLD_BLE_BLERD_DIRECT_TXEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ISOLATE_N__OFFSET
CYFLD_BLE_BLERD_ISOLATE_N__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ISOLATE_N__SIZE
CYFLD_BLE_BLERD_ISOLATE_N__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_XTAL_ENABLE__OFFSET
CYFLD_BLE_BLERD_XTAL_ENABLE__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_XTAL_ENABLE__SIZE
CYFLD_BLE_BLERD_XTAL_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CFGCTRL
CYREG_BLE_BLERD_CFGCTRL EQU 0x402e0014
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DSM_MODE__OFFSET
CYFLD_BLE_BLERD_DSM_MODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DSM_MODE__SIZE
CYFLD_BLE_BLERD_DSM_MODE__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IGNORE_FRAC__OFFSET
CYFLD_BLE_BLERD_IGNORE_FRAC__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IGNORE_FRAC__SIZE
CYFLD_BLE_BLERD_IGNORE_FRAC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DCCAL_RERUN__OFFSET
CYFLD_BLE_BLERD_DCCAL_RERUN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DCCAL_RERUN__SIZE
CYFLD_BLE_BLERD_DCCAL_RERUN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DCCAL_MODE__OFFSET
CYFLD_BLE_BLERD_DCCAL_MODE__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DCCAL_MODE__SIZE
CYFLD_BLE_BLERD_DCCAL_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RCCAL_RERUN__OFFSET
CYFLD_BLE_BLERD_RCCAL_RERUN__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RCCAL_RERUN__SIZE
CYFLD_BLE_BLERD_RCCAL_RERUN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RCCAL_MODE__OFFSET
CYFLD_BLE_BLERD_RCCAL_MODE__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RCCAL_MODE__SIZE
CYFLD_BLE_BLERD_RCCAL_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_KVCAL_RERUN__OFFSET
CYFLD_BLE_BLERD_KVCAL_RERUN__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_KVCAL_RERUN__SIZE
CYFLD_BLE_BLERD_KVCAL_RERUN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_RERUN__OFFSET
CYFLD_BLE_BLERD_FCAL_RERUN__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_RERUN__SIZE
CYFLD_BLE_BLERD_FCAL_RERUN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TESTMODE_EN__OFFSET
CYFLD_BLE_BLERD_TESTMODE_EN__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TESTMODE_EN__SIZE
CYFLD_BLE_BLERD_TESTMODE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_RSSI
CYREG_BLE_BLERD_RSSI EQU 0x402e0018
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PREFILT__OFFSET
CYFLD_BLE_BLERD_PREFILT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PREFILT__SIZE
CYFLD_BLE_BLERD_PREFILT__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_POSTFILT__OFFSET
CYFLD_BLE_BLERD_POSTFILT__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_POSTFILT__SIZE
CYFLD_BLE_BLERD_POSTFILT__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_RMAP
CYREG_BLE_BLERD_RMAP EQU 0x402e0024
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_BYPASS__OFFSET
CYFLD_BLE_BLERD_BB_BYPASS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_BYPASS__SIZE
CYFLD_BLE_BLERD_BB_BYPASS__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_KVCAL
CYREG_BLE_BLERD_KVCAL EQU 0x402e0028
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_STEP__OFFSET
CYFLD_BLE_BLERD_DAC_STEP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_STEP__SIZE
CYFLD_BLE_BLERD_DAC_STEP__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RUN_DURATION__OFFSET
CYFLD_BLE_BLERD_RUN_DURATION__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RUN_DURATION__SIZE
CYFLD_BLE_BLERD_RUN_DURATION__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EXP_FREQ_DIFF__OFFSET
CYFLD_BLE_BLERD_EXP_FREQ_DIFF__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EXP_FREQ_DIFF__SIZE
CYFLD_BLE_BLERD_EXP_FREQ_DIFF__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CFG_1_FCAL
CYREG_BLE_BLERD_CFG_1_FCAL EQU 0x402e002c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_6__OFFSET
CYFLD_BLE_BLERD_COARSE_FRAMES_6__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_6__SIZE
CYFLD_BLE_BLERD_COARSE_FRAMES_6__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_7__OFFSET
CYFLD_BLE_BLERD_COARSE_FRAMES_7__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_7__SIZE
CYFLD_BLE_BLERD_COARSE_FRAMES_7__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CFG_2_FCAL
CYREG_BLE_BLERD_CFG_2_FCAL EQU 0x402e0030
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_4__OFFSET
CYFLD_BLE_BLERD_COARSE_FRAMES_4__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_4__SIZE
CYFLD_BLE_BLERD_COARSE_FRAMES_4__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_5__OFFSET
CYFLD_BLE_BLERD_COARSE_FRAMES_5__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_5__SIZE
CYFLD_BLE_BLERD_COARSE_FRAMES_5__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CFG_3_FCAL
CYREG_BLE_BLERD_CFG_3_FCAL EQU 0x402e0034
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_2__OFFSET
CYFLD_BLE_BLERD_COARSE_FRAMES_2__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_2__SIZE
CYFLD_BLE_BLERD_COARSE_FRAMES_2__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_3__OFFSET
CYFLD_BLE_BLERD_COARSE_FRAMES_3__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_3__SIZE
CYFLD_BLE_BLERD_COARSE_FRAMES_3__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CFG_4_FCAL
CYREG_BLE_BLERD_CFG_4_FCAL EQU 0x402e0038
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_0__OFFSET
CYFLD_BLE_BLERD_COARSE_FRAMES_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_0__SIZE
CYFLD_BLE_BLERD_COARSE_FRAMES_0__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_1__OFFSET
CYFLD_BLE_BLERD_COARSE_FRAMES_1__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE_FRAMES_1__SIZE
CYFLD_BLE_BLERD_COARSE_FRAMES_1__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CFG_5_FCAL
CYREG_BLE_BLERD_CFG_5_FCAL EQU 0x402e003c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FINE_FRAMES__OFFSET
CYFLD_BLE_BLERD_FINE_FRAMES__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FINE_FRAMES__SIZE
CYFLD_BLE_BLERD_FINE_FRAMES__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CNT_SEL__OFFSET
CYFLD_BLE_BLERD_CNT_SEL__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CNT_SEL__SIZE
CYFLD_BLE_BLERD_CNT_SEL__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CFG_6_FCAL
CYREG_BLE_BLERD_CFG_6_FCAL EQU 0x402e0040
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FRAMES_VCO_OL__OFFSET
CYFLD_BLE_BLERD_FRAMES_VCO_OL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FRAMES_VCO_OL__SIZE
CYFLD_BLE_BLERD_FRAMES_VCO_OL__SIZE EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VCO_OL_ENBL__OFFSET
CYFLD_BLE_BLERD_VCO_OL_ENBL__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VCO_OL_ENBL__SIZE
CYFLD_BLE_BLERD_VCO_OL_ENBL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DRIFT_CHECK_EN__OFFSET
CYFLD_BLE_BLERD_DRIFT_CHECK_EN__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DRIFT_CHECK_EN__SIZE
CYFLD_BLE_BLERD_DRIFT_CHECK_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DRIFT_CHECK__OFFSET
CYFLD_BLE_BLERD_DRIFT_CHECK__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DRIFT_CHECK__SIZE
CYFLD_BLE_BLERD_DRIFT_CHECK__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_FCAL_TEST
CYREG_BLE_BLERD_FCAL_TEST EQU 0x402e0044
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FINE__OFFSET
CYFLD_BLE_BLERD_FINE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FINE__SIZE
CYFLD_BLE_BLERD_FINE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE__OFFSET
CYFLD_BLE_BLERD_COARSE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COARSE__SIZE
CYFLD_BLE_BLERD_COARSE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_MODE__OFFSET
CYFLD_BLE_BLERD_MODE__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_MODE__SIZE
CYFLD_BLE_BLERD_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CNT_POLARITY__OFFSET
CYFLD_BLE_BLERD_CNT_POLARITY__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CNT_POLARITY__SIZE
CYFLD_BLE_BLERD_CNT_POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOOP_POLARITY__OFFSET
CYFLD_BLE_BLERD_LOOP_POLARITY__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOOP_POLARITY__SIZE
CYFLD_BLE_BLERD_LOOP_POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_TEST
CYREG_BLE_BLERD_TEST EQU 0x402e0048
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_KVCAL_GAIN__OFFSET
CYFLD_BLE_BLERD_KVCAL_GAIN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_KVCAL_GAIN__SIZE
CYFLD_BLE_BLERD_KVCAL_GAIN__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_KVCAL_MODE__OFFSET
CYFLD_BLE_BLERD_KVCAL_MODE__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_KVCAL_MODE__SIZE
CYFLD_BLE_BLERD_KVCAL_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FRCCAL_CODE__OFFSET
CYFLD_BLE_BLERD_FRCCAL_CODE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FRCCAL_CODE__SIZE
CYFLD_BLE_BLERD_FRCCAL_CODE__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FRCCAL_MODE__OFFSET
CYFLD_BLE_BLERD_FRCCAL_MODE__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FRCCAL_MODE__SIZE
CYFLD_BLE_BLERD_FRCCAL_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FRCCAL_POLARITY__OFFSET
CYFLD_BLE_BLERD_FRCCAL_POLARITY__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FRCCAL_POLARITY__SIZE
CYFLD_BLE_BLERD_FRCCAL_POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_FPD_TEST
CYREG_BLE_BLERD_FPD_TEST EQU 0x402e004c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_FPUP_XO_BUF_ALL__OFFSET
CYFLD_BLE_BLERD_BB_FPUP_XO_BUF_ALL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_FPUP_XO_BUF_ALL__SIZE
CYFLD_BLE_BLERD_BB_FPUP_XO_BUF_ALL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_XO_BUF_ADC__OFFSET
CYFLD_BLE_BLERD_BB_XO_BUF_ADC__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_XO_BUF_ADC__SIZE
CYFLD_BLE_BLERD_BB_XO_BUF_ADC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_XO_BUF_SY__OFFSET
CYFLD_BLE_BLERD_BB_XO_BUF_SY__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_XO_BUF_SY__SIZE
CYFLD_BLE_BLERD_BB_XO_BUF_SY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_RCCAL_BLOCK__OFFSET
CYFLD_BLE_BLERD_BB_RCCAL_BLOCK__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BB_RCCAL_BLOCK__SIZE
CYFLD_BLE_BLERD_BB_RCCAL_BLOCK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FAST_CHARGE__OFFSET
CYFLD_BLE_BLERD_FAST_CHARGE__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FAST_CHARGE__SIZE
CYFLD_BLE_BLERD_FAST_CHARGE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LDOVCO__OFFSET
CYFLD_BLE_BLERD_SY_LDOVCO__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LDOVCO__SIZE
CYFLD_BLE_BLERD_SY_LDOVCO__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LDOLOPATH__OFFSET
CYFLD_BLE_BLERD_SY_LDOLOPATH__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LDOLOPATH__SIZE
CYFLD_BLE_BLERD_SY_LDOLOPATH__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LDOFFFB__OFFSET
CYFLD_BLE_BLERD_SY_LDOFFFB__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LDOFFFB__SIZE
CYFLD_BLE_BLERD_SY_LDOFFFB__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BALUN_HFLDO__OFFSET
CYFLD_BLE_BLERD_BALUN_HFLDO__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BALUN_HFLDO__SIZE
CYFLD_BLE_BLERD_BALUN_HFLDO__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BALUN_CTUNE__OFFSET
CYFLD_BLE_BLERD_BALUN_CTUNE__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BALUN_CTUNE__SIZE
CYFLD_BLE_BLERD_BALUN_CTUNE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FPUP_ALL__OFFSET
CYFLD_BLE_BLERD_FPUP_ALL__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FPUP_ALL__SIZE
CYFLD_BLE_BLERD_FPUP_ALL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_SY
CYREG_BLE_BLERD_SY EQU 0x402e0050
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_IBIAS__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_IBIAS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_IBIAS__SIZE
CYFLD_BLE_BLERD_TEST_FPD_IBIAS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_VCO__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_VCO__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_VCO__SIZE
CYFLD_BLE_BLERD_TEST_FPD_VCO__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DIV2__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_DIV2__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DIV2__SIZE
CYFLD_BLE_BLERD_TEST_FPD_DIV2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LOPATHDIVN__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_LOPATHDIVN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LOPATHDIVN__SIZE
CYFLD_BLE_BLERD_TEST_FPD_LOPATHDIVN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DIV2_BUF__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_DIV2_BUF__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DIV2_BUF__SIZE
CYFLD_BLE_BLERD_TEST_FPD_DIV2_BUF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DIVN__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_DIVN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DIVN__SIZE
CYFLD_BLE_BLERD_TEST_FPD_DIVN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_FCAL__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_FCAL__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_FCAL__SIZE
CYFLD_BLE_BLERD_TEST_FPD_FCAL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_CPLPF__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_CPLPF__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_CPLPF__SIZE
CYFLD_BLE_BLERD_TEST_FPD_CPLPF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LOPATHTX__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_LOPATHTX__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LOPATHTX__SIZE
CYFLD_BLE_BLERD_TEST_FPD_LOPATHTX__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DIV2_DRV__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_DIV2_DRV__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DIV2_DRV__SIZE
CYFLD_BLE_BLERD_TEST_FPD_DIV2_DRV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_TX_POWERSAVE__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_TX_POWERSAVE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_TX_POWERSAVE__SIZE
CYFLD_BLE_BLERD_TEST_FPD_TX_POWERSAVE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_FCAL_AMP__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_FCAL_AMP__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_FCAL_AMP__SIZE
CYFLD_BLE_BLERD_TEST_FPD_FCAL_AMP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_OPENLOOP__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_OPENLOOP__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_OPENLOOP__SIZE
CYFLD_BLE_BLERD_TEST_FPD_OPENLOOP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LOOP_FREEZE__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_LOOP_FREEZE__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LOOP_FREEZE__SIZE
CYFLD_BLE_BLERD_TEST_FPD_LOOP_FREEZE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPUP_ALL__OFFSET
CYFLD_BLE_BLERD_TEST_FPUP_ALL__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPUP_ALL__SIZE
CYFLD_BLE_BLERD_TEST_FPUP_ALL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_TEST2_SY
CYREG_BLE_BLERD_TEST2_SY EQU 0x402e0054
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ICP_CODE__OFFSET
CYFLD_BLE_BLERD_ICP_CODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ICP_CODE__SIZE
CYFLD_BLE_BLERD_ICP_CODE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FPD_DSM_RUN__OFFSET
CYFLD_BLE_BLERD_FPD_DSM_RUN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FPD_DSM_RUN__SIZE
CYFLD_BLE_BLERD_FPD_DSM_RUN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FORCE_DSM_RUN__OFFSET
CYFLD_BLE_BLERD_FORCE_DSM_RUN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FORCE_DSM_RUN__SIZE
CYFLD_BLE_BLERD_FORCE_DSM_RUN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FORCE_DSM_FRAC__OFFSET
CYFLD_BLE_BLERD_FORCE_DSM_FRAC__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FORCE_DSM_FRAC__SIZE
CYFLD_BLE_BLERD_FORCE_DSM_FRAC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DSM_FRAC__OFFSET
CYFLD_BLE_BLERD_DSM_FRAC__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DSM_FRAC__SIZE
CYFLD_BLE_BLERD_DSM_FRAC__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_TX
CYREG_BLE_BLERD_TX EQU 0x402e0058
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DAC__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_DAC__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DAC__SIZE
CYFLD_BLE_BLERD_TEST_FPD_DAC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LPF__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_LPF__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LPF__SIZE
CYFLD_BLE_BLERD_TEST_FPD_LPF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DRIVER__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_DRIVER__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_DRIVER__SIZE
CYFLD_BLE_BLERD_TEST_FPD_DRIVER__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_PREDRIVER__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_PREDRIVER__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_PREDRIVER__SIZE
CYFLD_BLE_BLERD_TEST_FPD_PREDRIVER__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_FN_TXEN__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_FN_TXEN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_FN_TXEN__SIZE
CYFLD_BLE_BLERD_TEST_FPD_FN_TXEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_KVM_NFDEV__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_KVM_NFDEV__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_KVM_NFDEV__SIZE
CYFLD_BLE_BLERD_TEST_FPD_KVM_NFDEV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_KVM_PFDEV__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_KVM_PFDEV__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_KVM_PFDEV__SIZE
CYFLD_BLE_BLERD_TEST_FPD_KVM_PFDEV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPUP_TX_ALL__OFFSET
CYFLD_BLE_BLERD_TEST_FPUP_TX_ALL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPUP_TX_ALL__SIZE
CYFLD_BLE_BLERD_TEST_FPUP_TX_ALL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_RX
CYREG_BLE_BLERD_RX EQU 0x402e005c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_ADC_ICORE__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_ADC_ICORE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_ADC_ICORE__SIZE
CYFLD_BLE_BLERD_TEST_FPD_ADC_ICORE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_ADC_IREFGEN__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_ADC_IREFGEN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_ADC_IREFGEN__SIZE
CYFLD_BLE_BLERD_TEST_FPD_ADC_IREFGEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_ADC_QCORE__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_ADC_QCORE__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_ADC_QCORE__SIZE
CYFLD_BLE_BLERD_TEST_FPD_ADC_QCORE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_ADC_QREFGEN__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_ADC_QREFGEN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_ADC_QREFGEN__SIZE
CYFLD_BLE_BLERD_TEST_FPD_ADC_QREFGEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_BPF__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_BPF__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_BPF__SIZE
CYFLD_BLE_BLERD_TEST_FPD_BPF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_TIA__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_TIA__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_TIA__SIZE
CYFLD_BLE_BLERD_TEST_FPD_TIA__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_MIXER_LO__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_MIXER_LO__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_MIXER_LO__SIZE
CYFLD_BLE_BLERD_TEST_FPD_MIXER_LO__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_MIXER_RF__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_MIXER_RF__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_MIXER_RF__SIZE
CYFLD_BLE_BLERD_TEST_FPD_MIXER_RF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LNA__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_LNA__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LNA__SIZE
CYFLD_BLE_BLERD_TEST_FPD_LNA__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LNA_HIZ__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_LNA_HIZ__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_LNA_HIZ__SIZE
CYFLD_BLE_BLERD_TEST_FPD_LNA_HIZ__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_FN_RXEN__OFFSET
CYFLD_BLE_BLERD_TEST_FPD_FN_RXEN__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPD_FN_RXEN__SIZE
CYFLD_BLE_BLERD_TEST_FPD_FN_RXEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPUP_RX_ALL__OFFSET
CYFLD_BLE_BLERD_TEST_FPUP_RX_ALL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_FPUP_RX_ALL__SIZE
CYFLD_BLE_BLERD_TEST_FPUP_RX_ALL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DIAG1
CYREG_BLE_BLERD_DIAG1 EQU 0x402e0060
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DISABLE__OFFSET
CYFLD_BLE_BLERD_DISABLE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DISABLE__SIZE
CYFLD_BLE_BLERD_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CODE__OFFSET
CYFLD_BLE_BLERD_CODE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CODE__SIZE
CYFLD_BLE_BLERD_CODE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SEL__OFFSET
CYFLD_BLE_BLERD_SEL__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SEL__SIZE
CYFLD_BLE_BLERD_SEL__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_IM
CYREG_BLE_BLERD_IM EQU 0x402e0064
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_MON_DISABLE__OFFSET
CYFLD_BLE_BLERD_DIAG_MON_DISABLE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_MON_DISABLE__SIZE
CYFLD_BLE_BLERD_DIAG_MON_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_MONI_CODE__OFFSET
CYFLD_BLE_BLERD_DIAG_MONI_CODE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_MONI_CODE__SIZE
CYFLD_BLE_BLERD_DIAG_MONI_CODE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_INJ_DISABLE__OFFSET
CYFLD_BLE_BLERD_DIAG_INJ_DISABLE__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_INJ_DISABLE__SIZE
CYFLD_BLE_BLERD_DIAG_INJ_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_INJ_CODE__OFFSET
CYFLD_BLE_BLERD_DIAG_INJ_CODE__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_INJ_CODE__SIZE
CYFLD_BLE_BLERD_DIAG_INJ_CODE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_LOOPBACK__OFFSET
CYFLD_BLE_BLERD_DIAG_LOOPBACK__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_LOOPBACK__SIZE
CYFLD_BLE_BLERD_DIAG_LOOPBACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_BUMP__OFFSET
CYFLD_BLE_BLERD_DIAG_BUMP__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_BUMP__SIZE
CYFLD_BLE_BLERD_DIAG_BUMP__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_RESV__OFFSET
CYFLD_BLE_BLERD_DIAG_RESV__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIAG_RESV__SIZE
CYFLD_BLE_BLERD_DIAG_RESV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_LDO_BYPASS
CYREG_BLE_BLERD_LDO_BYPASS EQU 0x402e0068
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SYLDOVCO__OFFSET
CYFLD_BLE_BLERD_SYLDOVCO__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SYLDOVCO__SIZE
CYFLD_BLE_BLERD_SYLDOVCO__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SYLDOLOPATH__OFFSET
CYFLD_BLE_BLERD_SYLDOLOPATH__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SYLDOLOPATH__SIZE
CYFLD_BLE_BLERD_SYLDOLOPATH__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SYLDOFFFB__OFFSET
CYFLD_BLE_BLERD_SYLDOFFFB__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SYLDOFFFB__SIZE
CYFLD_BLE_BLERD_SYLDOFFFB__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_HFLDO__OFFSET
CYFLD_BLE_BLERD_HFLDO__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_HFLDO__SIZE
CYFLD_BLE_BLERD_HFLDO__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RESV_LDOBP__OFFSET
CYFLD_BLE_BLERD_RESV_LDOBP__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RESV_LDOBP__SIZE
CYFLD_BLE_BLERD_RESV_LDOBP__SIZE EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_LDO
CYREG_BLE_BLERD_LDO EQU 0x402e006c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_BALUM_HF__OFFSET
CYFLD_BLE_BLERD_BUMP_BALUM_HF__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_BALUM_HF__SIZE
CYFLD_BLE_BLERD_BUMP_BALUM_HF__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_SY_VCO__OFFSET
CYFLD_BLE_BLERD_BUMP_SY_VCO__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_SY_VCO__SIZE
CYFLD_BLE_BLERD_BUMP_SY_VCO__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_SY_LOPATH__OFFSET
CYFLD_BLE_BLERD_BUMP_SY_LOPATH__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_SY_LOPATH__SIZE
CYFLD_BLE_BLERD_BUMP_SY_LOPATH__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_SY_LHV__OFFSET
CYFLD_BLE_BLERD_BUMP_SY_LHV__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_SY_LHV__SIZE
CYFLD_BLE_BLERD_BUMP_SY_LHV__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_SY_FFFB__OFFSET
CYFLD_BLE_BLERD_BUMP_SY_FFFB__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_SY_FFFB__SIZE
CYFLD_BLE_BLERD_BUMP_SY_FFFB__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_LDO__OFFSET
CYFLD_BLE_BLERD_REV_LDO__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_LDO__SIZE
CYFLD_BLE_BLERD_REV_LDO__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_BB_BUMP1
CYREG_BLE_BLERD_BB_BUMP1 EQU 0x402e0070
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REFCORE_VDD__OFFSET
CYFLD_BLE_BLERD_REFCORE_VDD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REFCORE_VDD__SIZE
CYFLD_BLE_BLERD_REFCORE_VDD__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_V2I_REG__OFFSET
CYFLD_BLE_BLERD_V2I_REG__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_V2I_REG__SIZE
CYFLD_BLE_BLERD_V2I_REG__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LFLDO__OFFSET
CYFLD_BLE_BLERD_LFLDO__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LFLDO__SIZE
CYFLD_BLE_BLERD_LFLDO__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LSLDO__OFFSET
CYFLD_BLE_BLERD_LSLDO__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LSLDO__SIZE
CYFLD_BLE_BLERD_LSLDO__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_BBBUMP__OFFSET
CYFLD_BLE_BLERD_REV_BBBUMP__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_BBBUMP__SIZE
CYFLD_BLE_BLERD_REV_BBBUMP__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FORCE_BGSTARTUP__OFFSET
CYFLD_BLE_BLERD_FORCE_BGSTARTUP__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FORCE_BGSTARTUP__SIZE
CYFLD_BLE_BLERD_FORCE_BGSTARTUP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FPD_REFORCE__OFFSET
CYFLD_BLE_BLERD_FPD_REFORCE__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FPD_REFORCE__SIZE
CYFLD_BLE_BLERD_FPD_REFORCE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_BB_BUMP2
CYREG_BLE_BLERD_BB_BUMP2 EQU 0x402e0074
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_V2I_RCAL__OFFSET
CYFLD_BLE_BLERD_V2I_RCAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_V2I_RCAL__SIZE
CYFLD_BLE_BLERD_V2I_RCAL__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_V2I__OFFSET
CYFLD_BLE_BLERD_V2I__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_V2I__SIZE
CYFLD_BLE_BLERD_V2I__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VBG_TRIM__OFFSET
CYFLD_BLE_BLERD_VBG_TRIM__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VBG_TRIM__SIZE
CYFLD_BLE_BLERD_VBG_TRIM__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_IBIAS__OFFSET
CYFLD_BLE_BLERD_SY_IBIAS__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_IBIAS__SIZE
CYFLD_BLE_BLERD_SY_IBIAS__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_BB_XO
CYREG_BLE_BLERD_BB_XO EQU 0x402e0078
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIS_XOCORE_SUPFILT__OFFSET
CYFLD_BLE_BLERD_DIS_XOCORE_SUPFILT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DIS_XOCORE_SUPFILT__SIZE
CYFLD_BLE_BLERD_DIS_XOCORE_SUPFILT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_RE_FASTSTART__OFFSET
CYFLD_BLE_BLERD_EN_RE_FASTSTART__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_RE_FASTSTART__SIZE
CYFLD_BLE_BLERD_EN_RE_FASTSTART__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_CURMEAS__OFFSET
CYFLD_BLE_BLERD_EN_CURMEAS__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_CURMEAS__SIZE
CYFLD_BLE_BLERD_EN_CURMEAS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_AMPDET_CURMEAS__OFFSET
CYFLD_BLE_BLERD_EN_AMPDET_CURMEAS__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_AMPDET_CURMEAS__SIZE
CYFLD_BLE_BLERD_EN_AMPDET_CURMEAS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_AMPDET_FASTSTART__OFFSET
CYFLD_BLE_BLERD_EN_AMPDET_FASTSTART__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_EN_AMPDET_FASTSTART__SIZE
CYFLD_BLE_BLERD_EN_AMPDET_FASTSTART__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CTRL_RC_FASTSTART_RES__OFFSET
CYFLD_BLE_BLERD_CTRL_RC_FASTSTART_RES__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CTRL_RC_FASTSTART_RES__SIZE
CYFLD_BLE_BLERD_CTRL_RC_FASTSTART_RES__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CTRL_VDDL_XO__OFFSET
CYFLD_BLE_BLERD_CTRL_VDDL_XO__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CTRL_VDDL_XO__SIZE
CYFLD_BLE_BLERD_CTRL_VDDL_XO__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CTRL_VDDL_XB__OFFSET
CYFLD_BLE_BLERD_CTRL_VDDL_XB__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CTRL_VDDL_XB__SIZE
CYFLD_BLE_BLERD_CTRL_VDDL_XB__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CTRL_RPREF__OFFSET
CYFLD_BLE_BLERD_CTRL_RPREF__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CTRL_RPREF__SIZE
CYFLD_BLE_BLERD_CTRL_RPREF__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_rev_bb_xo__OFFSET
CYFLD_BLE_BLERD_rev_bb_xo__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_rev_bb_xo__SIZE
CYFLD_BLE_BLERD_rev_bb_xo__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_BB_XO_CAPTRIM
CYREG_BLE_BLERD_BB_XO_CAPTRIM EQU 0x402e007c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_X2__OFFSET
CYFLD_BLE_BLERD_X2__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_X2__SIZE
CYFLD_BLE_BLERD_X2__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_X1__OFFSET
CYFLD_BLE_BLERD_X1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_X1__SIZE
CYFLD_BLE_BLERD_X1__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_SY_BUMP1
CYREG_BLE_BLERD_SY_BUMP1 EQU 0x402e0080
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VCO__OFFSET
CYFLD_BLE_BLERD_VCO__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VCO__SIZE
CYFLD_BLE_BLERD_VCO__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOFB_POWERSAVE__OFFSET
CYFLD_BLE_BLERD_LOFB_POWERSAVE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOFB_POWERSAVE__SIZE
CYFLD_BLE_BLERD_LOFB_POWERSAVE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IBIAS_LOPATH__OFFSET
CYFLD_BLE_BLERD_IBIAS_LOPATH__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IBIAS_LOPATH__SIZE
CYFLD_BLE_BLERD_IBIAS_LOPATH__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LDOLO_FORCE_STARTUP__OFFSET
CYFLD_BLE_BLERD_LDOLO_FORCE_STARTUP__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LDOLO_FORCE_STARTUP__SIZE
CYFLD_BLE_BLERD_LDOLO_FORCE_STARTUP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOPATH__OFFSET
CYFLD_BLE_BLERD_LOPATH__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOPATH__SIZE
CYFLD_BLE_BLERD_LOPATH__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PDCPLPF__OFFSET
CYFLD_BLE_BLERD_PDCPLPF__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PDCPLPF__SIZE
CYFLD_BLE_BLERD_PDCPLPF__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_SY_BUMP2
CYREG_BLE_BLERD_SY_BUMP2 EQU 0x402e0084
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_BIAS_SEL__OFFSET
CYFLD_BLE_BLERD_FCAL_BIAS_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_BIAS_SEL__SIZE
CYFLD_BLE_BLERD_FCAL_BIAS_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ACAP_BIAS_SEL__OFFSET
CYFLD_BLE_BLERD_ACAP_BIAS_SEL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ACAP_BIAS_SEL__SIZE
CYFLD_BLE_BLERD_ACAP_BIAS_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ICP_XFACTOR__OFFSET
CYFLD_BLE_BLERD_ICP_XFACTOR__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ICP_XFACTOR__SIZE
CYFLD_BLE_BLERD_ICP_XFACTOR__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ICP_OFFSET__OFFSET
CYFLD_BLE_BLERD_ICP_OFFSET__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ICP_OFFSET__SIZE
CYFLD_BLE_BLERD_ICP_OFFSET__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CLKNC_MODE__OFFSET
CYFLD_BLE_BLERD_CLKNC_MODE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CLKNC_MODE__SIZE
CYFLD_BLE_BLERD_CLKNC_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PUP_MON__OFFSET
CYFLD_BLE_BLERD_PUP_MON__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PUP_MON__SIZE
CYFLD_BLE_BLERD_PUP_MON__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VCTRL_PULLDN__OFFSET
CYFLD_BLE_BLERD_VCTRL_PULLDN__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VCTRL_PULLDN__SIZE
CYFLD_BLE_BLERD_VCTRL_PULLDN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VMOD_PULLDN__OFFSET
CYFLD_BLE_BLERD_VMOD_PULLDN__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VMOD_PULLDN__SIZE
CYFLD_BLE_BLERD_VMOD_PULLDN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RST_DLY__OFFSET
CYFLD_BLE_BLERD_RST_DLY__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RST_DLY__SIZE
CYFLD_BLE_BLERD_RST_DLY__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PDCP_OFFSET__OFFSET
CYFLD_BLE_BLERD_PDCP_OFFSET__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PDCP_OFFSET__SIZE
CYFLD_BLE_BLERD_PDCP_OFFSET__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_TX_BUMP1
CYREG_BLE_BLERD_TX_BUMP1 EQU 0x402e0088
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_DRIVER__OFFSET
CYFLD_BLE_BLERD_TX_DRIVER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_DRIVER__SIZE
CYFLD_BLE_BLERD_TX_DRIVER__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_RST_DLY_TX__OFFSET
CYFLD_BLE_BLERD_SY_RST_DLY_TX__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_RST_DLY_TX__SIZE
CYFLD_BLE_BLERD_SY_RST_DLY_TX__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_LPF__OFFSET
CYFLD_BLE_BLERD_TX_LPF__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_LPF__SIZE
CYFLD_BLE_BLERD_TX_LPF__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_VTXREF_PROG__OFFSET
CYFLD_BLE_BLERD_TX_VTXREF_PROG__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_VTXREF_PROG__SIZE
CYFLD_BLE_BLERD_TX_VTXREF_PROG__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_DIVN_TXPOWERSAVE__OFFSET
CYFLD_BLE_BLERD_SY_DIVN_TXPOWERSAVE__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_DIVN_TXPOWERSAVE__SIZE
CYFLD_BLE_BLERD_SY_DIVN_TXPOWERSAVE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_TX_BUMP2
CYREG_BLE_BLERD_TX_BUMP2 EQU 0x402e008c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DRV_AB_VBIAS__OFFSET
CYFLD_BLE_BLERD_DRV_AB_VBIAS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DRV_AB_VBIAS__SIZE
CYFLD_BLE_BLERD_DRV_AB_VBIAS__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DRV_VCASCH__OFFSET
CYFLD_BLE_BLERD_DRV_VCASCH__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DRV_VCASCH__SIZE
CYFLD_BLE_BLERD_DRV_VCASCH__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LDOBGREF_EN__OFFSET
CYFLD_BLE_BLERD_SY_LDOBGREF_EN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LDOBGREF_EN__SIZE
CYFLD_BLE_BLERD_SY_LDOBGREF_EN__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_ICP_OFFSET_TX__OFFSET
CYFLD_BLE_BLERD_SY_ICP_OFFSET_TX__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_ICP_OFFSET_TX__SIZE
CYFLD_BLE_BLERD_SY_ICP_OFFSET_TX__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_RES__OFFSET
CYFLD_BLE_BLERD_DAC_RES__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DAC_RES__SIZE
CYFLD_BLE_BLERD_DAC_RES__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_CP_TXPOWERSAVE__OFFSET
CYFLD_BLE_BLERD_SY_CP_TXPOWERSAVE__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_CP_TXPOWERSAVE__SIZE
CYFLD_BLE_BLERD_SY_CP_TXPOWERSAVE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_RX_BUMP1
CYREG_BLE_BLERD_RX_BUMP1 EQU 0x402e0090
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TIA__OFFSET
CYFLD_BLE_BLERD_TIA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TIA__SIZE
CYFLD_BLE_BLERD_TIA__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF__OFFSET
CYFLD_BLE_BLERD_CBPF__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF__SIZE
CYFLD_BLE_BLERD_CBPF__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IF_OFFSET_CALDAC__OFFSET
CYFLD_BLE_BLERD_IF_OFFSET_CALDAC__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IF_OFFSET_CALDAC__SIZE
CYFLD_BLE_BLERD_IF_OFFSET_CALDAC__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_MIXER_VBIAS_SW__OFFSET
CYFLD_BLE_BLERD_MIXER_VBIAS_SW__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_MIXER_VBIAS_SW__SIZE
CYFLD_BLE_BLERD_MIXER_VBIAS_SW__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_MIXER__OFFSET
CYFLD_BLE_BLERD_MIXER__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_MIXER__SIZE
CYFLD_BLE_BLERD_MIXER__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LNA__OFFSET
CYFLD_BLE_BLERD_LNA__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LNA__SIZE
CYFLD_BLE_BLERD_LNA__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_RX_BUMP2
CYREG_BLE_BLERD_RX_BUMP2 EQU 0x402e0094
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LNA_IBIAS__OFFSET
CYFLD_BLE_BLERD_LNA_IBIAS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LNA_IBIAS__SIZE
CYFLD_BLE_BLERD_LNA_IBIAS__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TIA_IBIAS__OFFSET
CYFLD_BLE_BLERD_TIA_IBIAS__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TIA_IBIAS__SIZE
CYFLD_BLE_BLERD_TIA_IBIAS__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF_IBIAS__OFFSET
CYFLD_BLE_BLERD_CBPF_IBIAS__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF_IBIAS__SIZE
CYFLD_BLE_BLERD_CBPF_IBIAS__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IF_CM_IBIAS__OFFSET
CYFLD_BLE_BLERD_IF_CM_IBIAS__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IF_CM_IBIAS__SIZE
CYFLD_BLE_BLERD_IF_CM_IBIAS__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF_HIZ_ENABLE__OFFSET
CYFLD_BLE_BLERD_CBPF_HIZ_ENABLE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF_HIZ_ENABLE__SIZE
CYFLD_BLE_BLERD_CBPF_HIZ_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COMPLEX_DISABLE__OFFSET
CYFLD_BLE_BLERD_COMPLEX_DISABLE__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COMPLEX_DISABLE__SIZE
CYFLD_BLE_BLERD_COMPLEX_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_R2HIGHMODE__OFFSET
CYFLD_BLE_BLERD_SY_R2HIGHMODE__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_R2HIGHMODE__SIZE
CYFLD_BLE_BLERD_SY_R2HIGHMODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_HILINEARITYR2_MODE__OFFSET
CYFLD_BLE_BLERD_SY_HILINEARITYR2_MODE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_HILINEARITYR2_MODE__SIZE
CYFLD_BLE_BLERD_SY_HILINEARITYR2_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LOWKVAMODE__OFFSET
CYFLD_BLE_BLERD_SY_LOWKVAMODE__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LOWKVAMODE__SIZE
CYFLD_BLE_BLERD_SY_LOWKVAMODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LOWKVMMODE__OFFSET
CYFLD_BLE_BLERD_SY_LOWKVMMODE__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SY_LOWKVMMODE__SIZE
CYFLD_BLE_BLERD_SY_LOWKVMMODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_RX_BUMP2__OFFSET
CYFLD_BLE_BLERD_REV_RX_BUMP2__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_RX_BUMP2__SIZE
CYFLD_BLE_BLERD_REV_RX_BUMP2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_ADC_BUMP1
CYREG_BLE_BLERD_ADC_BUMP1 EQU 0x402e0098
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_I_REF__OFFSET
CYFLD_BLE_BLERD_I_REF__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_I_REF__SIZE
CYFLD_BLE_BLERD_I_REF__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_Q_REF__OFFSET
CYFLD_BLE_BLERD_Q_REF__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_Q_REF__SIZE
CYFLD_BLE_BLERD_Q_REF__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IBG_CAL__OFFSET
CYFLD_BLE_BLERD_IBG_CAL__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IBG_CAL__SIZE
CYFLD_BLE_BLERD_IBG_CAL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOOPDLY__OFFSET
CYFLD_BLE_BLERD_LOOPDLY__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOOPDLY__SIZE
CYFLD_BLE_BLERD_LOOPDLY__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOOPDLY4X_EN__OFFSET
CYFLD_BLE_BLERD_LOOPDLY4X_EN__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOOPDLY4X_EN__SIZE
CYFLD_BLE_BLERD_LOOPDLY4X_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOWPOWER__OFFSET
CYFLD_BLE_BLERD_LOWPOWER__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LOWPOWER__SIZE
CYFLD_BLE_BLERD_LOWPOWER__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_OPAMP_BYPASS__OFFSET
CYFLD_BLE_BLERD_OPAMP_BYPASS__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_OPAMP_BYPASS__SIZE
CYFLD_BLE_BLERD_OPAMP_BYPASS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BWCTRL__OFFSET
CYFLD_BLE_BLERD_BWCTRL__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BWCTRL__SIZE
CYFLD_BLE_BLERD_BWCTRL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_ADC_BUMP2
CYREG_BLE_BLERD_ADC_BUMP2 EQU 0x402e009c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CYCLE_B2_DELAY__OFFSET
CYFLD_BLE_BLERD_CYCLE_B2_DELAY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CYCLE_B2_DELAY__SIZE
CYFLD_BLE_BLERD_CYCLE_B2_DELAY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CYCLE_B5_DELAY__OFFSET
CYFLD_BLE_BLERD_CYCLE_B5_DELAY__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CYCLE_B5_DELAY__SIZE
CYFLD_BLE_BLERD_CYCLE_B5_DELAY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DUTCYCLE_25__OFFSET
CYFLD_BLE_BLERD_DUTCYCLE_25__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DUTCYCLE_25__SIZE
CYFLD_BLE_BLERD_DUTCYCLE_25__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_METADET_EN__OFFSET
CYFLD_BLE_BLERD_METADET_EN__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_METADET_EN__SIZE
CYFLD_BLE_BLERD_METADET_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IBUMP__OFFSET
CYFLD_BLE_BLERD_IBUMP__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IBUMP__SIZE
CYFLD_BLE_BLERD_IBUMP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PREAMP_SOURCECTRL_N__OFFSET
CYFLD_BLE_BLERD_PREAMP_SOURCECTRL_N__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PREAMP_SOURCECTRL_N__SIZE
CYFLD_BLE_BLERD_PREAMP_SOURCECTRL_N__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PREAMP_GAINCTRL_N__OFFSET
CYFLD_BLE_BLERD_PREAMP_GAINCTRL_N__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PREAMP_GAINCTRL_N__SIZE
CYFLD_BLE_BLERD_PREAMP_GAINCTRL_N__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SHORT_INPUT__OFFSET
CYFLD_BLE_BLERD_SHORT_INPUT__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SHORT_INPUT__SIZE
CYFLD_BLE_BLERD_SHORT_INPUT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RETURN_SKEW__OFFSET
CYFLD_BLE_BLERD_RETURN_SKEW__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RETURN_SKEW__SIZE
CYFLD_BLE_BLERD_RETURN_SKEW__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IQSWAP__OFFSET
CYFLD_BLE_BLERD_IQSWAP__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IQSWAP__SIZE
CYFLD_BLE_BLERD_IQSWAP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PREAMP_BWCTRL__OFFSET
CYFLD_BLE_BLERD_PREAMP_BWCTRL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PREAMP_BWCTRL__SIZE
CYFLD_BLE_BLERD_PREAMP_BWCTRL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_ADC_BUMP2__OFFSET
CYFLD_BLE_BLERD_REV_ADC_BUMP2__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_ADC_BUMP2__SIZE
CYFLD_BLE_BLERD_REV_ADC_BUMP2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_BALUN
CYREG_BLE_BLERD_BALUN EQU 0x402e00a0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_RX_CTUNE__OFFSET
CYFLD_BLE_BLERD_BUMP_RX_CTUNE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_RX_CTUNE__SIZE
CYFLD_BLE_BLERD_BUMP_RX_CTUNE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_TX_CTUNE__OFFSET
CYFLD_BLE_BLERD_BUMP_TX_CTUNE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_TX_CTUNE__SIZE
CYFLD_BLE_BLERD_BUMP_TX_CTUNE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_VTUNE__OFFSET
CYFLD_BLE_BLERD_BUMP_VTUNE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_VTUNE__SIZE
CYFLD_BLE_BLERD_BUMP_VTUNE__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_RTUNE__OFFSET
CYFLD_BLE_BLERD_BUMP_RTUNE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_BUMP_RTUNE__SIZE
CYFLD_BLE_BLERD_BUMP_RTUNE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_BALUN__OFFSET
CYFLD_BLE_BLERD_REV_BALUN__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_REV_BALUN__SIZE
CYFLD_BLE_BLERD_REV_BALUN__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_CTR1
CYREG_BLE_BLERD_CTR1 EQU 0x402e00a4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VCO_WARMUP_TIME__OFFSET
CYFLD_BLE_BLERD_VCO_WARMUP_TIME__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_VCO_WARMUP_TIME__SIZE
CYFLD_BLE_BLERD_VCO_WARMUP_TIME__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PLL_SETTLING_TIME__OFFSET
CYFLD_BLE_BLERD_PLL_SETTLING_TIME__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PLL_SETTLING_TIME__SIZE
CYFLD_BLE_BLERD_PLL_SETTLING_TIME__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_FREEZE_TIME__OFFSET
CYFLD_BLE_BLERD_TX_FREEZE_TIME__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_FREEZE_TIME__SIZE
CYFLD_BLE_BLERD_TX_FREEZE_TIME__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_PREDRV_TIME__OFFSET
CYFLD_BLE_BLERD_TX_PREDRV_TIME__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_PREDRV_TIME__SIZE
CYFLD_BLE_BLERD_TX_PREDRV_TIME__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_MODSTART_TIME__OFFSET
CYFLD_BLE_BLERD_TX_MODSTART_TIME__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_MODSTART_TIME__SIZE
CYFLD_BLE_BLERD_TX_MODSTART_TIME__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_DF2_SEL__OFFSET
CYFLD_BLE_BLERD_TX_DF2_SEL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TX_DF2_SEL__SIZE
CYFLD_BLE_BLERD_TX_DF2_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_FULL_SWING_MONI_EN__OFFSET
CYFLD_BLE_BLERD_ADC_FULL_SWING_MONI_EN__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_FULL_SWING_MONI_EN__SIZE
CYFLD_BLE_BLERD_ADC_FULL_SWING_MONI_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DBG_SELECT__OFFSET
CYFLD_BLE_BLERD_DBG_SELECT__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DBG_SELECT__SIZE
CYFLD_BLE_BLERD_DBG_SELECT__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_DC_FREEZE_EN__OFFSET
CYFLD_BLE_BLERD_RX_DC_FREEZE_EN__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_DC_FREEZE_EN__SIZE
CYFLD_BLE_BLERD_RX_DC_FREEZE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_ENV_FREEZE_EN__OFFSET
CYFLD_BLE_BLERD_RX_ENV_FREEZE_EN__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_ENV_FREEZE_EN__SIZE
CYFLD_BLE_BLERD_RX_ENV_FREEZE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC_RST_DLY__OFFSET
CYFLD_BLE_BLERD_AGC_RST_DLY__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC_RST_DLY__SIZE
CYFLD_BLE_BLERD_AGC_RST_DLY__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_AGC
CYREG_BLE_BLERD_AGC EQU 0x402e00a8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RST_EN__OFFSET
CYFLD_BLE_BLERD_RST_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RST_EN__SIZE
CYFLD_BLE_BLERD_RST_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CHECK_SAT_EN__OFFSET
CYFLD_BLE_BLERD_CHECK_SAT_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CHECK_SAT_EN__SIZE
CYFLD_BLE_BLERD_CHECK_SAT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SAT_CHK_TIM__OFFSET
CYFLD_BLE_BLERD_SAT_CHK_TIM__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SAT_CHK_TIM__SIZE
CYFLD_BLE_BLERD_SAT_CHK_TIM__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_GAIN_MAPPING_MODE__OFFSET
CYFLD_BLE_BLERD_GAIN_MAPPING_MODE__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_GAIN_MAPPING_MODE__SIZE
CYFLD_BLE_BLERD_GAIN_MAPPING_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_GAIN_SAT_THRES__OFFSET
CYFLD_BLE_BLERD_GAIN_SAT_THRES__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_GAIN_SAT_THRES__SIZE
CYFLD_BLE_BLERD_GAIN_SAT_THRES__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PWR_MEAS_TIM__OFFSET
CYFLD_BLE_BLERD_PWR_MEAS_TIM__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PWR_MEAS_TIM__SIZE
CYFLD_BLE_BLERD_PWR_MEAS_TIM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_GAIN_STABLE_TIM__OFFSET
CYFLD_BLE_BLERD_GAIN_STABLE_TIM__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_GAIN_STABLE_TIM__SIZE
CYFLD_BLE_BLERD_GAIN_STABLE_TIM__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_START_WAIT_TIM__OFFSET
CYFLD_BLE_BLERD_START_WAIT_TIM__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_START_WAIT_TIM__SIZE
CYFLD_BLE_BLERD_START_WAIT_TIM__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_THRSHD1
CYREG_BLE_BLERD_THRSHD1 EQU 0x402e00ac
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC60_66__OFFSET
CYFLD_BLE_BLERD_AGC60_66__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC60_66__SIZE
CYFLD_BLE_BLERD_AGC60_66__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC66_60__OFFSET
CYFLD_BLE_BLERD_AGC66_60__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC66_60__SIZE
CYFLD_BLE_BLERD_AGC66_60__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_THRSHD2
CYREG_BLE_BLERD_THRSHD2 EQU 0x402e00b0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC48_60__OFFSET
CYFLD_BLE_BLERD_AGC48_60__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC48_60__SIZE
CYFLD_BLE_BLERD_AGC48_60__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC60_48__OFFSET
CYFLD_BLE_BLERD_AGC60_48__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC60_48__SIZE
CYFLD_BLE_BLERD_AGC60_48__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_THRSHD3
CYREG_BLE_BLERD_THRSHD3 EQU 0x402e00b4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC36_48__OFFSET
CYFLD_BLE_BLERD_AGC36_48__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC36_48__SIZE
CYFLD_BLE_BLERD_AGC36_48__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC48_36__OFFSET
CYFLD_BLE_BLERD_AGC48_36__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC48_36__SIZE
CYFLD_BLE_BLERD_AGC48_36__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_THRSHD4
CYREG_BLE_BLERD_THRSHD4 EQU 0x402e00b8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC18_36__OFFSET
CYFLD_BLE_BLERD_AGC18_36__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC18_36__SIZE
CYFLD_BLE_BLERD_AGC18_36__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC36_18__OFFSET
CYFLD_BLE_BLERD_AGC36_18__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC36_18__SIZE
CYFLD_BLE_BLERD_AGC36_18__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_THRSHD5
CYREG_BLE_BLERD_THRSHD5 EQU 0x402e00bc
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC0_18__OFFSET
CYFLD_BLE_BLERD_AGC0_18__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC0_18__SIZE
CYFLD_BLE_BLERD_AGC0_18__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC18_0__OFFSET
CYFLD_BLE_BLERD_AGC18_0__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC18_0__SIZE
CYFLD_BLE_BLERD_AGC18_0__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DC
CYREG_BLE_BLERD_DC EQU 0x402e00c0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COMP_Q_CODE__OFFSET
CYFLD_BLE_BLERD_COMP_Q_CODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COMP_Q_CODE__SIZE
CYFLD_BLE_BLERD_COMP_Q_CODE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COMP_I_CODE__OFFSET
CYFLD_BLE_BLERD_COMP_I_CODE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_COMP_I_CODE__SIZE
CYFLD_BLE_BLERD_COMP_I_CODE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_IQMIS
CYREG_BLE_BLERD_IQMIS EQU 0x402e00c4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IQCOMP_QVAL__OFFSET
CYFLD_BLE_BLERD_IQCOMP_QVAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IQCOMP_QVAL__SIZE
CYFLD_BLE_BLERD_IQCOMP_QVAL__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IQCOMP_IVAL__OFFSET
CYFLD_BLE_BLERD_IQCOMP_IVAL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_IQCOMP_IVAL__SIZE
CYFLD_BLE_BLERD_IQCOMP_IVAL__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DCCAL
CYREG_BLE_BLERD_DCCAL EQU 0x402e00c8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_IBITS__OFFSET
CYFLD_BLE_BLERD_TEST_IBITS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_IBITS__SIZE
CYFLD_BLE_BLERD_TEST_IBITS__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_QBITS__OFFSET
CYFLD_BLE_BLERD_TEST_QBITS__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_QBITS__SIZE
CYFLD_BLE_BLERD_TEST_QBITS__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_MODE__OFFSET
CYFLD_BLE_BLERD_TEST_MODE__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_MODE__SIZE
CYFLD_BLE_BLERD_TEST_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_Q_POLARITY__OFFSET
CYFLD_BLE_BLERD_TEST_Q_POLARITY__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_Q_POLARITY__SIZE
CYFLD_BLE_BLERD_TEST_Q_POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_I_POLARITY__OFFSET
CYFLD_BLE_BLERD_TEST_I_POLARITY__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_TEST_I_POLARITY__SIZE
CYFLD_BLE_BLERD_TEST_I_POLARITY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_RCCAL
CYREG_BLE_BLERD_RCCAL EQU 0x402e00cc
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CODE_RX__OFFSET
CYFLD_BLE_BLERD_CODE_RX__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CODE_RX__SIZE
CYFLD_BLE_BLERD_CODE_RX__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CODE_TX__OFFSET
CYFLD_BLE_BLERD_CODE_TX__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CODE_TX__SIZE
CYFLD_BLE_BLERD_CODE_TX__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SOFTRST_POWER_DIFF__OFFSET
CYFLD_BLE_BLERD_SOFTRST_POWER_DIFF__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SOFTRST_POWER_DIFF__SIZE
CYFLD_BLE_BLERD_SOFTRST_POWER_DIFF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SOFTRST_EN_TOSTR__OFFSET
CYFLD_BLE_BLERD_SOFTRST_EN_TOSTR__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SOFTRST_EN_TOSTR__SIZE
CYFLD_BLE_BLERD_SOFTRST_EN_TOSTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SOFTRST_EN_TODIFF__OFFSET
CYFLD_BLE_BLERD_SOFTRST_EN_TODIFF__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_SOFTRST_EN_TODIFF__SIZE
CYFLD_BLE_BLERD_SOFTRST_EN_TODIFF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC_GAIN_INC_TIMES_THRES__OFFSET
CYFLD_BLE_BLERD_AGC_GAIN_INC_TIMES_THRES__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_AGC_GAIN_INC_TIMES_THRES__SIZE
CYFLD_BLE_BLERD_AGC_GAIN_INC_TIMES_THRES__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DSM1
CYREG_BLE_BLERD_DSM1 EQU 0x402e00d0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE3__OFFSET
CYFLD_BLE_BLERD_INDX_CODE3__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE3__SIZE
CYFLD_BLE_BLERD_INDX_CODE3__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE2__OFFSET
CYFLD_BLE_BLERD_INDX_CODE2__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE2__SIZE
CYFLD_BLE_BLERD_INDX_CODE2__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE1__OFFSET
CYFLD_BLE_BLERD_INDX_CODE1__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE1__SIZE
CYFLD_BLE_BLERD_INDX_CODE1__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE0__OFFSET
CYFLD_BLE_BLERD_INDX_CODE0__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE0__SIZE
CYFLD_BLE_BLERD_INDX_CODE0__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DSM2
CYREG_BLE_BLERD_DSM2 EQU 0x402e00d4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE7__OFFSET
CYFLD_BLE_BLERD_INDX_CODE7__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE7__SIZE
CYFLD_BLE_BLERD_INDX_CODE7__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE6__OFFSET
CYFLD_BLE_BLERD_INDX_CODE6__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE6__SIZE
CYFLD_BLE_BLERD_INDX_CODE6__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE5__OFFSET
CYFLD_BLE_BLERD_INDX_CODE5__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE5__SIZE
CYFLD_BLE_BLERD_INDX_CODE5__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE4__OFFSET
CYFLD_BLE_BLERD_INDX_CODE4__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE4__SIZE
CYFLD_BLE_BLERD_INDX_CODE4__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DSM3
CYREG_BLE_BLERD_DSM3 EQU 0x402e00d8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE11__OFFSET
CYFLD_BLE_BLERD_INDX_CODE11__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE11__SIZE
CYFLD_BLE_BLERD_INDX_CODE11__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE10__OFFSET
CYFLD_BLE_BLERD_INDX_CODE10__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE10__SIZE
CYFLD_BLE_BLERD_INDX_CODE10__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE9__OFFSET
CYFLD_BLE_BLERD_INDX_CODE9__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE9__SIZE
CYFLD_BLE_BLERD_INDX_CODE9__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE8__OFFSET
CYFLD_BLE_BLERD_INDX_CODE8__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE8__SIZE
CYFLD_BLE_BLERD_INDX_CODE8__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DSM4
CYREG_BLE_BLERD_DSM4 EQU 0x402e00dc
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE15__OFFSET
CYFLD_BLE_BLERD_INDX_CODE15__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE15__SIZE
CYFLD_BLE_BLERD_INDX_CODE15__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE14__OFFSET
CYFLD_BLE_BLERD_INDX_CODE14__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE14__SIZE
CYFLD_BLE_BLERD_INDX_CODE14__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE13__OFFSET
CYFLD_BLE_BLERD_INDX_CODE13__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE13__SIZE
CYFLD_BLE_BLERD_INDX_CODE13__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE12__OFFSET
CYFLD_BLE_BLERD_INDX_CODE12__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE12__SIZE
CYFLD_BLE_BLERD_INDX_CODE12__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DSM5
CYREG_BLE_BLERD_DSM5 EQU 0x402e00e0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE19__OFFSET
CYFLD_BLE_BLERD_INDX_CODE19__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE19__SIZE
CYFLD_BLE_BLERD_INDX_CODE19__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE18__OFFSET
CYFLD_BLE_BLERD_INDX_CODE18__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE18__SIZE
CYFLD_BLE_BLERD_INDX_CODE18__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE17__OFFSET
CYFLD_BLE_BLERD_INDX_CODE17__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE17__SIZE
CYFLD_BLE_BLERD_INDX_CODE17__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE16__OFFSET
CYFLD_BLE_BLERD_INDX_CODE16__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE16__SIZE
CYFLD_BLE_BLERD_INDX_CODE16__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DSM6
CYREG_BLE_BLERD_DSM6 EQU 0x402e00e4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE23__OFFSET
CYFLD_BLE_BLERD_INDX_CODE23__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE23__SIZE
CYFLD_BLE_BLERD_INDX_CODE23__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE22__OFFSET
CYFLD_BLE_BLERD_INDX_CODE22__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE22__SIZE
CYFLD_BLE_BLERD_INDX_CODE22__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE21__OFFSET
CYFLD_BLE_BLERD_INDX_CODE21__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE21__SIZE
CYFLD_BLE_BLERD_INDX_CODE21__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE20__OFFSET
CYFLD_BLE_BLERD_INDX_CODE20__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_INDX_CODE20__SIZE
CYFLD_BLE_BLERD_INDX_CODE20__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_MONI
CYREG_BLE_BLERD_MONI EQU 0x402e00e8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PUP_SIG__OFFSET
CYFLD_BLE_BLERD_PUP_SIG__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_PUP_SIG__SIZE
CYFLD_BLE_BLERD_PUP_SIG__SIZE EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF_CODE__OFFSET
CYFLD_BLE_BLERD_CBPF_CODE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_CBPF_CODE__SIZE
CYFLD_BLE_BLERD_CBPF_CODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LNA_CODE__OFFSET
CYFLD_BLE_BLERD_LNA_CODE__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_LNA_CODE__SIZE
CYFLD_BLE_BLERD_LNA_CODE__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DBG_BB
CYREG_BLE_BLERD_DBG_BB EQU 0x402e00ec
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_OFFSET_Q_CODE__OFFSET
CYFLD_BLE_BLERD_RX_OFFSET_Q_CODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_OFFSET_Q_CODE__SIZE
CYFLD_BLE_BLERD_RX_OFFSET_Q_CODE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_OFFSET_I_CODE__OFFSET
CYFLD_BLE_BLERD_RX_OFFSET_I_CODE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RX_OFFSET_I_CODE__SIZE
CYFLD_BLE_BLERD_RX_OFFSET_I_CODE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DBG_1
CYREG_BLE_BLERD_DBG_1 EQU 0x402e00f0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_FINE_CODE__OFFSET
CYFLD_BLE_BLERD_FCAL_FINE_CODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_FINE_CODE__SIZE
CYFLD_BLE_BLERD_FCAL_FINE_CODE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_COARSE_CODE__OFFSET
CYFLD_BLE_BLERD_FCAL_COARSE_CODE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_COARSE_CODE__SIZE
CYFLD_BLE_BLERD_FCAL_COARSE_CODE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_DONE__OFFSET
CYFLD_BLE_BLERD_FCAL_DONE__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_DONE__SIZE
CYFLD_BLE_BLERD_FCAL_DONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_KVCAL_DONE__OFFSET
CYFLD_BLE_BLERD_KVCAL_DONE__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_KVCAL_DONE__SIZE
CYFLD_BLE_BLERD_KVCAL_DONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DCCAL_DONE__OFFSET
CYFLD_BLE_BLERD_DCCAL_DONE__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_DCCAL_DONE__SIZE
CYFLD_BLE_BLERD_DCCAL_DONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DBG_2
CYREG_BLE_BLERD_DBG_2 EQU 0x402e00f4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_CNT_LSB__OFFSET
CYFLD_BLE_BLERD_FCAL_CNT_LSB__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_CNT_LSB__SIZE
CYFLD_BLE_BLERD_FCAL_CNT_LSB__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_DBG_3
CYREG_BLE_BLERD_DBG_3 EQU 0x402e00f8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_CNT_MSB__OFFSET
CYFLD_BLE_BLERD_FCAL_CNT_MSB__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_FCAL_CNT_MSB__SIZE
CYFLD_BLE_BLERD_FCAL_CNT_MSB__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RD_RCCAL_CODE__OFFSET
CYFLD_BLE_BLERD_RD_RCCAL_CODE__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RD_RCCAL_CODE__SIZE
CYFLD_BLE_BLERD_RD_RCCAL_CODE__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RD_RCCAL_DONE__OFFSET
CYFLD_BLE_BLERD_RD_RCCAL_DONE__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_RD_RCCAL_DONE__SIZE
CYFLD_BLE_BLERD_RD_RCCAL_DONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_READ_IQ_1
CYREG_BLE_BLERD_READ_IQ_1 EQU 0x402e0100
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_1__OFFSET
CYFLD_BLE_BLERD_ADC_1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_1__SIZE
CYFLD_BLE_BLERD_ADC_1__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_READ_IQ_2
CYREG_BLE_BLERD_READ_IQ_2 EQU 0x402e0104
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_2__OFFSET
CYFLD_BLE_BLERD_ADC_2__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_2__SIZE
CYFLD_BLE_BLERD_ADC_2__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_READ_IQ_3
CYREG_BLE_BLERD_READ_IQ_3 EQU 0x402e0108
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_3__OFFSET
CYFLD_BLE_BLERD_ADC_3__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_3__SIZE
CYFLD_BLE_BLERD_ADC_3__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLERD_READ_IQ_4
CYREG_BLE_BLERD_READ_IQ_4 EQU 0x402e010c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_4__OFFSET
CYFLD_BLE_BLERD_ADC_4__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLERD_ADC_4__SIZE
CYFLD_BLE_BLERD_ADC_4__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYDEV_BLE_BLELL_BASE
CYDEV_BLE_BLELL_BASE EQU 0x402e1000
    ENDIF
    IF :LNOT::DEF:CYDEV_BLE_BLELL_SIZE
CYDEV_BLE_BLELL_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_COMMAND_REGISTER
CYREG_BLE_BLELL_COMMAND_REGISTER EQU 0x402e1000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_COMMAND__OFFSET
CYFLD_BLE_BLELL_COMMAND__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_COMMAND__SIZE
CYFLD_BLE_BLELL_COMMAND__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_EVENT_INTR
CYREG_BLE_BLELL_EVENT_INTR EQU 0x402e1008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_INTR__OFFSET
CYFLD_BLE_BLELL_ADV_INTR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_INTR__SIZE
CYFLD_BLE_BLELL_ADV_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_INTR__OFFSET
CYFLD_BLE_BLELL_SCAN_INTR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_INTR__SIZE
CYFLD_BLE_BLELL_SCAN_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_INTR__OFFSET
CYFLD_BLE_BLELL_INIT_INTR__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_INTR__SIZE
CYFLD_BLE_BLELL_INIT_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_INTR__OFFSET
CYFLD_BLE_BLELL_CONN_INTR__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_INTR__SIZE
CYFLD_BLE_BLELL_CONN_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SM_INTR__OFFSET
CYFLD_BLE_BLELL_SM_INTR__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SM_INTR__SIZE
CYFLD_BLE_BLELL_SM_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DSM_INTR__OFFSET
CYFLD_BLE_BLELL_DSM_INTR__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DSM_INTR__SIZE
CYFLD_BLE_BLELL_DSM_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ENC_INTR__OFFSET
CYFLD_BLE_BLELL_ENC_INTR__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ENC_INTR__SIZE
CYFLD_BLE_BLELL_ENC_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_EVENT_ENABLE
CYREG_BLE_BLELL_EVENT_ENABLE EQU 0x402e1010
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_INT_EN__OFFSET
CYFLD_BLE_BLELL_ADV_INT_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_INT_EN__SIZE
CYFLD_BLE_BLELL_ADV_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_INT_EN__OFFSET
CYFLD_BLE_BLELL_SCN_INT_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_INT_EN__SIZE
CYFLD_BLE_BLELL_SCN_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_INT_EN__OFFSET
CYFLD_BLE_BLELL_INIT_INT_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_INT_EN__SIZE
CYFLD_BLE_BLELL_INIT_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_INT_EN__OFFSET
CYFLD_BLE_BLELL_CONN_INT_EN__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_INT_EN__SIZE
CYFLD_BLE_BLELL_CONN_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SM_INT_EN__OFFSET
CYFLD_BLE_BLELL_SM_INT_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SM_INT_EN__SIZE
CYFLD_BLE_BLELL_SM_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DSM_INT_EN__OFFSET
CYFLD_BLE_BLELL_DSM_INT_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DSM_INT_EN__SIZE
CYFLD_BLE_BLELL_DSM_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ENC_INT_EN__OFFSET
CYFLD_BLE_BLELL_ENC_INT_EN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ENC_INT_EN__SIZE
CYFLD_BLE_BLELL_ENC_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ADV_PARAMS
CYREG_BLE_BLELL_ADV_PARAMS EQU 0x402e1018
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_ADDR__OFFSET
CYFLD_BLE_BLELL_TX_ADDR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_ADDR__SIZE
CYFLD_BLE_BLELL_TX_ADDR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TYPE__OFFSET
CYFLD_BLE_BLELL_ADV_TYPE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TYPE__SIZE
CYFLD_BLE_BLELL_ADV_TYPE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_FILT_POLICY__OFFSET
CYFLD_BLE_BLELL_ADV_FILT_POLICY__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_FILT_POLICY__SIZE
CYFLD_BLE_BLELL_ADV_FILT_POLICY__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CHANNEL_MAP__OFFSET
CYFLD_BLE_BLELL_ADV_CHANNEL_MAP__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CHANNEL_MAP__SIZE
CYFLD_BLE_BLELL_ADV_CHANNEL_MAP__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_ADDR__OFFSET
CYFLD_BLE_BLELL_RX_ADDR__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_ADDR__SIZE
CYFLD_BLE_BLELL_RX_ADDR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_LOW_DUTY_CYCLE__OFFSET
CYFLD_BLE_BLELL_ADV_LOW_DUTY_CYCLE__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_LOW_DUTY_CYCLE__SIZE
CYFLD_BLE_BLELL_ADV_LOW_DUTY_CYCLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RCV_TX_ADDR__OFFSET
CYFLD_BLE_BLELL_RCV_TX_ADDR__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RCV_TX_ADDR__SIZE
CYFLD_BLE_BLELL_RCV_TX_ADDR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ADV_INTERVAL_TIMEOUT
CYREG_BLE_BLELL_ADV_INTERVAL_TIMEOUT EQU 0x402e101c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_INTERVAL__OFFSET
CYFLD_BLE_BLELL_ADV_INTERVAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_INTERVAL__SIZE
CYFLD_BLE_BLELL_ADV_INTERVAL__SIZE EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ADV_INTR
CYREG_BLE_BLELL_ADV_INTR EQU 0x402e1020
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_STRT_INTR__OFFSET
CYFLD_BLE_BLELL_ADV_STRT_INTR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_STRT_INTR__SIZE
CYFLD_BLE_BLELL_ADV_STRT_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CLOSE_INTR__OFFSET
CYFLD_BLE_BLELL_ADV_CLOSE_INTR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CLOSE_INTR__SIZE
CYFLD_BLE_BLELL_ADV_CLOSE_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TX_INTR__OFFSET
CYFLD_BLE_BLELL_ADV_TX_INTR__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TX_INTR__SIZE
CYFLD_BLE_BLELL_ADV_TX_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_RSP_TX_INTR__OFFSET
CYFLD_BLE_BLELL_SCAN_RSP_TX_INTR__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_RSP_TX_INTR__SIZE
CYFLD_BLE_BLELL_SCAN_RSP_TX_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_REQ_RX_INTR__OFFSET
CYFLD_BLE_BLELL_SCAN_REQ_RX_INTR__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_REQ_RX_INTR__SIZE
CYFLD_BLE_BLELL_SCAN_REQ_RX_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_REQ_RX_INTR__OFFSET
CYFLD_BLE_BLELL_CONN_REQ_RX_INTR__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_REQ_RX_INTR__SIZE
CYFLD_BLE_BLELL_CONN_REQ_RX_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLV_CONNECTED__OFFSET
CYFLD_BLE_BLELL_SLV_CONNECTED__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLV_CONNECTED__SIZE
CYFLD_BLE_BLELL_SLV_CONNECTED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TIMEOUT__OFFSET
CYFLD_BLE_BLELL_ADV_TIMEOUT__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TIMEOUT__SIZE
CYFLD_BLE_BLELL_ADV_TIMEOUT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_ON__OFFSET
CYFLD_BLE_BLELL_ADV_ON__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_ON__SIZE
CYFLD_BLE_BLELL_ADV_ON__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ADV_NEXT_INSTANT
CYREG_BLE_BLELL_ADV_NEXT_INSTANT EQU 0x402e1024
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_NEXT_INSTANT__OFFSET
CYFLD_BLE_BLELL_ADV_NEXT_INSTANT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_NEXT_INSTANT__SIZE
CYFLD_BLE_BLELL_ADV_NEXT_INSTANT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SCAN_INTERVAL
CYREG_BLE_BLELL_SCAN_INTERVAL EQU 0x402e1028
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_INTERVAL__OFFSET
CYFLD_BLE_BLELL_SCAN_INTERVAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_INTERVAL__SIZE
CYFLD_BLE_BLELL_SCAN_INTERVAL__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SCAN_WINDOW
CYREG_BLE_BLELL_SCAN_WINDOW EQU 0x402e102c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_WINDOW__OFFSET
CYFLD_BLE_BLELL_SCAN_WINDOW__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_WINDOW__SIZE
CYFLD_BLE_BLELL_SCAN_WINDOW__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SCAN_PARAM
CYREG_BLE_BLELL_SCAN_PARAM EQU 0x402e1030
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_TYPE__OFFSET
CYFLD_BLE_BLELL_SCAN_TYPE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_TYPE__SIZE
CYFLD_BLE_BLELL_SCAN_TYPE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_FILT_POLICY__OFFSET
CYFLD_BLE_BLELL_SCAN_FILT_POLICY__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_FILT_POLICY__SIZE
CYFLD_BLE_BLELL_SCAN_FILT_POLICY__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DUP_FILT_EN__OFFSET
CYFLD_BLE_BLELL_DUP_FILT_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DUP_FILT_EN__SIZE
CYFLD_BLE_BLELL_DUP_FILT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SCAN_INTR
CYREG_BLE_BLELL_SCAN_INTR EQU 0x402e1038
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_STRT_INTR__OFFSET
CYFLD_BLE_BLELL_SCAN_STRT_INTR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_STRT_INTR__SIZE
CYFLD_BLE_BLELL_SCAN_STRT_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_CLOSE_INTR__OFFSET
CYFLD_BLE_BLELL_SCAN_CLOSE_INTR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_CLOSE_INTR__SIZE
CYFLD_BLE_BLELL_SCAN_CLOSE_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_TX_INTR__OFFSET
CYFLD_BLE_BLELL_SCAN_TX_INTR__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_TX_INTR__SIZE
CYFLD_BLE_BLELL_SCAN_TX_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_RX_INTR__OFFSET
CYFLD_BLE_BLELL_ADV_RX_INTR__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_RX_INTR__SIZE
CYFLD_BLE_BLELL_ADV_RX_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_RSP_RX_INTR__OFFSET
CYFLD_BLE_BLELL_SCAN_RSP_RX_INTR__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_RSP_RX_INTR__SIZE
CYFLD_BLE_BLELL_SCAN_RSP_RX_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_ON__OFFSET
CYFLD_BLE_BLELL_SCAN_ON__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_ON__SIZE
CYFLD_BLE_BLELL_SCAN_ON__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SCAN_NEXT_INSTANT
CYREG_BLE_BLELL_SCAN_NEXT_INSTANT EQU 0x402e103c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_NEXT_SCAN_INSTANT__OFFSET
CYFLD_BLE_BLELL_NEXT_SCAN_INSTANT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_NEXT_SCAN_INSTANT__SIZE
CYFLD_BLE_BLELL_NEXT_SCAN_INSTANT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_INIT_INTERVAL
CYREG_BLE_BLELL_INIT_INTERVAL EQU 0x402e1040
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_SCAN_INTERVAL__OFFSET
CYFLD_BLE_BLELL_INIT_SCAN_INTERVAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_SCAN_INTERVAL__SIZE
CYFLD_BLE_BLELL_INIT_SCAN_INTERVAL__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_INIT_WINDOW
CYREG_BLE_BLELL_INIT_WINDOW EQU 0x402e1044
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_SCAN_WINDOW__OFFSET
CYFLD_BLE_BLELL_INIT_SCAN_WINDOW__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_SCAN_WINDOW__SIZE
CYFLD_BLE_BLELL_INIT_SCAN_WINDOW__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_INIT_PARAM
CYREG_BLE_BLELL_INIT_PARAM EQU 0x402e1048
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_ADDR__RX_TX_ADDR__OFFSET
CYFLD_BLE_BLELL_RX_ADDR__RX_TX_ADDR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_ADDR__RX_TX_ADDR__SIZE
CYFLD_BLE_BLELL_RX_ADDR__RX_TX_ADDR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_FILT_POLICY__OFFSET
CYFLD_BLE_BLELL_INIT_FILT_POLICY__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_FILT_POLICY__SIZE
CYFLD_BLE_BLELL_INIT_FILT_POLICY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_INIT_INTR
CYREG_BLE_BLELL_INIT_INTR EQU 0x402e1050
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_INTERVAL_EXPIRE_INTR__OFFSET
CYFLD_BLE_BLELL_INIT_INTERVAL_EXPIRE_INTR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_INTERVAL_EXPIRE_INTR__SIZE
CYFLD_BLE_BLELL_INIT_INTERVAL_EXPIRE_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_CLOSE_WINDOW_INR__OFFSET
CYFLD_BLE_BLELL_INIT_CLOSE_WINDOW_INR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_CLOSE_WINDOW_INR__SIZE
CYFLD_BLE_BLELL_INIT_CLOSE_WINDOW_INR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_TX_START_INTR__OFFSET
CYFLD_BLE_BLELL_INIT_TX_START_INTR__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_TX_START_INTR__SIZE
CYFLD_BLE_BLELL_INIT_TX_START_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MASTER_CONN_CREATED__OFFSET
CYFLD_BLE_BLELL_MASTER_CONN_CREATED__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MASTER_CONN_CREATED__SIZE
CYFLD_BLE_BLELL_MASTER_CONN_CREATED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_INIT_NEXT_INSTANT
CYREG_BLE_BLELL_INIT_NEXT_INSTANT EQU 0x402e1054
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_NEXT_INSTANT__OFFSET
CYFLD_BLE_BLELL_INIT_NEXT_INSTANT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_NEXT_INSTANT__SIZE
CYFLD_BLE_BLELL_INIT_NEXT_INSTANT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DEVICE_RAND_ADDR_L
CYREG_BLE_BLELL_DEVICE_RAND_ADDR_L EQU 0x402e1058
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_L__OFFSET
CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_L__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_L__SIZE
CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_L__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DEVICE_RAND_ADDR_M
CYREG_BLE_BLELL_DEVICE_RAND_ADDR_M EQU 0x402e105c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_M__OFFSET
CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_M__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_M__SIZE
CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_M__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DEVICE_RAND_ADDR_H
CYREG_BLE_BLELL_DEVICE_RAND_ADDR_H EQU 0x402e1060
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_H__OFFSET
CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_H__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_H__SIZE
CYFLD_BLE_BLELL_DEVICE_RAND_ADDR_H__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_PEER_ADDR_L
CYREG_BLE_BLELL_PEER_ADDR_L EQU 0x402e1068
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PEER_ADDR_L__OFFSET
CYFLD_BLE_BLELL_PEER_ADDR_L__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PEER_ADDR_L__SIZE
CYFLD_BLE_BLELL_PEER_ADDR_L__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_PEER_ADDR_M
CYREG_BLE_BLELL_PEER_ADDR_M EQU 0x402e106c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PEER_ADDR_M__OFFSET
CYFLD_BLE_BLELL_PEER_ADDR_M__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PEER_ADDR_M__SIZE
CYFLD_BLE_BLELL_PEER_ADDR_M__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_PEER_ADDR_H
CYREG_BLE_BLELL_PEER_ADDR_H EQU 0x402e1070
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PEER_ADDR_H__OFFSET
CYFLD_BLE_BLELL_PEER_ADDR_H__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PEER_ADDR_H__SIZE
CYFLD_BLE_BLELL_PEER_ADDR_H__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_WL_ADDR_TYPE
CYREG_BLE_BLELL_WL_ADDR_TYPE EQU 0x402e1078
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WL_ADDR_TYPE__OFFSET
CYFLD_BLE_BLELL_WL_ADDR_TYPE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WL_ADDR_TYPE__SIZE
CYFLD_BLE_BLELL_WL_ADDR_TYPE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_WL_ENABLE
CYREG_BLE_BLELL_WL_ENABLE EQU 0x402e107c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WL_ENABLE__OFFSET
CYFLD_BLE_BLELL_WL_ENABLE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WL_ENABLE__SIZE
CYFLD_BLE_BLELL_WL_ENABLE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_TRANSMIT_WINDOW_OFFSET
CYREG_BLE_BLELL_TRANSMIT_WINDOW_OFFSET EQU 0x402e1080
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_WINDOW_OFFSET__OFFSET
CYFLD_BLE_BLELL_TX_WINDOW_OFFSET__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_WINDOW_OFFSET__SIZE
CYFLD_BLE_BLELL_TX_WINDOW_OFFSET__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_TRANSMIT_WINDOW_SIZE
CYREG_BLE_BLELL_TRANSMIT_WINDOW_SIZE EQU 0x402e1084
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_WINDOW_SIZE__OFFSET
CYFLD_BLE_BLELL_TX_WINDOW_SIZE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_WINDOW_SIZE__SIZE
CYFLD_BLE_BLELL_TX_WINDOW_SIZE__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_CHANNELS_L0
CYREG_BLE_BLELL_DATA_CHANNELS_L0 EQU 0x402e1088
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_L0__OFFSET
CYFLD_BLE_BLELL_DATA_CHANNELS_L0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_L0__SIZE
CYFLD_BLE_BLELL_DATA_CHANNELS_L0__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_CHANNELS_M0
CYREG_BLE_BLELL_DATA_CHANNELS_M0 EQU 0x402e108c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_M0__OFFSET
CYFLD_BLE_BLELL_DATA_CHANNELS_M0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_M0__SIZE
CYFLD_BLE_BLELL_DATA_CHANNELS_M0__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_CHANNELS_H0
CYREG_BLE_BLELL_DATA_CHANNELS_H0 EQU 0x402e1090
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_H0__OFFSET
CYFLD_BLE_BLELL_DATA_CHANNELS_H0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_H0__SIZE
CYFLD_BLE_BLELL_DATA_CHANNELS_H0__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_CHANNELS_L1
CYREG_BLE_BLELL_DATA_CHANNELS_L1 EQU 0x402e1098
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_L1__OFFSET
CYFLD_BLE_BLELL_DATA_CHANNELS_L1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_L1__SIZE
CYFLD_BLE_BLELL_DATA_CHANNELS_L1__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_CHANNELS_M1
CYREG_BLE_BLELL_DATA_CHANNELS_M1 EQU 0x402e109c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_M1__OFFSET
CYFLD_BLE_BLELL_DATA_CHANNELS_M1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_M1__SIZE
CYFLD_BLE_BLELL_DATA_CHANNELS_M1__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_CHANNELS_H1
CYREG_BLE_BLELL_DATA_CHANNELS_H1 EQU 0x402e10a0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_H1__OFFSET
CYFLD_BLE_BLELL_DATA_CHANNELS_H1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_H1__SIZE
CYFLD_BLE_BLELL_DATA_CHANNELS_H1__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_INTR
CYREG_BLE_BLELL_CONN_INTR EQU 0x402e10a8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_CLOSED__OFFSET
CYFLD_BLE_BLELL_CONN_CLOSED__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_CLOSED__SIZE
CYFLD_BLE_BLELL_CONN_CLOSED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_ESTB__OFFSET
CYFLD_BLE_BLELL_CONN_ESTB__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_ESTB__SIZE
CYFLD_BLE_BLELL_CONN_ESTB__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MAP_UPDT_DONE__OFFSET
CYFLD_BLE_BLELL_MAP_UPDT_DONE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MAP_UPDT_DONE__SIZE
CYFLD_BLE_BLELL_MAP_UPDT_DONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_START_CE__OFFSET
CYFLD_BLE_BLELL_START_CE__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_START_CE__SIZE
CYFLD_BLE_BLELL_START_CE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CLOSE_CE__OFFSET
CYFLD_BLE_BLELL_CLOSE_CE__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CLOSE_CE__SIZE
CYFLD_BLE_BLELL_CLOSE_CE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_TX_ACK__OFFSET
CYFLD_BLE_BLELL_CE_TX_ACK__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_TX_ACK__SIZE
CYFLD_BLE_BLELL_CE_TX_ACK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_RX__OFFSET
CYFLD_BLE_BLELL_CE_RX__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_RX__SIZE
CYFLD_BLE_BLELL_CE_RX__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CON_UPDT_DONE__OFFSET
CYFLD_BLE_BLELL_CON_UPDT_DONE__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CON_UPDT_DONE__SIZE
CYFLD_BLE_BLELL_CON_UPDT_DONE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DISCON_STATUS__OFFSET
CYFLD_BLE_BLELL_DISCON_STATUS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DISCON_STATUS__SIZE
CYFLD_BLE_BLELL_DISCON_STATUS__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_PDU_STATUS__OFFSET
CYFLD_BLE_BLELL_RX_PDU_STATUS__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_PDU_STATUS__SIZE
CYFLD_BLE_BLELL_RX_PDU_STATUS__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PING_TIMER_EXPIRD_INTR__OFFSET
CYFLD_BLE_BLELL_PING_TIMER_EXPIRD_INTR__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PING_TIMER_EXPIRD_INTR__SIZE
CYFLD_BLE_BLELL_PING_TIMER_EXPIRD_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PING_NEARLY_EXPIRD_INTR__OFFSET
CYFLD_BLE_BLELL_PING_NEARLY_EXPIRD_INTR__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PING_NEARLY_EXPIRD_INTR__SIZE
CYFLD_BLE_BLELL_PING_NEARLY_EXPIRD_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_STATUS
CYREG_BLE_BLELL_CONN_STATUS EQU 0x402e10ac
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RECEIVE_PACKET_COUNT__OFFSET
CYFLD_BLE_BLELL_RECEIVE_PACKET_COUNT__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RECEIVE_PACKET_COUNT__SIZE
CYFLD_BLE_BLELL_RECEIVE_PACKET_COUNT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_INDEX
CYREG_BLE_BLELL_CONN_INDEX EQU 0x402e10b0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_INDEX__OFFSET
CYFLD_BLE_BLELL_CONN_INDEX__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_INDEX__SIZE
CYFLD_BLE_BLELL_CONN_INDEX__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_WAKEUP_CONFIG
CYREG_BLE_BLELL_WAKEUP_CONFIG EQU 0x402e10b8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_OSC_STARTUP_DELAY__OFFSET
CYFLD_BLE_BLELL_OSC_STARTUP_DELAY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_OSC_STARTUP_DELAY__SIZE
CYFLD_BLE_BLELL_OSC_STARTUP_DELAY__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DSM_OFFSET_TO_WAKEUP_INSTANT__OFFSET
CYFLD_BLE_BLELL_DSM_OFFSET_TO_WAKEUP_INSTANT__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DSM_OFFSET_TO_WAKEUP_INSTANT__SIZE
CYFLD_BLE_BLELL_DSM_OFFSET_TO_WAKEUP_INSTANT__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_WAKEUP_CONTROL
CYREG_BLE_BLELL_WAKEUP_CONTROL EQU 0x402e10c0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WAKEUP_INSTANT__OFFSET
CYFLD_BLE_BLELL_WAKEUP_INSTANT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WAKEUP_INSTANT__SIZE
CYFLD_BLE_BLELL_WAKEUP_INSTANT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CLOCK_CONFIG
CYREG_BLE_BLELL_CLOCK_CONFIG EQU 0x402e10c4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CLK_GATE_EN__OFFSET
CYFLD_BLE_BLELL_ADV_CLK_GATE_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CLK_GATE_EN__SIZE
CYFLD_BLE_BLELL_ADV_CLK_GATE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_CLK_GATE_EN__OFFSET
CYFLD_BLE_BLELL_SCAN_CLK_GATE_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_CLK_GATE_EN__SIZE
CYFLD_BLE_BLELL_SCAN_CLK_GATE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_CLK_GATE_EN__OFFSET
CYFLD_BLE_BLELL_INIT_CLK_GATE_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_CLK_GATE_EN__SIZE
CYFLD_BLE_BLELL_INIT_CLK_GATE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_CLK_GATE_EN__OFFSET
CYFLD_BLE_BLELL_CONN_CLK_GATE_EN__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_CLK_GATE_EN__SIZE
CYFLD_BLE_BLELL_CONN_CLK_GATE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CORECLK_GATE_EN__OFFSET
CYFLD_BLE_BLELL_CORECLK_GATE_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CORECLK_GATE_EN__SIZE
CYFLD_BLE_BLELL_CORECLK_GATE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SYSCLK_GATE_EN__OFFSET
CYFLD_BLE_BLELL_SYSCLK_GATE_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SYSCLK_GATE_EN__SIZE
CYFLD_BLE_BLELL_SYSCLK_GATE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PHY_CLK_GATE_EN__OFFSET
CYFLD_BLE_BLELL_PHY_CLK_GATE_EN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PHY_CLK_GATE_EN__SIZE
CYFLD_BLE_BLELL_PHY_CLK_GATE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LLH_IDLE__OFFSET
CYFLD_BLE_BLELL_LLH_IDLE__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LLH_IDLE__SIZE
CYFLD_BLE_BLELL_LLH_IDLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LPO_CLK_FREQ_SEL__OFFSET
CYFLD_BLE_BLELL_LPO_CLK_FREQ_SEL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LPO_CLK_FREQ_SEL__SIZE
CYFLD_BLE_BLELL_LPO_CLK_FREQ_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LPO_SEL_EXTERNAL__OFFSET
CYFLD_BLE_BLELL_LPO_SEL_EXTERNAL__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LPO_SEL_EXTERNAL__SIZE
CYFLD_BLE_BLELL_LPO_SEL_EXTERNAL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SM_AUTO_WKUP_EN__OFFSET
CYFLD_BLE_BLELL_SM_AUTO_WKUP_EN__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SM_AUTO_WKUP_EN__SIZE
CYFLD_BLE_BLELL_SM_AUTO_WKUP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SM_INTR_EN__OFFSET
CYFLD_BLE_BLELL_SM_INTR_EN__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SM_INTR_EN__SIZE
CYFLD_BLE_BLELL_SM_INTR_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLEEP_MODE_EN__OFFSET
CYFLD_BLE_BLELL_SLEEP_MODE_EN__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLEEP_MODE_EN__SIZE
CYFLD_BLE_BLELL_SLEEP_MODE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEEP_SLEEP_MODE_EN__OFFSET
CYFLD_BLE_BLELL_DEEP_SLEEP_MODE_EN__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEEP_SLEEP_MODE_EN__SIZE
CYFLD_BLE_BLELL_DEEP_SLEEP_MODE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_TIM_COUNTER_L
CYREG_BLE_BLELL_TIM_COUNTER_L EQU 0x402e10c8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TIM_REF_CLOCK__OFFSET
CYFLD_BLE_BLELL_TIM_REF_CLOCK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TIM_REF_CLOCK__SIZE
CYFLD_BLE_BLELL_TIM_REF_CLOCK__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_POC_REG__TIM_CONTROL
CYREG_BLE_BLELL_POC_REG__TIM_CONTROL EQU 0x402e10d8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_BB_CLK_FREQ_MINUS_1__OFFSET
CYFLD_BLE_BLELL_BB_CLK_FREQ_MINUS_1__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_BB_CLK_FREQ_MINUS_1__SIZE
CYFLD_BLE_BLELL_BB_CLK_FREQ_MINUS_1__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ADV_TX_DATA_FIFO
CYREG_BLE_BLELL_ADV_TX_DATA_FIFO EQU 0x402e10e0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TX_DATA__OFFSET
CYFLD_BLE_BLELL_ADV_TX_DATA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TX_DATA__SIZE
CYFLD_BLE_BLELL_ADV_TX_DATA__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ADV_SCN_RSP_TX_FIFO
CYREG_BLE_BLELL_ADV_SCN_RSP_TX_FIFO EQU 0x402e10e8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_RSP_DATA__OFFSET
CYFLD_BLE_BLELL_SCAN_RSP_DATA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_RSP_DATA__SIZE
CYFLD_BLE_BLELL_SCAN_RSP_DATA__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_INIT_SCN_ADV_RX_FIFO
CYREG_BLE_BLELL_INIT_SCN_ADV_RX_FIFO EQU 0x402e10f8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_SCAN_RSP_RX_DATA__OFFSET
CYFLD_BLE_BLELL_ADV_SCAN_RSP_RX_DATA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_SCAN_RSP_RX_DATA__SIZE
CYFLD_BLE_BLELL_ADV_SCAN_RSP_RX_DATA__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_INTERVAL
CYREG_BLE_BLELL_CONN_INTERVAL EQU 0x402e1100
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNECTION_INTERVAL__OFFSET
CYFLD_BLE_BLELL_CONNECTION_INTERVAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNECTION_INTERVAL__SIZE
CYFLD_BLE_BLELL_CONNECTION_INTERVAL__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SUP_TIMEOUT
CYREG_BLE_BLELL_SUP_TIMEOUT EQU 0x402e1104
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SUPERVISION_TIMEOUT__OFFSET
CYFLD_BLE_BLELL_SUPERVISION_TIMEOUT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SUPERVISION_TIMEOUT__SIZE
CYFLD_BLE_BLELL_SUPERVISION_TIMEOUT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SLAVE_LATENCY
CYREG_BLE_BLELL_SLAVE_LATENCY EQU 0x402e1108
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLAVE_LATENCY__OFFSET
CYFLD_BLE_BLELL_SLAVE_LATENCY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLAVE_LATENCY__SIZE
CYFLD_BLE_BLELL_SLAVE_LATENCY__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CE_LENGTH
CYREG_BLE_BLELL_CE_LENGTH EQU 0x402e110c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNECTION_EVENT_LENGTH__OFFSET
CYFLD_BLE_BLELL_CONNECTION_EVENT_LENGTH__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNECTION_EVENT_LENGTH__SIZE
CYFLD_BLE_BLELL_CONNECTION_EVENT_LENGTH__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_PDU_ACCESS_ADDR_L_REGISTER
CYREG_BLE_BLELL_PDU_ACCESS_ADDR_L_REGISTER EQU 0x402e1110
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PDU_ACCESS_ADDRESS_LOWER_BITS__OFFSET
CYFLD_BLE_BLELL_PDU_ACCESS_ADDRESS_LOWER_BITS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PDU_ACCESS_ADDRESS_LOWER_BITS__SIZE
CYFLD_BLE_BLELL_PDU_ACCESS_ADDRESS_LOWER_BITS__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_PDU_ACCESS_ADDR_H_REGISTER
CYREG_BLE_BLELL_PDU_ACCESS_ADDR_H_REGISTER EQU 0x402e1114
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PDU_ACCESS_ADDRESS_HIGHER_BITS__OFFSET
CYFLD_BLE_BLELL_PDU_ACCESS_ADDRESS_HIGHER_BITS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PDU_ACCESS_ADDRESS_HIGHER_BITS__SIZE
CYFLD_BLE_BLELL_PDU_ACCESS_ADDRESS_HIGHER_BITS__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_CE_INSTANT
CYREG_BLE_BLELL_CONN_CE_INSTANT EQU 0x402e1118
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_INSTANT__OFFSET
CYFLD_BLE_BLELL_CE_INSTANT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_INSTANT__SIZE
CYFLD_BLE_BLELL_CE_INSTANT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CE_CNFG_STS_REGISTER
CYREG_BLE_BLELL_CE_CNFG_STS_REGISTER EQU 0x402e111c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_LIST_INDEX_LAST_ACK_INDEX__OFFSET
CYFLD_BLE_BLELL_DATA_LIST_INDEX_LAST_ACK_INDEX__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_LIST_INDEX_LAST_ACK_INDEX__SIZE
CYFLD_BLE_BLELL_DATA_LIST_INDEX_LAST_ACK_INDEX__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_LIST_HEAD_UP__OFFSET
CYFLD_BLE_BLELL_DATA_LIST_HEAD_UP__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_LIST_HEAD_UP__SIZE
CYFLD_BLE_BLELL_DATA_LIST_HEAD_UP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MAS_SLV__OFFSET
CYFLD_BLE_BLELL_MAS_SLV__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MAS_SLV__SIZE
CYFLD_BLE_BLELL_MAS_SLV__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MD__OFFSET
CYFLD_BLE_BLELL_MD__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MD__SIZE
CYFLD_BLE_BLELL_MD__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MAP_INDEX__CURR_INDEX__OFFSET
CYFLD_BLE_BLELL_MAP_INDEX__CURR_INDEX__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MAP_INDEX__CURR_INDEX__SIZE
CYFLD_BLE_BLELL_MAP_INDEX__CURR_INDEX__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PAUSE_DATA__OFFSET
CYFLD_BLE_BLELL_PAUSE_DATA__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PAUSE_DATA__SIZE
CYFLD_BLE_BLELL_PAUSE_DATA__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_ACTIVE__OFFSET
CYFLD_BLE_BLELL_CONN_ACTIVE__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_ACTIVE__SIZE
CYFLD_BLE_BLELL_CONN_ACTIVE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CURRENT_PDU_INDEX__OFFSET
CYFLD_BLE_BLELL_CURRENT_PDU_INDEX__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CURRENT_PDU_INDEX__SIZE
CYFLD_BLE_BLELL_CURRENT_PDU_INDEX__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_NEXT_CE_INSTANT
CYREG_BLE_BLELL_NEXT_CE_INSTANT EQU 0x402e1120
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_NEXT_CE_INSTANT__OFFSET
CYFLD_BLE_BLELL_NEXT_CE_INSTANT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_NEXT_CE_INSTANT__SIZE
CYFLD_BLE_BLELL_NEXT_CE_INSTANT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_CE_COUNTER
CYREG_BLE_BLELL_CONN_CE_COUNTER EQU 0x402e1124
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNECTION_EVENT_COUNTER__OFFSET
CYFLD_BLE_BLELL_CONNECTION_EVENT_COUNTER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNECTION_EVENT_COUNTER__SIZE
CYFLD_BLE_BLELL_CONNECTION_EVENT_COUNTER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_LIST_SENT_UPDATE__STATUS
CYREG_BLE_BLELL_DATA_LIST_SENT_UPDATE__STATUS EQU 0x402e1128
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LIST_INDEX__TX_SENT_3_0__OFFSET
CYFLD_BLE_BLELL_LIST_INDEX__TX_SENT_3_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LIST_INDEX__TX_SENT_3_0__SIZE
CYFLD_BLE_BLELL_LIST_INDEX__TX_SENT_3_0__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_SENT_4__OFFSET
CYFLD_BLE_BLELL_TX_SENT_4__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_SENT_4__SIZE
CYFLD_BLE_BLELL_TX_SENT_4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SET_CLEAR__OFFSET
CYFLD_BLE_BLELL_SET_CLEAR__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SET_CLEAR__SIZE
CYFLD_BLE_BLELL_SET_CLEAR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_LIST_ACK_UPDATE__STATUS
CYREG_BLE_BLELL_DATA_LIST_ACK_UPDATE__STATUS EQU 0x402e112c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LIST_INDEX__TX_ACK_3_0__OFFSET
CYFLD_BLE_BLELL_LIST_INDEX__TX_ACK_3_0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LIST_INDEX__TX_ACK_3_0__SIZE
CYFLD_BLE_BLELL_LIST_INDEX__TX_ACK_3_0__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_ACK_4__OFFSET
CYFLD_BLE_BLELL_TX_ACK_4__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_ACK_4__SIZE
CYFLD_BLE_BLELL_TX_ACK_4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR0
CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR0 EQU 0x402e1140
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LLID__OFFSET
CYFLD_BLE_BLELL_LLID__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_LLID__SIZE
CYFLD_BLE_BLELL_LLID__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_LENGTH__OFFSET
CYFLD_BLE_BLELL_DATA_LENGTH__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_LENGTH__SIZE
CYFLD_BLE_BLELL_DATA_LENGTH__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR1
CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR1 EQU 0x402e1144
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR2
CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR2 EQU 0x402e1148
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR3
CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR3 EQU 0x402e114c
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR4
CYREG_BLE_BLELL_DATA_MEM_DESCRIPTOR4 EQU 0x402e1150
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_WINDOW_WIDEN_INTVL
CYREG_BLE_BLELL_WINDOW_WIDEN_INTVL EQU 0x402e1160
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WINDOW_WIDEN_INTVL__OFFSET
CYFLD_BLE_BLELL_WINDOW_WIDEN_INTVL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WINDOW_WIDEN_INTVL__SIZE
CYFLD_BLE_BLELL_WINDOW_WIDEN_INTVL__SIZE EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_WINDOW_WIDEN_WINOFF
CYREG_BLE_BLELL_WINDOW_WIDEN_WINOFF EQU 0x402e1164
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WINDOW_WIDEN_WINOFF__OFFSET
CYFLD_BLE_BLELL_WINDOW_WIDEN_WINOFF__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WINDOW_WIDEN_WINOFF__SIZE
CYFLD_BLE_BLELL_WINDOW_WIDEN_WINOFF__SIZE EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_LE_RF_TEST_MODE
CYREG_BLE_BLELL_LE_RF_TEST_MODE EQU 0x402e1170
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TEST_FREQUENCY__OFFSET
CYFLD_BLE_BLELL_TEST_FREQUENCY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TEST_FREQUENCY__SIZE
CYFLD_BLE_BLELL_TEST_FREQUENCY__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TEST_TYPE__OFFSET
CYFLD_BLE_BLELL_TEST_TYPE__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TEST_TYPE__SIZE
CYFLD_BLE_BLELL_TEST_TYPE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PKT_PAYLOAD__OFFSET
CYFLD_BLE_BLELL_PKT_PAYLOAD__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PKT_PAYLOAD__SIZE
CYFLD_BLE_BLELL_PKT_PAYLOAD__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TEST_LENGTH__OFFSET
CYFLD_BLE_BLELL_TEST_LENGTH__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TEST_LENGTH__SIZE
CYFLD_BLE_BLELL_TEST_LENGTH__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DTM_RX_PKT_COUNT
CYREG_BLE_BLELL_DTM_RX_PKT_COUNT EQU 0x402e1174
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_PACKET_COUNT__OFFSET
CYFLD_BLE_BLELL_RX_PACKET_COUNT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_PACKET_COUNT__SIZE
CYFLD_BLE_BLELL_RX_PACKET_COUNT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_TXRX_HOP
CYREG_BLE_BLELL_TXRX_HOP EQU 0x402e1188
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_HOP_CH_TX__OFFSET
CYFLD_BLE_BLELL_HOP_CH_TX__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_HOP_CH_TX__SIZE
CYFLD_BLE_BLELL_HOP_CH_TX__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_HOP_CH_RX__OFFSET
CYFLD_BLE_BLELL_HOP_CH_RX__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_HOP_CH_RX__SIZE
CYFLD_BLE_BLELL_HOP_CH_RX__SIZE EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_TX_RX_ON_DELAY
CYREG_BLE_BLELL_TX_RX_ON_DELAY EQU 0x402e1190
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RXON_DELAY__OFFSET
CYFLD_BLE_BLELL_RXON_DELAY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RXON_DELAY__SIZE
CYFLD_BLE_BLELL_RXON_DELAY__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TXON_DELAY__OFFSET
CYFLD_BLE_BLELL_TXON_DELAY__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TXON_DELAY__SIZE
CYFLD_BLE_BLELL_TXON_DELAY__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DEV_PUB_ADDR_L
CYREG_BLE_BLELL_DEV_PUB_ADDR_L EQU 0x402e11c0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEV_PUB_ADDR_L__OFFSET
CYFLD_BLE_BLELL_DEV_PUB_ADDR_L__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEV_PUB_ADDR_L__SIZE
CYFLD_BLE_BLELL_DEV_PUB_ADDR_L__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DEV_PUB_ADDR_M
CYREG_BLE_BLELL_DEV_PUB_ADDR_M EQU 0x402e11c4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEV_PUB_ADDR_M__OFFSET
CYFLD_BLE_BLELL_DEV_PUB_ADDR_M__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEV_PUB_ADDR_M__SIZE
CYFLD_BLE_BLELL_DEV_PUB_ADDR_M__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DEV_PUB_ADDR_H
CYREG_BLE_BLELL_DEV_PUB_ADDR_H EQU 0x402e11c8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEV_PUB_ADDR_H__OFFSET
CYFLD_BLE_BLELL_DEV_PUB_ADDR_H__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEV_PUB_ADDR_H__SIZE
CYFLD_BLE_BLELL_DEV_PUB_ADDR_H__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ADV_CH_TX_POWER
CYREG_BLE_BLELL_ADV_CH_TX_POWER EQU 0x402e11cc
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TRANSMIT_POWER__OFFSET
CYFLD_BLE_BLELL_ADV_TRANSMIT_POWER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TRANSMIT_POWER__SIZE
CYFLD_BLE_BLELL_ADV_TRANSMIT_POWER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_OFFSET_TO_FIRST_INSTANT
CYREG_BLE_BLELL_OFFSET_TO_FIRST_INSTANT EQU 0x402e11d0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_OFFSET_TO_FIRST_EVENT__OFFSET
CYFLD_BLE_BLELL_OFFSET_TO_FIRST_EVENT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_OFFSET_TO_FIRST_EVENT__SIZE
CYFLD_BLE_BLELL_OFFSET_TO_FIRST_EVENT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ADV_CONFIG
CYREG_BLE_BLELL_ADV_CONFIG EQU 0x402e11d4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_STRT_EN__OFFSET
CYFLD_BLE_BLELL_ADV_STRT_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_STRT_EN__SIZE
CYFLD_BLE_BLELL_ADV_STRT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CLS_EN__OFFSET
CYFLD_BLE_BLELL_ADV_CLS_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CLS_EN__SIZE
CYFLD_BLE_BLELL_ADV_CLS_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TX_EN__OFFSET
CYFLD_BLE_BLELL_ADV_TX_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TX_EN__SIZE
CYFLD_BLE_BLELL_ADV_TX_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_RSP_TX_EN__OFFSET
CYFLD_BLE_BLELL_SCN_RSP_TX_EN__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_RSP_TX_EN__SIZE
CYFLD_BLE_BLELL_SCN_RSP_TX_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_SCN_REQ_RX_EN__OFFSET
CYFLD_BLE_BLELL_ADV_SCN_REQ_RX_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_SCN_REQ_RX_EN__SIZE
CYFLD_BLE_BLELL_ADV_SCN_REQ_RX_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CONN_REQ_RX_EN__OFFSET
CYFLD_BLE_BLELL_ADV_CONN_REQ_RX_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_CONN_REQ_RX_EN__SIZE
CYFLD_BLE_BLELL_ADV_CONN_REQ_RX_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLV_CONNECTED_EN__OFFSET
CYFLD_BLE_BLELL_SLV_CONNECTED_EN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLV_CONNECTED_EN__SIZE
CYFLD_BLE_BLELL_SLV_CONNECTED_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TIMEOUT_EN__OFFSET
CYFLD_BLE_BLELL_ADV_TIMEOUT_EN__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_TIMEOUT_EN__SIZE
CYFLD_BLE_BLELL_ADV_TIMEOUT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_RAND_DISABLE__OFFSET
CYFLD_BLE_BLELL_ADV_RAND_DISABLE__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_RAND_DISABLE__SIZE
CYFLD_BLE_BLELL_ADV_RAND_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_PKT_INTERVAL__OFFSET
CYFLD_BLE_BLELL_ADV_PKT_INTERVAL__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_PKT_INTERVAL__SIZE
CYFLD_BLE_BLELL_ADV_PKT_INTERVAL__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SCAN_CONFIG
CYREG_BLE_BLELL_SCAN_CONFIG EQU 0x402e11d8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_STRT_EN__OFFSET
CYFLD_BLE_BLELL_SCN_STRT_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_STRT_EN__SIZE
CYFLD_BLE_BLELL_SCN_STRT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_CLOSE_EN__OFFSET
CYFLD_BLE_BLELL_SCN_CLOSE_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_CLOSE_EN__SIZE
CYFLD_BLE_BLELL_SCN_CLOSE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_TX_EN__OFFSET
CYFLD_BLE_BLELL_SCN_TX_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_TX_EN__SIZE
CYFLD_BLE_BLELL_SCN_TX_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_RX_EN__OFFSET
CYFLD_BLE_BLELL_ADV_RX_EN__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ADV_RX_EN__SIZE
CYFLD_BLE_BLELL_ADV_RX_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_RSP_RX_EN__OFFSET
CYFLD_BLE_BLELL_SCN_RSP_RX_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCN_RSP_RX_EN__SIZE
CYFLD_BLE_BLELL_SCN_RSP_RX_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_BACKOFF_ENABLE__OFFSET
CYFLD_BLE_BLELL_BACKOFF_ENABLE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_BACKOFF_ENABLE__SIZE
CYFLD_BLE_BLELL_BACKOFF_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_CHANNEL_MAP__OFFSET
CYFLD_BLE_BLELL_SCAN_CHANNEL_MAP__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCAN_CHANNEL_MAP__SIZE
CYFLD_BLE_BLELL_SCAN_CHANNEL_MAP__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_INIT_CONFIG
CYREG_BLE_BLELL_INIT_CONFIG EQU 0x402e11dc
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_STRT_EN__OFFSET
CYFLD_BLE_BLELL_INIT_STRT_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_STRT_EN__SIZE
CYFLD_BLE_BLELL_INIT_STRT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_CLOSE_EN__OFFSET
CYFLD_BLE_BLELL_INIT_CLOSE_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_CLOSE_EN__SIZE
CYFLD_BLE_BLELL_INIT_CLOSE_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_REQ_TX_EN__OFFSET
CYFLD_BLE_BLELL_CONN_REQ_TX_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_REQ_TX_EN__SIZE
CYFLD_BLE_BLELL_CONN_REQ_TX_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_CREATED__OFFSET
CYFLD_BLE_BLELL_CONN_CREATED__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_CREATED__SIZE
CYFLD_BLE_BLELL_CONN_CREATED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_CHANNEL_MAP__OFFSET
CYFLD_BLE_BLELL_INIT_CHANNEL_MAP__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_INIT_CHANNEL_MAP__SIZE
CYFLD_BLE_BLELL_INIT_CHANNEL_MAP__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_CONFIG
CYREG_BLE_BLELL_CONN_CONFIG EQU 0x402e11e0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_PKT_LIMIT__OFFSET
CYFLD_BLE_BLELL_RX_PKT_LIMIT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_PKT_LIMIT__SIZE
CYFLD_BLE_BLELL_RX_PKT_LIMIT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_INTR_THRESHOLD__OFFSET
CYFLD_BLE_BLELL_RX_INTR_THRESHOLD__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_INTR_THRESHOLD__SIZE
CYFLD_BLE_BLELL_RX_INTR_THRESHOLD__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MD_BIT_CLEAR__OFFSET
CYFLD_BLE_BLELL_MD_BIT_CLEAR__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MD_BIT_CLEAR__SIZE
CYFLD_BLE_BLELL_MD_BIT_CLEAR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DSM_SLOT_VARIANCE__OFFSET
CYFLD_BLE_BLELL_DSM_SLOT_VARIANCE__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DSM_SLOT_VARIANCE__SIZE
CYFLD_BLE_BLELL_DSM_SLOT_VARIANCE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLV_MD_CONFIG__OFFSET
CYFLD_BLE_BLELL_SLV_MD_CONFIG__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLV_MD_CONFIG__SIZE
CYFLD_BLE_BLELL_SLV_MD_CONFIG__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_EXTEND_CU_TX_WIN__OFFSET
CYFLD_BLE_BLELL_EXTEND_CU_TX_WIN__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_EXTEND_CU_TX_WIN__SIZE
CYFLD_BLE_BLELL_EXTEND_CU_TX_WIN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MASK_SUTO_AT_UPDT__OFFSET
CYFLD_BLE_BLELL_MASK_SUTO_AT_UPDT__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MASK_SUTO_AT_UPDT__SIZE
CYFLD_BLE_BLELL_MASK_SUTO_AT_UPDT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_REQ_1SLOT_EARLY__OFFSET
CYFLD_BLE_BLELL_CONN_REQ_1SLOT_EARLY__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_REQ_1SLOT_EARLY__SIZE
CYFLD_BLE_BLELL_CONN_REQ_1SLOT_EARLY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_CH_TX_POWER
CYREG_BLE_BLELL_CONN_CH_TX_POWER EQU 0x402e11e4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNCH_TRANSMIT_POWER__OFFSET
CYFLD_BLE_BLELL_CONNCH_TRANSMIT_POWER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNCH_TRANSMIT_POWER__SIZE
CYFLD_BLE_BLELL_CONNCH_TRANSMIT_POWER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_PARAM1
CYREG_BLE_BLELL_CONN_PARAM1 EQU 0x402e11e8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCA_PARAM__OFFSET
CYFLD_BLE_BLELL_SCA_PARAM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCA_PARAM__SIZE
CYFLD_BLE_BLELL_SCA_PARAM__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_HOP_INCREMENT_PARAM__OFFSET
CYFLD_BLE_BLELL_HOP_INCREMENT_PARAM__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_HOP_INCREMENT_PARAM__SIZE
CYFLD_BLE_BLELL_HOP_INCREMENT_PARAM__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CRC_INIT_L__OFFSET
CYFLD_BLE_BLELL_CRC_INIT_L__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CRC_INIT_L__SIZE
CYFLD_BLE_BLELL_CRC_INIT_L__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_PARAM2
CYREG_BLE_BLELL_CONN_PARAM2 EQU 0x402e11ec
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CRC_INIT_H__OFFSET
CYFLD_BLE_BLELL_CRC_INIT_H__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CRC_INIT_H__SIZE
CYFLD_BLE_BLELL_CRC_INIT_H__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_INTR_MASK
CYREG_BLE_BLELL_CONN_INTR_MASK EQU 0x402e11f0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_CL_INT_EN__OFFSET
CYFLD_BLE_BLELL_CONN_CL_INT_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_CL_INT_EN__SIZE
CYFLD_BLE_BLELL_CONN_CL_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_ESTB_INT_EN__OFFSET
CYFLD_BLE_BLELL_CONN_ESTB_INT_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_ESTB_INT_EN__SIZE
CYFLD_BLE_BLELL_CONN_ESTB_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MAP_UPDT_INT_EN__OFFSET
CYFLD_BLE_BLELL_MAP_UPDT_INT_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MAP_UPDT_INT_EN__SIZE
CYFLD_BLE_BLELL_MAP_UPDT_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_START_CE_INT_EN__OFFSET
CYFLD_BLE_BLELL_START_CE_INT_EN__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_START_CE_INT_EN__SIZE
CYFLD_BLE_BLELL_START_CE_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CLOSE_CE_INT_EN__OFFSET
CYFLD_BLE_BLELL_CLOSE_CE_INT_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CLOSE_CE_INT_EN__SIZE
CYFLD_BLE_BLELL_CLOSE_CE_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_TX_ACK_INT_EN__OFFSET
CYFLD_BLE_BLELL_CE_TX_ACK_INT_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_TX_ACK_INT_EN__SIZE
CYFLD_BLE_BLELL_CE_TX_ACK_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_RX_INT_EN__OFFSET
CYFLD_BLE_BLELL_CE_RX_INT_EN__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CE_RX_INT_EN__SIZE
CYFLD_BLE_BLELL_CE_RX_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_UPDATE_INTR_EN__OFFSET
CYFLD_BLE_BLELL_CONN_UPDATE_INTR_EN__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_UPDATE_INTR_EN__SIZE
CYFLD_BLE_BLELL_CONN_UPDATE_INTR_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_GOOD_PDU_INT_EN__OFFSET
CYFLD_BLE_BLELL_RX_GOOD_PDU_INT_EN__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_GOOD_PDU_INT_EN__SIZE
CYFLD_BLE_BLELL_RX_GOOD_PDU_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_BAD_PDU_INT_EN__OFFSET
CYFLD_BLE_BLELL_RX_BAD_PDU_INT_EN__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_BAD_PDU_INT_EN__SIZE
CYFLD_BLE_BLELL_RX_BAD_PDU_INT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SLAVE_TIMING_CONTROL
CYREG_BLE_BLELL_SLAVE_TIMING_CONTROL EQU 0x402e11f4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLAVE_TIME_SET_VAL__OFFSET
CYFLD_BLE_BLELL_SLAVE_TIME_SET_VAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLAVE_TIME_SET_VAL__SIZE
CYFLD_BLE_BLELL_SLAVE_TIME_SET_VAL__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLAVE_TIME_ADJ_VAL__OFFSET
CYFLD_BLE_BLELL_SLAVE_TIME_ADJ_VAL__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLAVE_TIME_ADJ_VAL__SIZE
CYFLD_BLE_BLELL_SLAVE_TIME_ADJ_VAL__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_RECEIVE_TRIG_CTRL
CYREG_BLE_BLELL_RECEIVE_TRIG_CTRL EQU 0x402e11f8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ACC_TRIGGER_THRESHOLD__OFFSET
CYFLD_BLE_BLELL_ACC_TRIGGER_THRESHOLD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ACC_TRIGGER_THRESHOLD__SIZE
CYFLD_BLE_BLELL_ACC_TRIGGER_THRESHOLD__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ACC_TRIGGER_TIMEOUT__OFFSET
CYFLD_BLE_BLELL_ACC_TRIGGER_TIMEOUT__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ACC_TRIGGER_TIMEOUT__SIZE
CYFLD_BLE_BLELL_ACC_TRIGGER_TIMEOUT__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DPLL_CONFIG
CYREG_BLE_BLELL_DPLL_CONFIG EQU 0x402e1258
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DPLL_CORREL_CONFIG__OFFSET
CYFLD_BLE_BLELL_DPLL_CORREL_CONFIG__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DPLL_CORREL_CONFIG__SIZE
CYFLD_BLE_BLELL_DPLL_CORREL_CONFIG__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_WHITELIST_BASE_ADDR
CYREG_BLE_BLELL_WHITELIST_BASE_ADDR EQU 0x402e1340
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WL_BASE_ADDR__OFFSET
CYFLD_BLE_BLELL_WL_BASE_ADDR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WL_BASE_ADDR__SIZE
CYFLD_BLE_BLELL_WL_BASE_ADDR__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_UPDATE_NEW_INTERVAL
CYREG_BLE_BLELL_CONN_UPDATE_NEW_INTERVAL EQU 0x402e13a4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_UPDT_INTERVAL__OFFSET
CYFLD_BLE_BLELL_CONN_UPDT_INTERVAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_UPDT_INTERVAL__SIZE
CYFLD_BLE_BLELL_CONN_UPDT_INTERVAL__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_UPDATE_NEW_LATENCY
CYREG_BLE_BLELL_CONN_UPDATE_NEW_LATENCY EQU 0x402e13a8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_UPDT_SLV_LATENCY__OFFSET
CYFLD_BLE_BLELL_CONN_UPDT_SLV_LATENCY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_UPDT_SLV_LATENCY__SIZE
CYFLD_BLE_BLELL_CONN_UPDT_SLV_LATENCY__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_UPDATE_NEW_SUP_TO
CYREG_BLE_BLELL_CONN_UPDATE_NEW_SUP_TO EQU 0x402e13ac
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_UPDT_SUP_TO__OFFSET
CYFLD_BLE_BLELL_CONN_UPDT_SUP_TO__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_UPDT_SUP_TO__SIZE
CYFLD_BLE_BLELL_CONN_UPDT_SUP_TO__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_UPDATE_NEW_SL_INTERVAL
CYREG_BLE_BLELL_CONN_UPDATE_NEW_SL_INTERVAL EQU 0x402e13b0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SL_CONN_INTERVAL_VAL__OFFSET
CYFLD_BLE_BLELL_SL_CONN_INTERVAL_VAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SL_CONN_INTERVAL_VAL__SIZE
CYFLD_BLE_BLELL_SL_CONN_INTERVAL_VAL__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD0
CYREG_BLE_BLELL_CONN_REQ_WORD0 EQU 0x402e13c0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ACCESS_ADDR_LOWER__OFFSET
CYFLD_BLE_BLELL_ACCESS_ADDR_LOWER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ACCESS_ADDR_LOWER__SIZE
CYFLD_BLE_BLELL_ACCESS_ADDR_LOWER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD1
CYREG_BLE_BLELL_CONN_REQ_WORD1 EQU 0x402e13c4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ACCESS_ADDR_UPPER__OFFSET
CYFLD_BLE_BLELL_ACCESS_ADDR_UPPER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ACCESS_ADDR_UPPER__SIZE
CYFLD_BLE_BLELL_ACCESS_ADDR_UPPER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD2
CYREG_BLE_BLELL_CONN_REQ_WORD2 EQU 0x402e13c8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_WINDOW_SIZE_VAL__OFFSET
CYFLD_BLE_BLELL_TX_WINDOW_SIZE_VAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_WINDOW_SIZE_VAL__SIZE
CYFLD_BLE_BLELL_TX_WINDOW_SIZE_VAL__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CRC_INIT_LOWER__OFFSET
CYFLD_BLE_BLELL_CRC_INIT_LOWER__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CRC_INIT_LOWER__SIZE
CYFLD_BLE_BLELL_CRC_INIT_LOWER__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD3
CYREG_BLE_BLELL_CONN_REQ_WORD3 EQU 0x402e13cc
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CRC_INIT_UPPER__OFFSET
CYFLD_BLE_BLELL_CRC_INIT_UPPER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CRC_INIT_UPPER__SIZE
CYFLD_BLE_BLELL_CRC_INIT_UPPER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD4
CYREG_BLE_BLELL_CONN_REQ_WORD4 EQU 0x402e13d0
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD5
CYREG_BLE_BLELL_CONN_REQ_WORD5 EQU 0x402e13d4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNECTION_INTERVAL_VAL__OFFSET
CYFLD_BLE_BLELL_CONNECTION_INTERVAL_VAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONNECTION_INTERVAL_VAL__SIZE
CYFLD_BLE_BLELL_CONNECTION_INTERVAL_VAL__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD6
CYREG_BLE_BLELL_CONN_REQ_WORD6 EQU 0x402e13d8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLAVE_LATENCY_VAL__OFFSET
CYFLD_BLE_BLELL_SLAVE_LATENCY_VAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLAVE_LATENCY_VAL__SIZE
CYFLD_BLE_BLELL_SLAVE_LATENCY_VAL__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD7
CYREG_BLE_BLELL_CONN_REQ_WORD7 EQU 0x402e13dc
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SUPERVISION_TIMEOUT_VAL__OFFSET
CYFLD_BLE_BLELL_SUPERVISION_TIMEOUT_VAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SUPERVISION_TIMEOUT_VAL__SIZE
CYFLD_BLE_BLELL_SUPERVISION_TIMEOUT_VAL__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD8
CYREG_BLE_BLELL_CONN_REQ_WORD8 EQU 0x402e13e0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_LOWER__OFFSET
CYFLD_BLE_BLELL_DATA_CHANNELS_LOWER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_LOWER__SIZE
CYFLD_BLE_BLELL_DATA_CHANNELS_LOWER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD9
CYREG_BLE_BLELL_CONN_REQ_WORD9 EQU 0x402e13e4
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_MID__OFFSET
CYFLD_BLE_BLELL_DATA_CHANNELS_MID__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_MID__SIZE
CYFLD_BLE_BLELL_DATA_CHANNELS_MID__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD10
CYREG_BLE_BLELL_CONN_REQ_WORD10 EQU 0x402e13e8
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_UPPER__OFFSET
CYFLD_BLE_BLELL_DATA_CHANNELS_UPPER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_CHANNELS_UPPER__SIZE
CYFLD_BLE_BLELL_DATA_CHANNELS_UPPER__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_REQ_WORD11
CYREG_BLE_BLELL_CONN_REQ_WORD11 EQU 0x402e13ec
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_HOP_INCREMENT_2__OFFSET
CYFLD_BLE_BLELL_HOP_INCREMENT_2__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_HOP_INCREMENT_2__SIZE
CYFLD_BLE_BLELL_HOP_INCREMENT_2__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCA_2__OFFSET
CYFLD_BLE_BLELL_SCA_2__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SCA_2__SIZE
CYFLD_BLE_BLELL_SCA_2__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_PACKET_COUNTER0
CYREG_BLE_BLELL_PACKET_COUNTER0 EQU 0x402e1400
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PACKET_COUNTER_LOWER__OFFSET
CYFLD_BLE_BLELL_PACKET_COUNTER_LOWER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PACKET_COUNTER_LOWER__SIZE
CYFLD_BLE_BLELL_PACKET_COUNTER_LOWER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_PACKET_COUNTER1
CYREG_BLE_BLELL_PACKET_COUNTER1 EQU 0x402e1404
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PACKET_COUNTER_MIDDLE__OFFSET
CYFLD_BLE_BLELL_PACKET_COUNTER_MIDDLE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PACKET_COUNTER_MIDDLE__SIZE
CYFLD_BLE_BLELL_PACKET_COUNTER_MIDDLE__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_PACKET_COUNTER2
CYREG_BLE_BLELL_PACKET_COUNTER2 EQU 0x402e1408
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PACKET_COUNTER_UPPER__OFFSET
CYFLD_BLE_BLELL_PACKET_COUNTER_UPPER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PACKET_COUNTER_UPPER__SIZE
CYFLD_BLE_BLELL_PACKET_COUNTER_UPPER__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_IV_MASTER0
CYREG_BLE_BLELL_IV_MASTER0 EQU 0x402e1410
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IV_MASTER_LOWER__OFFSET
CYFLD_BLE_BLELL_IV_MASTER_LOWER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IV_MASTER_LOWER__SIZE
CYFLD_BLE_BLELL_IV_MASTER_LOWER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_IV_MASTER1
CYREG_BLE_BLELL_IV_MASTER1 EQU 0x402e1414
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IV_MASTER_UPPER__OFFSET
CYFLD_BLE_BLELL_IV_MASTER_UPPER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IV_MASTER_UPPER__SIZE
CYFLD_BLE_BLELL_IV_MASTER_UPPER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_IV_SLAVE0
CYREG_BLE_BLELL_IV_SLAVE0 EQU 0x402e1418
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IV_SLAVE_LOWER__OFFSET
CYFLD_BLE_BLELL_IV_SLAVE_LOWER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IV_SLAVE_LOWER__SIZE
CYFLD_BLE_BLELL_IV_SLAVE_LOWER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_IV_SLAVE1
CYREG_BLE_BLELL_IV_SLAVE1 EQU 0x402e141c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IV_SLAVE_UPPER__OFFSET
CYFLD_BLE_BLELL_IV_SLAVE_UPPER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IV_SLAVE_UPPER__SIZE
CYFLD_BLE_BLELL_IV_SLAVE_UPPER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_KEY0
CYREG_BLE_BLELL_ENC_KEY0 EQU 0x402e1420
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ENC_KEY__OFFSET
CYFLD_BLE_BLELL_ENC_KEY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ENC_KEY__SIZE
CYFLD_BLE_BLELL_ENC_KEY__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_KEY1
CYREG_BLE_BLELL_ENC_KEY1 EQU 0x402e1424
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_KEY2
CYREG_BLE_BLELL_ENC_KEY2 EQU 0x402e1428
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_KEY3
CYREG_BLE_BLELL_ENC_KEY3 EQU 0x402e142c
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_KEY4
CYREG_BLE_BLELL_ENC_KEY4 EQU 0x402e1430
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_KEY5
CYREG_BLE_BLELL_ENC_KEY5 EQU 0x402e1434
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_KEY6
CYREG_BLE_BLELL_ENC_KEY6 EQU 0x402e1438
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_KEY7
CYREG_BLE_BLELL_ENC_KEY7 EQU 0x402e143c
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA0
CYREG_BLE_BLELL_DATA0 EQU 0x402e1440
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA0__OFFSET
CYFLD_BLE_BLELL_DATA0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA0__SIZE
CYFLD_BLE_BLELL_DATA0__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA1
CYREG_BLE_BLELL_DATA1 EQU 0x402e1444
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA1__OFFSET
CYFLD_BLE_BLELL_DATA1__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA1__SIZE
CYFLD_BLE_BLELL_DATA1__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA2
CYREG_BLE_BLELL_DATA2 EQU 0x402e1448
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA2__OFFSET
CYFLD_BLE_BLELL_DATA2__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA2__SIZE
CYFLD_BLE_BLELL_DATA2__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA3
CYREG_BLE_BLELL_DATA3 EQU 0x402e144c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA3__OFFSET
CYFLD_BLE_BLELL_DATA3__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA3__SIZE
CYFLD_BLE_BLELL_DATA3__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA4
CYREG_BLE_BLELL_DATA4 EQU 0x402e1450
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA4__OFFSET
CYFLD_BLE_BLELL_DATA4__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA4__SIZE
CYFLD_BLE_BLELL_DATA4__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA5
CYREG_BLE_BLELL_DATA5 EQU 0x402e1454
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA5__OFFSET
CYFLD_BLE_BLELL_DATA5__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA5__SIZE
CYFLD_BLE_BLELL_DATA5__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA6
CYREG_BLE_BLELL_DATA6 EQU 0x402e1458
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA6__OFFSET
CYFLD_BLE_BLELL_DATA6__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA6__SIZE
CYFLD_BLE_BLELL_DATA6__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA7
CYREG_BLE_BLELL_DATA7 EQU 0x402e145c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA7__OFFSET
CYFLD_BLE_BLELL_DATA7__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA7__SIZE
CYFLD_BLE_BLELL_DATA7__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA8
CYREG_BLE_BLELL_DATA8 EQU 0x402e1460
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA8__OFFSET
CYFLD_BLE_BLELL_DATA8__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA8__SIZE
CYFLD_BLE_BLELL_DATA8__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA9
CYREG_BLE_BLELL_DATA9 EQU 0x402e1464
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA9__OFFSET
CYFLD_BLE_BLELL_DATA9__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA9__SIZE
CYFLD_BLE_BLELL_DATA9__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA10
CYREG_BLE_BLELL_DATA10 EQU 0x402e1468
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA10__OFFSET
CYFLD_BLE_BLELL_DATA10__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA10__SIZE
CYFLD_BLE_BLELL_DATA10__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA11
CYREG_BLE_BLELL_DATA11 EQU 0x402e146c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA11__OFFSET
CYFLD_BLE_BLELL_DATA11__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA11__SIZE
CYFLD_BLE_BLELL_DATA11__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA12
CYREG_BLE_BLELL_DATA12 EQU 0x402e1470
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA12__OFFSET
CYFLD_BLE_BLELL_DATA12__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA12__SIZE
CYFLD_BLE_BLELL_DATA12__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_DATA13
CYREG_BLE_BLELL_DATA13 EQU 0x402e1474
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA13__OFFSET
CYFLD_BLE_BLELL_DATA13__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA13__SIZE
CYFLD_BLE_BLELL_DATA13__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_MIC_IN0
CYREG_BLE_BLELL_MIC_IN0 EQU 0x402e1478
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MIC_IN_LOWER__OFFSET
CYFLD_BLE_BLELL_MIC_IN_LOWER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MIC_IN_LOWER__SIZE
CYFLD_BLE_BLELL_MIC_IN_LOWER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_MIC_IN1
CYREG_BLE_BLELL_MIC_IN1 EQU 0x402e147c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MIC_IN_UPPER__OFFSET
CYFLD_BLE_BLELL_MIC_IN_UPPER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MIC_IN_UPPER__SIZE
CYFLD_BLE_BLELL_MIC_IN_UPPER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_MIC_OUT0
CYREG_BLE_BLELL_MIC_OUT0 EQU 0x402e1480
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MIC_OUT_LOWER__OFFSET
CYFLD_BLE_BLELL_MIC_OUT_LOWER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MIC_OUT_LOWER__SIZE
CYFLD_BLE_BLELL_MIC_OUT_LOWER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_MIC_OUT1
CYREG_BLE_BLELL_MIC_OUT1 EQU 0x402e1484
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MIC_OUT_UPPER__OFFSET
CYFLD_BLE_BLELL_MIC_OUT_UPPER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_MIC_OUT_UPPER__SIZE
CYFLD_BLE_BLELL_MIC_OUT_UPPER__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_PARAMS
CYREG_BLE_BLELL_ENC_PARAMS EQU 0x402e1488
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_PDU_HEADER__OFFSET
CYFLD_BLE_BLELL_DATA_PDU_HEADER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DATA_PDU_HEADER__SIZE
CYFLD_BLE_BLELL_DATA_PDU_HEADER__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PAYLOAD_LENGTH__OFFSET
CYFLD_BLE_BLELL_PAYLOAD_LENGTH__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PAYLOAD_LENGTH__SIZE
CYFLD_BLE_BLELL_PAYLOAD_LENGTH__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DIRECTION__OFFSET
CYFLD_BLE_BLELL_DIRECTION__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DIRECTION__SIZE
CYFLD_BLE_BLELL_DIRECTION__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_CONFIG
CYREG_BLE_BLELL_ENC_CONFIG EQU 0x402e1490
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_START_PROC__OFFSET
CYFLD_BLE_BLELL_START_PROC__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_START_PROC__SIZE
CYFLD_BLE_BLELL_START_PROC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ECB_CCM__OFFSET
CYFLD_BLE_BLELL_ECB_CCM__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ECB_CCM__SIZE
CYFLD_BLE_BLELL_ECB_CCM__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEC_ENC__OFFSET
CYFLD_BLE_BLELL_DEC_ENC__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_DEC_ENC__SIZE
CYFLD_BLE_BLELL_DEC_ENC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_INTR_EN
CYREG_BLE_BLELL_ENC_INTR_EN EQU 0x402e1498
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_AUTH_PASS_INTR_EN__OFFSET
CYFLD_BLE_BLELL_AUTH_PASS_INTR_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_AUTH_PASS_INTR_EN__SIZE
CYFLD_BLE_BLELL_AUTH_PASS_INTR_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ECB_PROC_INTR_EN__OFFSET
CYFLD_BLE_BLELL_ECB_PROC_INTR_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ECB_PROC_INTR_EN__SIZE
CYFLD_BLE_BLELL_ECB_PROC_INTR_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CCM_PROC_INTR_EN__OFFSET
CYFLD_BLE_BLELL_CCM_PROC_INTR_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CCM_PROC_INTR_EN__SIZE
CYFLD_BLE_BLELL_CCM_PROC_INTR_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_ENC_INTR
CYREG_BLE_BLELL_ENC_INTR EQU 0x402e14a0
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_AUTH_PASS_INTR__OFFSET
CYFLD_BLE_BLELL_AUTH_PASS_INTR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_AUTH_PASS_INTR__SIZE
CYFLD_BLE_BLELL_AUTH_PASS_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ECB_PROC_INTR__OFFSET
CYFLD_BLE_BLELL_ECB_PROC_INTR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_ECB_PROC_INTR__SIZE
CYFLD_BLE_BLELL_ECB_PROC_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CCM_PROC_INTR__OFFSET
CYFLD_BLE_BLELL_CCM_PROC_INTR__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CCM_PROC_INTR__SIZE
CYFLD_BLE_BLELL_CCM_PROC_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IN_DATA_CLEAR__OFFSET
CYFLD_BLE_BLELL_IN_DATA_CLEAR__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_IN_DATA_CLEAR__SIZE
CYFLD_BLE_BLELL_IN_DATA_CLEAR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_TXMEM_BASE_ADDR
CYREG_BLE_BLELL_CONN_TXMEM_BASE_ADDR EQU 0x402e1600
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_TX_MEM_BASE_ADDR__OFFSET
CYFLD_BLE_BLELL_CONN_TX_MEM_BASE_ADDR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_TX_MEM_BASE_ADDR__SIZE
CYFLD_BLE_BLELL_CONN_TX_MEM_BASE_ADDR__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_CONN_RXMEM_BASE_ADDR
CYREG_BLE_BLELL_CONN_RXMEM_BASE_ADDR EQU 0x402e1800
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_RX_MEM_BASE_ADDR__OFFSET
CYFLD_BLE_BLELL_CONN_RX_MEM_BASE_ADDR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_RX_MEM_BASE_ADDR__SIZE
CYFLD_BLE_BLELL_CONN_RX_MEM_BASE_ADDR__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_PDU_RESP_TIMER
CYREG_BLE_BLELL_PDU_RESP_TIMER EQU 0x402e1a04
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PDU_RESP_TIME_VAL__OFFSET
CYFLD_BLE_BLELL_PDU_RESP_TIME_VAL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_PDU_RESP_TIME_VAL__SIZE
CYFLD_BLE_BLELL_PDU_RESP_TIME_VAL__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_NEXT_RESP_TIMER_EXP
CYREG_BLE_BLELL_NEXT_RESP_TIMER_EXP EQU 0x402e1a08
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_NEXT_RESPONSE_INSTANT__OFFSET
CYFLD_BLE_BLELL_NEXT_RESPONSE_INSTANT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_NEXT_RESPONSE_INSTANT__SIZE
CYFLD_BLE_BLELL_NEXT_RESPONSE_INSTANT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_NEXT_SUP_TO
CYREG_BLE_BLELL_NEXT_SUP_TO EQU 0x402e1a0c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_NEXT_TIMEOUT_INSTANT__OFFSET
CYFLD_BLE_BLELL_NEXT_TIMEOUT_INSTANT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_NEXT_TIMEOUT_INSTANT__SIZE
CYFLD_BLE_BLELL_NEXT_TIMEOUT_INSTANT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_LLH_FEATURE_CONFIG
CYREG_BLE_BLELL_LLH_FEATURE_CONFIG EQU 0x402e1a10
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_QUICK_TRANSMIT__OFFSET
CYFLD_BLE_BLELL_QUICK_TRANSMIT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_QUICK_TRANSMIT__SIZE
CYFLD_BLE_BLELL_QUICK_TRANSMIT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SL_DSM_EN__OFFSET
CYFLD_BLE_BLELL_SL_DSM_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SL_DSM_EN__SIZE
CYFLD_BLE_BLELL_SL_DSM_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_WIN_MIN_STEP_SIZE
CYREG_BLE_BLELL_WIN_MIN_STEP_SIZE EQU 0x402e1a14
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_STEPDN__OFFSET
CYFLD_BLE_BLELL_STEPDN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_STEPDN__SIZE
CYFLD_BLE_BLELL_STEPDN__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_STEPUP__OFFSET
CYFLD_BLE_BLELL_STEPUP__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_STEPUP__SIZE
CYFLD_BLE_BLELL_STEPUP__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WINDOW_MIN_FW__OFFSET
CYFLD_BLE_BLELL_WINDOW_MIN_FW__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_WINDOW_MIN_FW__SIZE
CYFLD_BLE_BLELL_WINDOW_MIN_FW__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SLV_WIN_ADJ
CYREG_BLE_BLELL_SLV_WIN_ADJ EQU 0x402e1a18
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLV_WIN_ADJ__OFFSET
CYFLD_BLE_BLELL_SLV_WIN_ADJ__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_SLV_WIN_ADJ__SIZE
CYFLD_BLE_BLELL_SLV_WIN_ADJ__SIZE EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_SL_CONN_INTERVAL
CYREG_BLE_BLELL_SL_CONN_INTERVAL EQU 0x402e1a1c
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_LE_PING_TIMER_ADDR
CYREG_BLE_BLELL_LE_PING_TIMER_ADDR EQU 0x402e1a20
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_PING_TIMER_ADDR__OFFSET
CYFLD_BLE_BLELL_CONN_PING_TIMER_ADDR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_PING_TIMER_ADDR__SIZE
CYFLD_BLE_BLELL_CONN_PING_TIMER_ADDR__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_LE_PING_TIMER_OFFSET
CYREG_BLE_BLELL_LE_PING_TIMER_OFFSET EQU 0x402e1a24
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_PING_TIMER_OFFSET__OFFSET
CYFLD_BLE_BLELL_CONN_PING_TIMER_OFFSET__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_PING_TIMER_OFFSET__SIZE
CYFLD_BLE_BLELL_CONN_PING_TIMER_OFFSET__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_LE_PING_TIMER_NEXT_EXP
CYREG_BLE_BLELL_LE_PING_TIMER_NEXT_EXP EQU 0x402e1a28
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_PING_TIMER_NEXT_EXP__OFFSET
CYFLD_BLE_BLELL_CONN_PING_TIMER_NEXT_EXP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_PING_TIMER_NEXT_EXP__SIZE
CYFLD_BLE_BLELL_CONN_PING_TIMER_NEXT_EXP__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_LE_PING_TIMER_WRAP_COUNT
CYREG_BLE_BLELL_LE_PING_TIMER_WRAP_COUNT EQU 0x402e1a2c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_SEC_CURRENT_WRAP__OFFSET
CYFLD_BLE_BLELL_CONN_SEC_CURRENT_WRAP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_CONN_SEC_CURRENT_WRAP__SIZE
CYFLD_BLE_BLELL_CONN_SEC_CURRENT_WRAP__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_TX_EN_EXT_DELAY
CYREG_BLE_BLELL_TX_EN_EXT_DELAY EQU 0x402e1e00
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TXEN_EXT_DELAY__OFFSET
CYFLD_BLE_BLELL_TXEN_EXT_DELAY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TXEN_EXT_DELAY__SIZE
CYFLD_BLE_BLELL_TXEN_EXT_DELAY__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLELL_TX_RX_SYNTH_DELAY
CYREG_BLE_BLELL_TX_RX_SYNTH_DELAY EQU 0x402e1e04
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_EN_DELAY__OFFSET
CYFLD_BLE_BLELL_RX_EN_DELAY__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_RX_EN_DELAY__SIZE
CYFLD_BLE_BLELL_RX_EN_DELAY__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_EN_DELAY__OFFSET
CYFLD_BLE_BLELL_TX_EN_DELAY__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLELL_TX_EN_DELAY__SIZE
CYFLD_BLE_BLELL_TX_EN_DELAY__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYDEV_BLE_BLESS_BASE
CYDEV_BLE_BLESS_BASE EQU 0x402ef000
    ENDIF
    IF :LNOT::DEF:CYDEV_BLE_BLESS_SIZE
CYDEV_BLE_BLESS_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLESS_WCO_CONFIG
CYREG_BLE_BLESS_WCO_CONFIG EQU 0x402ef000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_LPM_EN__OFFSET
CYFLD_BLE_BLESS_LPM_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_LPM_EN__SIZE
CYFLD_BLE_BLESS_LPM_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_LPM_AUTO__OFFSET
CYFLD_BLE_BLESS_LPM_AUTO__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_LPM_AUTO__SIZE
CYFLD_BLE_BLESS_LPM_AUTO__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_EXT_INPUT_EN__OFFSET
CYFLD_BLE_BLESS_EXT_INPUT_EN__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_EXT_INPUT_EN__SIZE
CYFLD_BLE_BLESS_EXT_INPUT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_ENBUS__OFFSET
CYFLD_BLE_BLESS_ENBUS__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_ENBUS__SIZE
CYFLD_BLE_BLESS_ENBUS__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_ENABLE__OFFSET
CYFLD_BLE_BLESS_ENABLE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_ENABLE__SIZE
CYFLD_BLE_BLESS_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLESS_WCO_STATUS
CYREG_BLE_BLESS_WCO_STATUS EQU 0x402ef004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_OUT_BLNK_A__OFFSET
CYFLD_BLE_BLESS_OUT_BLNK_A__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_OUT_BLNK_A__SIZE
CYFLD_BLE_BLESS_OUT_BLNK_A__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLESS_RF_CONFIG
CYREG_BLE_BLESS_RF_CONFIG EQU 0x402ef060
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_RF_ENABLE__OFFSET
CYFLD_BLE_BLESS_RF_ENABLE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_RF_ENABLE__SIZE
CYFLD_BLE_BLESS_RF_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DDFT_MUX_CFG1__OFFSET
CYFLD_BLE_BLESS_DDFT_MUX_CFG1__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DDFT_MUX_CFG1__SIZE
CYFLD_BLE_BLESS_DDFT_MUX_CFG1__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DDFT_MUX_CFG2__OFFSET
CYFLD_BLE_BLESS_DDFT_MUX_CFG2__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DDFT_MUX_CFG2__SIZE
CYFLD_BLE_BLESS_DDFT_MUX_CFG2__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_BPKTCTL_FW__OFFSET
CYFLD_BLE_BLESS_BPKTCTL_FW__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_BPKTCTL_FW__SIZE
CYFLD_BLE_BLESS_BPKTCTL_FW__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_BPKTCTL_FW_DRIVE__OFFSET
CYFLD_BLE_BLESS_BPKTCTL_FW_DRIVE__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_BPKTCTL_FW_DRIVE__SIZE
CYFLD_BLE_BLESS_BPKTCTL_FW_DRIVE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLESS_XTAL_CLK_DIV_CONFIG
CYREG_BLE_BLESS_XTAL_CLK_DIV_CONFIG EQU 0x402ef064
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_SYSCLK_DIV__OFFSET
CYFLD_BLE_BLESS_SYSCLK_DIV__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_SYSCLK_DIV__SIZE
CYFLD_BLE_BLESS_SYSCLK_DIV__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_LLCLK_DIV__OFFSET
CYFLD_BLE_BLESS_LLCLK_DIV__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_LLCLK_DIV__SIZE
CYFLD_BLE_BLESS_LLCLK_DIV__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLESS_LL_DSM_INTR_STAT
CYREG_BLE_BLESS_LL_DSM_INTR_STAT EQU 0x402ef068
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_ENTERED_INTR__OFFSET
CYFLD_BLE_BLESS_DSM_ENTERED_INTR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_ENTERED_INTR__SIZE
CYFLD_BLE_BLESS_DSM_ENTERED_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_EXITED_INTR__OFFSET
CYFLD_BLE_BLESS_DSM_EXITED_INTR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_EXITED_INTR__SIZE
CYFLD_BLE_BLESS_DSM_EXITED_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_XTAL_ON_INTR__OFFSET
CYFLD_BLE_BLESS_XTAL_ON_INTR__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_XTAL_ON_INTR__SIZE
CYFLD_BLE_BLESS_XTAL_ON_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLESS_LL_DSM_CTRL
CYREG_BLE_BLESS_LL_DSM_CTRL EQU 0x402ef06c
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_EXIT__OFFSET
CYFLD_BLE_BLESS_DSM_EXIT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_EXIT__SIZE
CYFLD_BLE_BLESS_DSM_EXIT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_ENTERED_INTR_MASK__OFFSET
CYFLD_BLE_BLESS_DSM_ENTERED_INTR_MASK__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_ENTERED_INTR_MASK__SIZE
CYFLD_BLE_BLESS_DSM_ENTERED_INTR_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_EXITED_INTR_MASK__OFFSET
CYFLD_BLE_BLESS_DSM_EXITED_INTR_MASK__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DSM_EXITED_INTR_MASK__SIZE
CYFLD_BLE_BLESS_DSM_EXITED_INTR_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_XTAL_ON_INTR_MASK__OFFSET
CYFLD_BLE_BLESS_XTAL_ON_INTR_MASK__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_XTAL_ON_INTR_MASK__SIZE
CYFLD_BLE_BLESS_XTAL_ON_INTR_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLESS_LL_CLK_EN
CYREG_BLE_BLESS_LL_CLK_EN EQU 0x402ef070
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_CLK_EN__OFFSET
CYFLD_BLE_BLESS_CLK_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_CLK_EN__SIZE
CYFLD_BLE_BLESS_CLK_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_CY_CORREL_EN__OFFSET
CYFLD_BLE_BLESS_CY_CORREL_EN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_CY_CORREL_EN__SIZE
CYFLD_BLE_BLESS_CY_CORREL_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLESS_LF_CLK_CTRL
CYREG_BLE_BLESS_LF_CLK_CTRL EQU 0x402ef074
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DISABLE_LF_CLK__OFFSET
CYFLD_BLE_BLESS_DISABLE_LF_CLK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_DISABLE_LF_CLK__SIZE
CYFLD_BLE_BLESS_DISABLE_LF_CLK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_BLE_BLESS_WCO_TRIM
CYREG_BLE_BLESS_WCO_TRIM EQU 0x402eff00
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_XGM__OFFSET
CYFLD_BLE_BLESS_XGM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_XGM__SIZE
CYFLD_BLE_BLESS_XGM__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_LPM_GM__OFFSET
CYFLD_BLE_BLESS_LPM_GM__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_BLE_BLESS_LPM_GM__SIZE
CYFLD_BLE_BLESS_LPM_GM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYDEV_CTBM0_BASE
CYDEV_CTBM0_BASE EQU 0x40300000
    ENDIF
    IF :LNOT::DEF:CYDEV_CTBM0_SIZE
CYDEV_CTBM0_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_CTB_CTRL
CYREG_CTBM0_CTB_CTRL EQU 0x40300000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_DEEPSLEEP_ON__OFFSET
CYFLD_CTBM_DEEPSLEEP_ON__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_DEEPSLEEP_ON__SIZE
CYFLD_CTBM_DEEPSLEEP_ON__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_ENABLED__OFFSET
CYFLD_CTBM_ENABLED__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_ENABLED__SIZE
CYFLD_CTBM_ENABLED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA_RES0_CTRL
CYREG_CTBM0_OA_RES0_CTRL EQU 0x40300004
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_PWR_MODE__OFFSET
CYFLD_CTBM_OA0_PWR_MODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_PWR_MODE__SIZE
CYFLD_CTBM_OA0_PWR_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA0_PWR_MODE_OFF
CYVAL_CTBM_OA0_PWR_MODE_OFF EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA0_PWR_MODE_LOW
CYVAL_CTBM_OA0_PWR_MODE_LOW EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA0_PWR_MODE_MEDIUM
CYVAL_CTBM_OA0_PWR_MODE_MEDIUM EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA0_PWR_MODE_HIGH
CYVAL_CTBM_OA0_PWR_MODE_HIGH EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_DRIVE_STR_SEL__OFFSET
CYFLD_CTBM_OA0_DRIVE_STR_SEL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_DRIVE_STR_SEL__SIZE
CYFLD_CTBM_OA0_DRIVE_STR_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP_EN__OFFSET
CYFLD_CTBM_OA0_COMP_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP_EN__SIZE
CYFLD_CTBM_OA0_COMP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_HYST_EN__OFFSET
CYFLD_CTBM_OA0_HYST_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_HYST_EN__SIZE
CYFLD_CTBM_OA0_HYST_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_BYPASS_DSI_SYNC__OFFSET
CYFLD_CTBM_OA0_BYPASS_DSI_SYNC__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_BYPASS_DSI_SYNC__SIZE
CYFLD_CTBM_OA0_BYPASS_DSI_SYNC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_DSI_LEVEL__OFFSET
CYFLD_CTBM_OA0_DSI_LEVEL__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_DSI_LEVEL__SIZE
CYFLD_CTBM_OA0_DSI_LEVEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_COMPINT__OFFSET
CYFLD_CTBM_OA0_COMPINT__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_COMPINT__SIZE
CYFLD_CTBM_OA0_COMPINT__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA0_COMPINT_DISABLE
CYVAL_CTBM_OA0_COMPINT_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA0_COMPINT_RISING
CYVAL_CTBM_OA0_COMPINT_RISING EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA0_COMPINT_FALLING
CYVAL_CTBM_OA0_COMPINT_FALLING EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA0_COMPINT_BOTH
CYVAL_CTBM_OA0_COMPINT_BOTH EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_PUMP_EN__OFFSET
CYFLD_CTBM_OA0_PUMP_EN__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_PUMP_EN__SIZE
CYFLD_CTBM_OA0_PUMP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA_RES1_CTRL
CYREG_CTBM0_OA_RES1_CTRL EQU 0x40300008
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_PWR_MODE__OFFSET
CYFLD_CTBM_OA1_PWR_MODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_PWR_MODE__SIZE
CYFLD_CTBM_OA1_PWR_MODE__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_DRIVE_STR_SEL__OFFSET
CYFLD_CTBM_OA1_DRIVE_STR_SEL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_DRIVE_STR_SEL__SIZE
CYFLD_CTBM_OA1_DRIVE_STR_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP_EN__OFFSET
CYFLD_CTBM_OA1_COMP_EN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP_EN__SIZE
CYFLD_CTBM_OA1_COMP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_HYST_EN__OFFSET
CYFLD_CTBM_OA1_HYST_EN__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_HYST_EN__SIZE
CYFLD_CTBM_OA1_HYST_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_BYPASS_DSI_SYNC__OFFSET
CYFLD_CTBM_OA1_BYPASS_DSI_SYNC__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_BYPASS_DSI_SYNC__SIZE
CYFLD_CTBM_OA1_BYPASS_DSI_SYNC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_DSI_LEVEL__OFFSET
CYFLD_CTBM_OA1_DSI_LEVEL__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_DSI_LEVEL__SIZE
CYFLD_CTBM_OA1_DSI_LEVEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_COMPINT__OFFSET
CYFLD_CTBM_OA1_COMPINT__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_COMPINT__SIZE
CYFLD_CTBM_OA1_COMPINT__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA1_COMPINT_DISABLE
CYVAL_CTBM_OA1_COMPINT_DISABLE EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA1_COMPINT_RISING
CYVAL_CTBM_OA1_COMPINT_RISING EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA1_COMPINT_FALLING
CYVAL_CTBM_OA1_COMPINT_FALLING EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_CTBM_OA1_COMPINT_BOTH
CYVAL_CTBM_OA1_COMPINT_BOTH EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_PUMP_EN__OFFSET
CYFLD_CTBM_OA1_PUMP_EN__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_PUMP_EN__SIZE
CYFLD_CTBM_OA1_PUMP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_COMP_STAT
CYREG_CTBM0_COMP_STAT EQU 0x4030000c
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP__OFFSET
CYFLD_CTBM_OA0_COMP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP__SIZE
CYFLD_CTBM_OA0_COMP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP__OFFSET
CYFLD_CTBM_OA1_COMP__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP__SIZE
CYFLD_CTBM_OA1_COMP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_INTR
CYREG_CTBM0_INTR EQU 0x40300020
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP0__OFFSET
CYFLD_CTBM_COMP0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP0__SIZE
CYFLD_CTBM_COMP0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP1__OFFSET
CYFLD_CTBM_COMP1__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP1__SIZE
CYFLD_CTBM_COMP1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_INTR_SET
CYREG_CTBM0_INTR_SET EQU 0x40300024
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP0_SET__OFFSET
CYFLD_CTBM_COMP0_SET__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP0_SET__SIZE
CYFLD_CTBM_COMP0_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP1_SET__OFFSET
CYFLD_CTBM_COMP1_SET__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP1_SET__SIZE
CYFLD_CTBM_COMP1_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_INTR_MASK
CYREG_CTBM0_INTR_MASK EQU 0x40300028
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP0_MASK__OFFSET
CYFLD_CTBM_COMP0_MASK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP0_MASK__SIZE
CYFLD_CTBM_COMP0_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP1_MASK__OFFSET
CYFLD_CTBM_COMP1_MASK__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP1_MASK__SIZE
CYFLD_CTBM_COMP1_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_INTR_MASKED
CYREG_CTBM0_INTR_MASKED EQU 0x4030002c
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP0_MASKED__OFFSET
CYFLD_CTBM_COMP0_MASKED__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP0_MASKED__SIZE
CYFLD_CTBM_COMP0_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP1_MASKED__OFFSET
CYFLD_CTBM_COMP1_MASKED__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_COMP1_MASKED__SIZE
CYFLD_CTBM_COMP1_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_DFT_CTRL
CYREG_CTBM0_DFT_CTRL EQU 0x40300030
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_DFT_MODE__OFFSET
CYFLD_CTBM_DFT_MODE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_DFT_MODE__SIZE
CYFLD_CTBM_DFT_MODE__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_DFT_EN__OFFSET
CYFLD_CTBM_DFT_EN__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_DFT_EN__SIZE
CYFLD_CTBM_DFT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA0_SW
CYREG_CTBM0_OA0_SW EQU 0x40300080
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0P_A00__OFFSET
CYFLD_CTBM_OA0P_A00__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0P_A00__SIZE
CYFLD_CTBM_OA0P_A00__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0P_A20__OFFSET
CYFLD_CTBM_OA0P_A20__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0P_A20__SIZE
CYFLD_CTBM_OA0P_A20__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0P_A30__OFFSET
CYFLD_CTBM_OA0P_A30__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0P_A30__SIZE
CYFLD_CTBM_OA0P_A30__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0M_A11__OFFSET
CYFLD_CTBM_OA0M_A11__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0M_A11__SIZE
CYFLD_CTBM_OA0M_A11__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0M_A81__OFFSET
CYFLD_CTBM_OA0M_A81__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0M_A81__SIZE
CYFLD_CTBM_OA0M_A81__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0O_D51__OFFSET
CYFLD_CTBM_OA0O_D51__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0O_D51__SIZE
CYFLD_CTBM_OA0O_D51__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0O_D81__OFFSET
CYFLD_CTBM_OA0O_D81__OFFSET EQU 0x00000015
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0O_D81__SIZE
CYFLD_CTBM_OA0O_D81__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA0_SW_CLEAR
CYREG_CTBM0_OA0_SW_CLEAR EQU 0x40300084
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA1_SW
CYREG_CTBM0_OA1_SW EQU 0x40300088
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1P_A03__OFFSET
CYFLD_CTBM_OA1P_A03__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1P_A03__SIZE
CYFLD_CTBM_OA1P_A03__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1P_A13__OFFSET
CYFLD_CTBM_OA1P_A13__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1P_A13__SIZE
CYFLD_CTBM_OA1P_A13__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1P_A43__OFFSET
CYFLD_CTBM_OA1P_A43__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1P_A43__SIZE
CYFLD_CTBM_OA1P_A43__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1M_A22__OFFSET
CYFLD_CTBM_OA1M_A22__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1M_A22__SIZE
CYFLD_CTBM_OA1M_A22__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1M_A82__OFFSET
CYFLD_CTBM_OA1M_A82__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1M_A82__SIZE
CYFLD_CTBM_OA1M_A82__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D52__OFFSET
CYFLD_CTBM_OA1O_D52__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D52__SIZE
CYFLD_CTBM_OA1O_D52__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D62__OFFSET
CYFLD_CTBM_OA1O_D62__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D62__SIZE
CYFLD_CTBM_OA1O_D62__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D82__OFFSET
CYFLD_CTBM_OA1O_D82__OFFSET EQU 0x00000015
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D82__SIZE
CYFLD_CTBM_OA1O_D82__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA1_SW_CLEAR
CYREG_CTBM0_OA1_SW_CLEAR EQU 0x4030008c
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_CTB_SW_HW_CTRL
CYREG_CTBM0_CTB_SW_HW_CTRL EQU 0x403000c0
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_P2_HW_CTRL__OFFSET
CYFLD_CTBM_P2_HW_CTRL__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_P2_HW_CTRL__SIZE
CYFLD_CTBM_P2_HW_CTRL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_P3_HW_CTRL__OFFSET
CYFLD_CTBM_P3_HW_CTRL__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_P3_HW_CTRL__SIZE
CYFLD_CTBM_P3_HW_CTRL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_CTB_SW_STATUS
CYREG_CTBM0_CTB_SW_STATUS EQU 0x403000c4
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0O_D51_STAT__OFFSET
CYFLD_CTBM_OA0O_D51_STAT__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0O_D51_STAT__SIZE
CYFLD_CTBM_OA0O_D51_STAT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D52_STAT__OFFSET
CYFLD_CTBM_OA1O_D52_STAT__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D52_STAT__SIZE
CYFLD_CTBM_OA1O_D52_STAT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D62_STAT__OFFSET
CYFLD_CTBM_OA1O_D62_STAT__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1O_D62_STAT__SIZE
CYFLD_CTBM_OA1O_D62_STAT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA0_OFFSET_TRIM
CYREG_CTBM0_OA0_OFFSET_TRIM EQU 0x40300f00
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_OFFSET_TRIM__OFFSET
CYFLD_CTBM_OA0_OFFSET_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_OFFSET_TRIM__SIZE
CYFLD_CTBM_OA0_OFFSET_TRIM__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA0_SLOPE_OFFSET_TRIM
CYREG_CTBM0_OA0_SLOPE_OFFSET_TRIM EQU 0x40300f04
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_SLOPE_OFFSET_TRIM__OFFSET
CYFLD_CTBM_OA0_SLOPE_OFFSET_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_SLOPE_OFFSET_TRIM__SIZE
CYFLD_CTBM_OA0_SLOPE_OFFSET_TRIM__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA0_COMP_TRIM
CYREG_CTBM0_OA0_COMP_TRIM EQU 0x40300f08
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP_TRIM__OFFSET
CYFLD_CTBM_OA0_COMP_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA0_COMP_TRIM__SIZE
CYFLD_CTBM_OA0_COMP_TRIM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA1_OFFSET_TRIM
CYREG_CTBM0_OA1_OFFSET_TRIM EQU 0x40300f0c
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_OFFSET_TRIM__OFFSET
CYFLD_CTBM_OA1_OFFSET_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_OFFSET_TRIM__SIZE
CYFLD_CTBM_OA1_OFFSET_TRIM__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA1_SLOPE_OFFSET_TRIM
CYREG_CTBM0_OA1_SLOPE_OFFSET_TRIM EQU 0x40300f10
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_SLOPE_OFFSET_TRIM__OFFSET
CYFLD_CTBM_OA1_SLOPE_OFFSET_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_SLOPE_OFFSET_TRIM__SIZE
CYFLD_CTBM_OA1_SLOPE_OFFSET_TRIM__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM0_OA1_COMP_TRIM
CYREG_CTBM0_OA1_COMP_TRIM EQU 0x40300f14
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP_TRIM__OFFSET
CYFLD_CTBM_OA1_COMP_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CTBM_OA1_COMP_TRIM__SIZE
CYFLD_CTBM_OA1_COMP_TRIM__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYDEV_CTBM1_BASE
CYDEV_CTBM1_BASE EQU 0x40310000
    ENDIF
    IF :LNOT::DEF:CYDEV_CTBM1_SIZE
CYDEV_CTBM1_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_CTB_CTRL
CYREG_CTBM1_CTB_CTRL EQU 0x40310000
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA_RES0_CTRL
CYREG_CTBM1_OA_RES0_CTRL EQU 0x40310004
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA_RES1_CTRL
CYREG_CTBM1_OA_RES1_CTRL EQU 0x40310008
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_COMP_STAT
CYREG_CTBM1_COMP_STAT EQU 0x4031000c
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_INTR
CYREG_CTBM1_INTR EQU 0x40310020
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_INTR_SET
CYREG_CTBM1_INTR_SET EQU 0x40310024
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_INTR_MASK
CYREG_CTBM1_INTR_MASK EQU 0x40310028
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_INTR_MASKED
CYREG_CTBM1_INTR_MASKED EQU 0x4031002c
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_DFT_CTRL
CYREG_CTBM1_DFT_CTRL EQU 0x40310030
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA0_SW
CYREG_CTBM1_OA0_SW EQU 0x40310080
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA0_SW_CLEAR
CYREG_CTBM1_OA0_SW_CLEAR EQU 0x40310084
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA1_SW
CYREG_CTBM1_OA1_SW EQU 0x40310088
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA1_SW_CLEAR
CYREG_CTBM1_OA1_SW_CLEAR EQU 0x4031008c
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_CTB_SW_HW_CTRL
CYREG_CTBM1_CTB_SW_HW_CTRL EQU 0x403100c0
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_CTB_SW_STATUS
CYREG_CTBM1_CTB_SW_STATUS EQU 0x403100c4
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA0_OFFSET_TRIM
CYREG_CTBM1_OA0_OFFSET_TRIM EQU 0x40310f00
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA0_SLOPE_OFFSET_TRIM
CYREG_CTBM1_OA0_SLOPE_OFFSET_TRIM EQU 0x40310f04
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA0_COMP_TRIM
CYREG_CTBM1_OA0_COMP_TRIM EQU 0x40310f08
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA1_OFFSET_TRIM
CYREG_CTBM1_OA1_OFFSET_TRIM EQU 0x40310f0c
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA1_SLOPE_OFFSET_TRIM
CYREG_CTBM1_OA1_SLOPE_OFFSET_TRIM EQU 0x40310f10
    ENDIF
    IF :LNOT::DEF:CYREG_CTBM1_OA1_COMP_TRIM
CYREG_CTBM1_OA1_COMP_TRIM EQU 0x40310f14
    ENDIF
    IF :LNOT::DEF:CYDEV_SAR_BASE
CYDEV_SAR_BASE EQU 0x403a0000
    ENDIF
    IF :LNOT::DEF:CYDEV_SAR_SIZE
CYDEV_SAR_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CTRL
CYREG_SAR_CTRL EQU 0x403a0000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_VREF_SEL__OFFSET
CYFLD_SAR_VREF_SEL__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_VREF_SEL__SIZE
CYFLD_SAR_VREF_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF0
CYVAL_SAR_VREF_SEL_VREF0 EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF1
CYVAL_SAR_VREF_SEL_VREF1 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF2
CYVAL_SAR_VREF_SEL_VREF2 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF_AROUTE
CYVAL_SAR_VREF_SEL_VREF_AROUTE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VBGR
CYVAL_SAR_VREF_SEL_VBGR EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VREF_EXT
CYVAL_SAR_VREF_SEL_VREF_EXT EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VDDA_DIV_2
CYVAL_SAR_VREF_SEL_VDDA_DIV_2 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_VREF_SEL_VDDA
CYVAL_SAR_VREF_SEL_VDDA EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_VREF_BYP_CAP_EN__OFFSET
CYFLD_SAR_VREF_BYP_CAP_EN__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_VREF_BYP_CAP_EN__SIZE
CYFLD_SAR_VREF_BYP_CAP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_NEG_SEL__OFFSET
CYFLD_SAR_NEG_SEL__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_NEG_SEL__SIZE
CYFLD_SAR_NEG_SEL__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_VSSA_KELVIN
CYVAL_SAR_NEG_SEL_VSSA_KELVIN EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_ART_VSSA
CYVAL_SAR_NEG_SEL_ART_VSSA EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_P1
CYVAL_SAR_NEG_SEL_P1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_P3
CYVAL_SAR_NEG_SEL_P3 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_P5
CYVAL_SAR_NEG_SEL_P5 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_P7
CYVAL_SAR_NEG_SEL_P7 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_ACORE
CYVAL_SAR_NEG_SEL_ACORE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_NEG_SEL_VREF
CYVAL_SAR_NEG_SEL_VREF EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAR_HW_CTRL_NEGVREF__OFFSET
CYFLD_SAR_SAR_HW_CTRL_NEGVREF__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAR_HW_CTRL_NEGVREF__SIZE
CYFLD_SAR_SAR_HW_CTRL_NEGVREF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_PWR_CTRL_VREF__OFFSET
CYFLD_SAR_PWR_CTRL_VREF__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_PWR_CTRL_VREF__SIZE
CYFLD_SAR_PWR_CTRL_VREF__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PWR_CTRL_VREF_NORMAL_PWR
CYVAL_SAR_PWR_CTRL_VREF_NORMAL_PWR EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PWR_CTRL_VREF_HALF_PWR
CYVAL_SAR_PWR_CTRL_VREF_HALF_PWR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PWR_CTRL_VREF_THIRD_PWR
CYVAL_SAR_PWR_CTRL_VREF_THIRD_PWR EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PWR_CTRL_VREF_QUARTER_PWR
CYVAL_SAR_PWR_CTRL_VREF_QUARTER_PWR EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SPARE__OFFSET
CYFLD_SAR_SPARE__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SPARE__SIZE
CYFLD_SAR_SPARE__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_BOOSTPUMP_EN__OFFSET
CYFLD_SAR_BOOSTPUMP_EN__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_BOOSTPUMP_EN__SIZE
CYFLD_SAR_BOOSTPUMP_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_ICONT_LV__OFFSET
CYFLD_SAR_ICONT_LV__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_ICONT_LV__SIZE
CYFLD_SAR_ICONT_LV__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_ICONT_LV_NORMAL_PWR
CYVAL_SAR_ICONT_LV_NORMAL_PWR EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_ICONT_LV_HALF_PWR
CYVAL_SAR_ICONT_LV_HALF_PWR EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_ICONT_LV_MORE_PWR
CYVAL_SAR_ICONT_LV_MORE_PWR EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_ICONT_LV_QUARTER_PWR
CYVAL_SAR_ICONT_LV_QUARTER_PWR EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DEEPSLEEP_ON__OFFSET
CYFLD_SAR_DEEPSLEEP_ON__OFFSET EQU 0x0000001b
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DEEPSLEEP_ON__SIZE
CYFLD_SAR_DEEPSLEEP_ON__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_SYNC_CONFIG__OFFSET
CYFLD_SAR_DSI_SYNC_CONFIG__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_SYNC_CONFIG__SIZE
CYFLD_SAR_DSI_SYNC_CONFIG__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_MODE__OFFSET
CYFLD_SAR_DSI_MODE__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_MODE__SIZE
CYFLD_SAR_DSI_MODE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SWITCH_DISABLE__OFFSET
CYFLD_SAR_SWITCH_DISABLE__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SWITCH_DISABLE__SIZE
CYFLD_SAR_SWITCH_DISABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_ENABLED__OFFSET
CYFLD_SAR_ENABLED__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_ENABLED__SIZE
CYFLD_SAR_ENABLED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_SAMPLE_CTRL
CYREG_SAR_SAMPLE_CTRL EQU 0x403a0004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SUB_RESOLUTION__OFFSET
CYFLD_SAR_SUB_RESOLUTION__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SUB_RESOLUTION__SIZE
CYFLD_SAR_SUB_RESOLUTION__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_SUB_RESOLUTION_8B
CYVAL_SAR_SUB_RESOLUTION_8B EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_SUB_RESOLUTION_10B
CYVAL_SAR_SUB_RESOLUTION_10B EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_LEFT_ALIGN__OFFSET
CYFLD_SAR_LEFT_ALIGN__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_LEFT_ALIGN__SIZE
CYFLD_SAR_LEFT_ALIGN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SINGLE_ENDED_SIGNED__OFFSET
CYFLD_SAR_SINGLE_ENDED_SIGNED__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SINGLE_ENDED_SIGNED__SIZE
CYFLD_SAR_SINGLE_ENDED_SIGNED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_SINGLE_ENDED_SIGNED_UNSIGNED
CYVAL_SAR_SINGLE_ENDED_SIGNED_UNSIGNED EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_SINGLE_ENDED_SIGNED_SIGNED
CYVAL_SAR_SINGLE_ENDED_SIGNED_SIGNED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DIFFERENTIAL_SIGNED__OFFSET
CYFLD_SAR_DIFFERENTIAL_SIGNED__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DIFFERENTIAL_SIGNED__SIZE
CYFLD_SAR_DIFFERENTIAL_SIGNED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_DIFFERENTIAL_SIGNED_UNSIGNED
CYVAL_SAR_DIFFERENTIAL_SIGNED_UNSIGNED EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_DIFFERENTIAL_SIGNED_SIGNED
CYVAL_SAR_DIFFERENTIAL_SIGNED_SIGNED EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_AVG_CNT__OFFSET
CYFLD_SAR_AVG_CNT__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_AVG_CNT__SIZE
CYFLD_SAR_AVG_CNT__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_AVG_SHIFT__OFFSET
CYFLD_SAR_AVG_SHIFT__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_AVG_SHIFT__SIZE
CYFLD_SAR_AVG_SHIFT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CONTINUOUS__OFFSET
CYFLD_SAR_CONTINUOUS__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CONTINUOUS__SIZE
CYFLD_SAR_CONTINUOUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_TRIGGER_EN__OFFSET
CYFLD_SAR_DSI_TRIGGER_EN__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_TRIGGER_EN__SIZE
CYFLD_SAR_DSI_TRIGGER_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_TRIGGER_LEVEL__OFFSET
CYFLD_SAR_DSI_TRIGGER_LEVEL__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_TRIGGER_LEVEL__SIZE
CYFLD_SAR_DSI_TRIGGER_LEVEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_SYNC_TRIGGER__OFFSET
CYFLD_SAR_DSI_SYNC_TRIGGER__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_SYNC_TRIGGER__SIZE
CYFLD_SAR_DSI_SYNC_TRIGGER__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_DSI_OUT_EN__OFFSET
CYFLD_SAR_EOS_DSI_OUT_EN__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_DSI_OUT_EN__SIZE
CYFLD_SAR_EOS_DSI_OUT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_SAMPLE_TIME01
CYREG_SAR_SAMPLE_TIME01 EQU 0x403a0010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME0__OFFSET
CYFLD_SAR_SAMPLE_TIME0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME0__SIZE
CYFLD_SAR_SAMPLE_TIME0__SIZE EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME1__OFFSET
CYFLD_SAR_SAMPLE_TIME1__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME1__SIZE
CYFLD_SAR_SAMPLE_TIME1__SIZE EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_SAMPLE_TIME23
CYREG_SAR_SAMPLE_TIME23 EQU 0x403a0014
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME2__OFFSET
CYFLD_SAR_SAMPLE_TIME2__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME2__SIZE
CYFLD_SAR_SAMPLE_TIME2__SIZE EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME3__OFFSET
CYFLD_SAR_SAMPLE_TIME3__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME3__SIZE
CYFLD_SAR_SAMPLE_TIME3__SIZE EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_RANGE_THRES
CYREG_SAR_RANGE_THRES EQU 0x403a0018
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_LOW__OFFSET
CYFLD_SAR_RANGE_LOW__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_LOW__SIZE
CYFLD_SAR_RANGE_LOW__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_HIGH__OFFSET
CYFLD_SAR_RANGE_HIGH__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_HIGH__SIZE
CYFLD_SAR_RANGE_HIGH__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_RANGE_COND
CYREG_SAR_RANGE_COND EQU 0x403a001c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_COND__OFFSET
CYFLD_SAR_RANGE_COND__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_COND__SIZE
CYFLD_SAR_RANGE_COND__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_RANGE_COND_BELOW
CYVAL_SAR_RANGE_COND_BELOW EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_RANGE_COND_INSIDE
CYVAL_SAR_RANGE_COND_INSIDE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_RANGE_COND_ABOVE
CYVAL_SAR_RANGE_COND_ABOVE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_RANGE_COND_OUTSIDE
CYVAL_SAR_RANGE_COND_OUTSIDE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_EN
CYREG_SAR_CHAN_EN EQU 0x403a0020
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_EN__OFFSET
CYFLD_SAR_CHAN_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_EN__SIZE
CYFLD_SAR_CHAN_EN__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_START_CTRL
CYREG_SAR_START_CTRL EQU 0x403a0024
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_TRIGGER__OFFSET
CYFLD_SAR_FW_TRIGGER__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_TRIGGER__SIZE
CYFLD_SAR_FW_TRIGGER__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_DFT_CTRL
CYREG_SAR_DFT_CTRL EQU 0x403a0030
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DLY_INC__OFFSET
CYFLD_SAR_DLY_INC__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DLY_INC__SIZE
CYFLD_SAR_DLY_INC__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_HIZ__OFFSET
CYFLD_SAR_HIZ__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_HIZ__SIZE
CYFLD_SAR_HIZ__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DFT_INC__OFFSET
CYFLD_SAR_DFT_INC__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DFT_INC__SIZE
CYFLD_SAR_DFT_INC__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DFT_OUTC__OFFSET
CYFLD_SAR_DFT_OUTC__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DFT_OUTC__SIZE
CYFLD_SAR_DFT_OUTC__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SEL_CSEL_DFT__OFFSET
CYFLD_SAR_SEL_CSEL_DFT__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SEL_CSEL_DFT__SIZE
CYFLD_SAR_SEL_CSEL_DFT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EN_CSEL_DFT__OFFSET
CYFLD_SAR_EN_CSEL_DFT__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EN_CSEL_DFT__SIZE
CYFLD_SAR_EN_CSEL_DFT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DCEN__OFFSET
CYFLD_SAR_DCEN__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DCEN__SIZE
CYFLD_SAR_DCEN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_ADFT_OVERRIDE__OFFSET
CYFLD_SAR_ADFT_OVERRIDE__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_ADFT_OVERRIDE__SIZE
CYFLD_SAR_ADFT_OVERRIDE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG0
CYREG_SAR_CHAN_CONFIG0 EQU 0x403a0080
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_PIN_ADDR__OFFSET
CYFLD_SAR_PIN_ADDR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_PIN_ADDR__SIZE
CYFLD_SAR_PIN_ADDR__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_PORT_ADDR__OFFSET
CYFLD_SAR_PORT_ADDR__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_PORT_ADDR__SIZE
CYFLD_SAR_PORT_ADDR__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_SARMUX
CYVAL_SAR_PORT_ADDR_SARMUX EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_CTB0
CYVAL_SAR_PORT_ADDR_CTB0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_CTB1
CYVAL_SAR_PORT_ADDR_CTB1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_CTB2
CYVAL_SAR_PORT_ADDR_CTB2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_CTB3
CYVAL_SAR_PORT_ADDR_CTB3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_AROUTE_VIRT2
CYVAL_SAR_PORT_ADDR_AROUTE_VIRT2 EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_AROUTE_VIRT1
CYVAL_SAR_PORT_ADDR_AROUTE_VIRT1 EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_PORT_ADDR_SARMUX_VIRT
CYVAL_SAR_PORT_ADDR_SARMUX_VIRT EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DIFFERENTIAL_EN__OFFSET
CYFLD_SAR_DIFFERENTIAL_EN__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DIFFERENTIAL_EN__SIZE
CYFLD_SAR_DIFFERENTIAL_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RESOLUTION__OFFSET
CYFLD_SAR_RESOLUTION__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RESOLUTION__SIZE
CYFLD_SAR_RESOLUTION__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_RESOLUTION_MAXRES
CYVAL_SAR_RESOLUTION_MAXRES EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_RESOLUTION_SUBRES
CYVAL_SAR_RESOLUTION_SUBRES EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_AVG_EN__OFFSET
CYFLD_SAR_AVG_EN__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_AVG_EN__SIZE
CYFLD_SAR_AVG_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME_SEL__OFFSET
CYFLD_SAR_SAMPLE_TIME_SEL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SAMPLE_TIME_SEL__SIZE
CYFLD_SAR_SAMPLE_TIME_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_OUT_EN__OFFSET
CYFLD_SAR_DSI_OUT_EN__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_OUT_EN__SIZE
CYFLD_SAR_DSI_OUT_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG1
CYREG_SAR_CHAN_CONFIG1 EQU 0x403a0084
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG2
CYREG_SAR_CHAN_CONFIG2 EQU 0x403a0088
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG3
CYREG_SAR_CHAN_CONFIG3 EQU 0x403a008c
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG4
CYREG_SAR_CHAN_CONFIG4 EQU 0x403a0090
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG5
CYREG_SAR_CHAN_CONFIG5 EQU 0x403a0094
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG6
CYREG_SAR_CHAN_CONFIG6 EQU 0x403a0098
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG7
CYREG_SAR_CHAN_CONFIG7 EQU 0x403a009c
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG8
CYREG_SAR_CHAN_CONFIG8 EQU 0x403a00a0
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG9
CYREG_SAR_CHAN_CONFIG9 EQU 0x403a00a4
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG10
CYREG_SAR_CHAN_CONFIG10 EQU 0x403a00a8
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG11
CYREG_SAR_CHAN_CONFIG11 EQU 0x403a00ac
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG12
CYREG_SAR_CHAN_CONFIG12 EQU 0x403a00b0
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG13
CYREG_SAR_CHAN_CONFIG13 EQU 0x403a00b4
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG14
CYREG_SAR_CHAN_CONFIG14 EQU 0x403a00b8
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG15
CYREG_SAR_CHAN_CONFIG15 EQU 0x403a00bc
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK0
CYREG_SAR_CHAN_WORK0 EQU 0x403a0100
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_WORK__OFFSET
CYFLD_SAR_WORK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_WORK__SIZE
CYFLD_SAR_WORK__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_WORK_VALID_MIR__OFFSET
CYFLD_SAR_CHAN_WORK_VALID_MIR__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_WORK_VALID_MIR__SIZE
CYFLD_SAR_CHAN_WORK_VALID_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK1
CYREG_SAR_CHAN_WORK1 EQU 0x403a0104
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK2
CYREG_SAR_CHAN_WORK2 EQU 0x403a0108
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK3
CYREG_SAR_CHAN_WORK3 EQU 0x403a010c
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK4
CYREG_SAR_CHAN_WORK4 EQU 0x403a0110
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK5
CYREG_SAR_CHAN_WORK5 EQU 0x403a0114
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK6
CYREG_SAR_CHAN_WORK6 EQU 0x403a0118
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK7
CYREG_SAR_CHAN_WORK7 EQU 0x403a011c
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK8
CYREG_SAR_CHAN_WORK8 EQU 0x403a0120
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK9
CYREG_SAR_CHAN_WORK9 EQU 0x403a0124
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK10
CYREG_SAR_CHAN_WORK10 EQU 0x403a0128
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK11
CYREG_SAR_CHAN_WORK11 EQU 0x403a012c
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK12
CYREG_SAR_CHAN_WORK12 EQU 0x403a0130
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK13
CYREG_SAR_CHAN_WORK13 EQU 0x403a0134
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK14
CYREG_SAR_CHAN_WORK14 EQU 0x403a0138
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK15
CYREG_SAR_CHAN_WORK15 EQU 0x403a013c
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT0
CYREG_SAR_CHAN_RESULT0 EQU 0x403a0180
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RESULT__OFFSET
CYFLD_SAR_RESULT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RESULT__SIZE
CYFLD_SAR_RESULT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_INTR_MIR__OFFSET
CYFLD_SAR_SATURATE_INTR_MIR__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_INTR_MIR__SIZE
CYFLD_SAR_SATURATE_INTR_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_INTR_MIR__OFFSET
CYFLD_SAR_RANGE_INTR_MIR__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_INTR_MIR__SIZE
CYFLD_SAR_RANGE_INTR_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_RESULT_VALID_MIR__OFFSET
CYFLD_SAR_CHAN_RESULT_VALID_MIR__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_RESULT_VALID_MIR__SIZE
CYFLD_SAR_CHAN_RESULT_VALID_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT1
CYREG_SAR_CHAN_RESULT1 EQU 0x403a0184
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT2
CYREG_SAR_CHAN_RESULT2 EQU 0x403a0188
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT3
CYREG_SAR_CHAN_RESULT3 EQU 0x403a018c
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT4
CYREG_SAR_CHAN_RESULT4 EQU 0x403a0190
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT5
CYREG_SAR_CHAN_RESULT5 EQU 0x403a0194
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT6
CYREG_SAR_CHAN_RESULT6 EQU 0x403a0198
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT7
CYREG_SAR_CHAN_RESULT7 EQU 0x403a019c
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT8
CYREG_SAR_CHAN_RESULT8 EQU 0x403a01a0
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT9
CYREG_SAR_CHAN_RESULT9 EQU 0x403a01a4
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT10
CYREG_SAR_CHAN_RESULT10 EQU 0x403a01a8
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT11
CYREG_SAR_CHAN_RESULT11 EQU 0x403a01ac
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT12
CYREG_SAR_CHAN_RESULT12 EQU 0x403a01b0
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT13
CYREG_SAR_CHAN_RESULT13 EQU 0x403a01b4
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT14
CYREG_SAR_CHAN_RESULT14 EQU 0x403a01b8
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT15
CYREG_SAR_CHAN_RESULT15 EQU 0x403a01bc
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK_VALID
CYREG_SAR_CHAN_WORK_VALID EQU 0x403a0200
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_WORK_VALID__OFFSET
CYFLD_SAR_CHAN_WORK_VALID__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_WORK_VALID__SIZE
CYFLD_SAR_CHAN_WORK_VALID__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT_VALID
CYREG_SAR_CHAN_RESULT_VALID EQU 0x403a0204
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_RESULT_VALID__OFFSET
CYFLD_SAR_CHAN_RESULT_VALID__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CHAN_RESULT_VALID__SIZE
CYFLD_SAR_CHAN_RESULT_VALID__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_STATUS
CYREG_SAR_STATUS EQU 0x403a0208
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CUR_CHAN__OFFSET
CYFLD_SAR_CUR_CHAN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CUR_CHAN__SIZE
CYFLD_SAR_CUR_CHAN__SIZE EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SW_VREF_NEG__OFFSET
CYFLD_SAR_SW_VREF_NEG__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SW_VREF_NEG__SIZE
CYFLD_SAR_SW_VREF_NEG__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_BUSY__OFFSET
CYFLD_SAR_BUSY__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_BUSY__SIZE
CYFLD_SAR_BUSY__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_AVG_STAT
CYREG_SAR_AVG_STAT EQU 0x403a020c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CUR_AVG_ACCU__OFFSET
CYFLD_SAR_CUR_AVG_ACCU__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CUR_AVG_ACCU__SIZE
CYFLD_SAR_CUR_AVG_ACCU__SIZE EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CUR_AVG_CNT__OFFSET
CYFLD_SAR_CUR_AVG_CNT__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CUR_AVG_CNT__SIZE
CYFLD_SAR_CUR_AVG_CNT__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_INTR
CYREG_SAR_INTR EQU 0x403a0210
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_INTR__OFFSET
CYFLD_SAR_EOS_INTR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_INTR__SIZE
CYFLD_SAR_EOS_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_INTR__OFFSET
CYFLD_SAR_OVERFLOW_INTR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_INTR__SIZE
CYFLD_SAR_OVERFLOW_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_INTR__OFFSET
CYFLD_SAR_FW_COLLISION_INTR__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_INTR__SIZE
CYFLD_SAR_FW_COLLISION_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_INTR__OFFSET
CYFLD_SAR_DSI_COLLISION_INTR__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_INTR__SIZE
CYFLD_SAR_DSI_COLLISION_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_INTR__OFFSET
CYFLD_SAR_INJ_EOC_INTR__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_INTR__SIZE
CYFLD_SAR_INJ_EOC_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_INTR__OFFSET
CYFLD_SAR_INJ_SATURATE_INTR__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_INTR__SIZE
CYFLD_SAR_INJ_SATURATE_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_INTR__OFFSET
CYFLD_SAR_INJ_RANGE_INTR__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_INTR__SIZE
CYFLD_SAR_INJ_RANGE_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_INTR__OFFSET
CYFLD_SAR_INJ_COLLISION_INTR__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_INTR__SIZE
CYFLD_SAR_INJ_COLLISION_INTR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_INTR_SET
CYREG_SAR_INTR_SET EQU 0x403a0214
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_SET__OFFSET
CYFLD_SAR_EOS_SET__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_SET__SIZE
CYFLD_SAR_EOS_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_SET__OFFSET
CYFLD_SAR_OVERFLOW_SET__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_SET__SIZE
CYFLD_SAR_OVERFLOW_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_SET__OFFSET
CYFLD_SAR_FW_COLLISION_SET__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_SET__SIZE
CYFLD_SAR_FW_COLLISION_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_SET__OFFSET
CYFLD_SAR_DSI_COLLISION_SET__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_SET__SIZE
CYFLD_SAR_DSI_COLLISION_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_SET__OFFSET
CYFLD_SAR_INJ_EOC_SET__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_SET__SIZE
CYFLD_SAR_INJ_EOC_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_SET__OFFSET
CYFLD_SAR_INJ_SATURATE_SET__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_SET__SIZE
CYFLD_SAR_INJ_SATURATE_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_SET__OFFSET
CYFLD_SAR_INJ_RANGE_SET__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_SET__SIZE
CYFLD_SAR_INJ_RANGE_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_SET__OFFSET
CYFLD_SAR_INJ_COLLISION_SET__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_SET__SIZE
CYFLD_SAR_INJ_COLLISION_SET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_INTR_MASK
CYREG_SAR_INTR_MASK EQU 0x403a0218
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_MASK__OFFSET
CYFLD_SAR_EOS_MASK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_MASK__SIZE
CYFLD_SAR_EOS_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASK__OFFSET
CYFLD_SAR_OVERFLOW_MASK__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASK__SIZE
CYFLD_SAR_OVERFLOW_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASK__OFFSET
CYFLD_SAR_FW_COLLISION_MASK__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASK__SIZE
CYFLD_SAR_FW_COLLISION_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASK__OFFSET
CYFLD_SAR_DSI_COLLISION_MASK__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASK__SIZE
CYFLD_SAR_DSI_COLLISION_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASK__OFFSET
CYFLD_SAR_INJ_EOC_MASK__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASK__SIZE
CYFLD_SAR_INJ_EOC_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASK__OFFSET
CYFLD_SAR_INJ_SATURATE_MASK__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASK__SIZE
CYFLD_SAR_INJ_SATURATE_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASK__OFFSET
CYFLD_SAR_INJ_RANGE_MASK__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASK__SIZE
CYFLD_SAR_INJ_RANGE_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASK__OFFSET
CYFLD_SAR_INJ_COLLISION_MASK__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASK__SIZE
CYFLD_SAR_INJ_COLLISION_MASK__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_INTR_MASKED
CYREG_SAR_INTR_MASKED EQU 0x403a021c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_MASKED__OFFSET
CYFLD_SAR_EOS_MASKED__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_MASKED__SIZE
CYFLD_SAR_EOS_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASKED__OFFSET
CYFLD_SAR_OVERFLOW_MASKED__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASKED__SIZE
CYFLD_SAR_OVERFLOW_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASKED__OFFSET
CYFLD_SAR_FW_COLLISION_MASKED__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASKED__SIZE
CYFLD_SAR_FW_COLLISION_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASKED__OFFSET
CYFLD_SAR_DSI_COLLISION_MASKED__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASKED__SIZE
CYFLD_SAR_DSI_COLLISION_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASKED__OFFSET
CYFLD_SAR_INJ_EOC_MASKED__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASKED__SIZE
CYFLD_SAR_INJ_EOC_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASKED__OFFSET
CYFLD_SAR_INJ_SATURATE_MASKED__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASKED__SIZE
CYFLD_SAR_INJ_SATURATE_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASKED__OFFSET
CYFLD_SAR_INJ_RANGE_MASKED__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASKED__SIZE
CYFLD_SAR_INJ_RANGE_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASKED__OFFSET
CYFLD_SAR_INJ_COLLISION_MASKED__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASKED__SIZE
CYFLD_SAR_INJ_COLLISION_MASKED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_SATURATE_INTR
CYREG_SAR_SATURATE_INTR EQU 0x403a0220
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_INTR__OFFSET
CYFLD_SAR_SATURATE_INTR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_INTR__SIZE
CYFLD_SAR_SATURATE_INTR__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_SATURATE_INTR_SET
CYREG_SAR_SATURATE_INTR_SET EQU 0x403a0224
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_SET__OFFSET
CYFLD_SAR_SATURATE_SET__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_SET__SIZE
CYFLD_SAR_SATURATE_SET__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_SATURATE_INTR_MASK
CYREG_SAR_SATURATE_INTR_MASK EQU 0x403a0228
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASK__OFFSET
CYFLD_SAR_SATURATE_MASK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASK__SIZE
CYFLD_SAR_SATURATE_MASK__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_SATURATE_INTR_MASKED
CYREG_SAR_SATURATE_INTR_MASKED EQU 0x403a022c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASKED__OFFSET
CYFLD_SAR_SATURATE_MASKED__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASKED__SIZE
CYFLD_SAR_SATURATE_MASKED__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_RANGE_INTR
CYREG_SAR_RANGE_INTR EQU 0x403a0230
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_INTR__OFFSET
CYFLD_SAR_RANGE_INTR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_INTR__SIZE
CYFLD_SAR_RANGE_INTR__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_RANGE_INTR_SET
CYREG_SAR_RANGE_INTR_SET EQU 0x403a0234
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_SET__OFFSET
CYFLD_SAR_RANGE_SET__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_SET__SIZE
CYFLD_SAR_RANGE_SET__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_RANGE_INTR_MASK
CYREG_SAR_RANGE_INTR_MASK EQU 0x403a0238
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_MASK__OFFSET
CYFLD_SAR_RANGE_MASK__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_MASK__SIZE
CYFLD_SAR_RANGE_MASK__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_RANGE_INTR_MASKED
CYREG_SAR_RANGE_INTR_MASKED EQU 0x403a023c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_MASKED__OFFSET
CYFLD_SAR_RANGE_MASKED__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_MASKED__SIZE
CYFLD_SAR_RANGE_MASKED__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_INTR_CAUSE
CYREG_SAR_INTR_CAUSE EQU 0x403a0240
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_MASKED_MIR__OFFSET
CYFLD_SAR_EOS_MASKED_MIR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_EOS_MASKED_MIR__SIZE
CYFLD_SAR_EOS_MASKED_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASKED_MIR__OFFSET
CYFLD_SAR_OVERFLOW_MASKED_MIR__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_OVERFLOW_MASKED_MIR__SIZE
CYFLD_SAR_OVERFLOW_MASKED_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASKED_MIR__OFFSET
CYFLD_SAR_FW_COLLISION_MASKED_MIR__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_FW_COLLISION_MASKED_MIR__SIZE
CYFLD_SAR_FW_COLLISION_MASKED_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASKED_MIR__OFFSET
CYFLD_SAR_DSI_COLLISION_MASKED_MIR__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_DSI_COLLISION_MASKED_MIR__SIZE
CYFLD_SAR_DSI_COLLISION_MASKED_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASKED_MIR__OFFSET
CYFLD_SAR_INJ_EOC_MASKED_MIR__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_MASKED_MIR__SIZE
CYFLD_SAR_INJ_EOC_MASKED_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASKED_MIR__OFFSET
CYFLD_SAR_INJ_SATURATE_MASKED_MIR__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_MASKED_MIR__SIZE
CYFLD_SAR_INJ_SATURATE_MASKED_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASKED_MIR__OFFSET
CYFLD_SAR_INJ_RANGE_MASKED_MIR__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_MASKED_MIR__SIZE
CYFLD_SAR_INJ_RANGE_MASKED_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASKED_MIR__OFFSET
CYFLD_SAR_INJ_COLLISION_MASKED_MIR__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_MASKED_MIR__SIZE
CYFLD_SAR_INJ_COLLISION_MASKED_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASKED_RED__OFFSET
CYFLD_SAR_SATURATE_MASKED_RED__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_SATURATE_MASKED_RED__SIZE
CYFLD_SAR_SATURATE_MASKED_RED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_MASKED_RED__OFFSET
CYFLD_SAR_RANGE_MASKED_RED__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_RANGE_MASKED_RED__SIZE
CYFLD_SAR_RANGE_MASKED_RED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_INJ_CHAN_CONFIG
CYREG_SAR_INJ_CHAN_CONFIG EQU 0x403a0280
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_PIN_ADDR__OFFSET
CYFLD_SAR_INJ_PIN_ADDR__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_PIN_ADDR__SIZE
CYFLD_SAR_INJ_PIN_ADDR__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_PORT_ADDR__OFFSET
CYFLD_SAR_INJ_PORT_ADDR__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_PORT_ADDR__SIZE
CYFLD_SAR_INJ_PORT_ADDR__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_SARMUX
CYVAL_SAR_INJ_PORT_ADDR_SARMUX EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_CTB0
CYVAL_SAR_INJ_PORT_ADDR_CTB0 EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_CTB1
CYVAL_SAR_INJ_PORT_ADDR_CTB1 EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_CTB2
CYVAL_SAR_INJ_PORT_ADDR_CTB2 EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_CTB3
CYVAL_SAR_INJ_PORT_ADDR_CTB3 EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_AROUTE_VIRT
CYVAL_SAR_INJ_PORT_ADDR_AROUTE_VIRT EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_INJ_PORT_ADDR_SARMUX_VIRT
CYVAL_SAR_INJ_PORT_ADDR_SARMUX_VIRT EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_DIFFERENTIAL_EN__OFFSET
CYFLD_SAR_INJ_DIFFERENTIAL_EN__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_DIFFERENTIAL_EN__SIZE
CYFLD_SAR_INJ_DIFFERENTIAL_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RESOLUTION__OFFSET
CYFLD_SAR_INJ_RESOLUTION__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RESOLUTION__SIZE
CYFLD_SAR_INJ_RESOLUTION__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_INJ_RESOLUTION_12B
CYVAL_SAR_INJ_RESOLUTION_12B EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_INJ_RESOLUTION_SUBRES
CYVAL_SAR_INJ_RESOLUTION_SUBRES EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_AVG_EN__OFFSET
CYFLD_SAR_INJ_AVG_EN__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_AVG_EN__SIZE
CYFLD_SAR_INJ_AVG_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SAMPLE_TIME_SEL__OFFSET
CYFLD_SAR_INJ_SAMPLE_TIME_SEL__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SAMPLE_TIME_SEL__SIZE
CYFLD_SAR_INJ_SAMPLE_TIME_SEL__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_TAILGATING__OFFSET
CYFLD_SAR_INJ_TAILGATING__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_TAILGATING__SIZE
CYFLD_SAR_INJ_TAILGATING__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_START_EN__OFFSET
CYFLD_SAR_INJ_START_EN__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_START_EN__SIZE
CYFLD_SAR_INJ_START_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_INJ_RESULT
CYREG_SAR_INJ_RESULT EQU 0x403a0290
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RESULT__OFFSET
CYFLD_SAR_INJ_RESULT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RESULT__SIZE
CYFLD_SAR_INJ_RESULT__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_INTR_MIR__OFFSET
CYFLD_SAR_INJ_COLLISION_INTR_MIR__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_COLLISION_INTR_MIR__SIZE
CYFLD_SAR_INJ_COLLISION_INTR_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_INTR_MIR__OFFSET
CYFLD_SAR_INJ_SATURATE_INTR_MIR__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_SATURATE_INTR_MIR__SIZE
CYFLD_SAR_INJ_SATURATE_INTR_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_INTR_MIR__OFFSET
CYFLD_SAR_INJ_RANGE_INTR_MIR__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_RANGE_INTR_MIR__SIZE
CYFLD_SAR_INJ_RANGE_INTR_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_INTR_MIR__OFFSET
CYFLD_SAR_INJ_EOC_INTR_MIR__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_INJ_EOC_INTR_MIR__SIZE
CYFLD_SAR_INJ_EOC_INTR_MIR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH0
CYREG_SAR_MUX_SWITCH0 EQU 0x403a0300
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P0_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P0_VPLUS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P0_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P0_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P1_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P1_VPLUS__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P1_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P1_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P2_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P2_VPLUS__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P2_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P2_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P3_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P3_VPLUS__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P3_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P3_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P4_VPLUS__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P4_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P5_VPLUS__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P5_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P6_VPLUS__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P6_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_P7_VPLUS__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_VPLUS__SIZE
CYFLD_SAR_MUX_FW_P7_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P0_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P0_VMINUS__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P0_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P0_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P1_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P1_VMINUS__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P1_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P1_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P2_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P2_VMINUS__OFFSET EQU 0x0000000a
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P2_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P2_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P3_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P3_VMINUS__OFFSET EQU 0x0000000b
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P3_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P3_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P4_VMINUS__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P4_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P5_VMINUS__OFFSET EQU 0x0000000d
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P5_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P6_VMINUS__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P6_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_P7_VMINUS__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_VMINUS__SIZE
CYFLD_SAR_MUX_FW_P7_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_VSSA_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_VSSA_VMINUS__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_VSSA_VMINUS__SIZE
CYFLD_SAR_MUX_FW_VSSA_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_TEMP_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_TEMP_VPLUS__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_TEMP_VPLUS__SIZE
CYFLD_SAR_MUX_FW_TEMP_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSA_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_AMUXBUSA_VPLUS__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSA_VPLUS__SIZE
CYFLD_SAR_MUX_FW_AMUXBUSA_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSB_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_AMUXBUSB_VPLUS__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSB_VPLUS__SIZE
CYFLD_SAR_MUX_FW_AMUXBUSB_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSA_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_AMUXBUSA_VMINUS__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSA_VMINUS__SIZE
CYFLD_SAR_MUX_FW_AMUXBUSA_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSB_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_AMUXBUSB_VMINUS__OFFSET EQU 0x00000015
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_AMUXBUSB_VMINUS__SIZE
CYFLD_SAR_MUX_FW_AMUXBUSB_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS0_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_SARBUS0_VPLUS__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS0_VPLUS__SIZE
CYFLD_SAR_MUX_FW_SARBUS0_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS1_VPLUS__OFFSET
CYFLD_SAR_MUX_FW_SARBUS1_VPLUS__OFFSET EQU 0x00000017
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS1_VPLUS__SIZE
CYFLD_SAR_MUX_FW_SARBUS1_VPLUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS0_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_SARBUS0_VMINUS__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS0_VMINUS__SIZE
CYFLD_SAR_MUX_FW_SARBUS0_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS1_VMINUS__OFFSET
CYFLD_SAR_MUX_FW_SARBUS1_VMINUS__OFFSET EQU 0x00000019
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_SARBUS1_VMINUS__SIZE
CYFLD_SAR_MUX_FW_SARBUS1_VMINUS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_COREIO0__OFFSET
CYFLD_SAR_MUX_FW_P4_COREIO0__OFFSET EQU 0x0000001a
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_COREIO0__SIZE
CYFLD_SAR_MUX_FW_P4_COREIO0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_COREIO1__OFFSET
CYFLD_SAR_MUX_FW_P5_COREIO1__OFFSET EQU 0x0000001b
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_COREIO1__SIZE
CYFLD_SAR_MUX_FW_P5_COREIO1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_COREIO2__OFFSET
CYFLD_SAR_MUX_FW_P6_COREIO2__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P6_COREIO2__SIZE
CYFLD_SAR_MUX_FW_P6_COREIO2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_COREIO3__OFFSET
CYFLD_SAR_MUX_FW_P7_COREIO3__OFFSET EQU 0x0000001d
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P7_COREIO3__SIZE
CYFLD_SAR_MUX_FW_P7_COREIO3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH_CLEAR0
CYREG_SAR_MUX_SWITCH_CLEAR0 EQU 0x403a0304
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH1
CYREG_SAR_MUX_SWITCH1 EQU 0x403a0308
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_DFT_INP__OFFSET
CYFLD_SAR_MUX_FW_P4_DFT_INP__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P4_DFT_INP__SIZE
CYFLD_SAR_MUX_FW_P4_DFT_INP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_DFT_INM__OFFSET
CYFLD_SAR_MUX_FW_P5_DFT_INM__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_P5_DFT_INM__SIZE
CYFLD_SAR_MUX_FW_P5_DFT_INM__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_ADFT0_SARBUS0__OFFSET
CYFLD_SAR_MUX_FW_ADFT0_SARBUS0__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_ADFT0_SARBUS0__SIZE
CYFLD_SAR_MUX_FW_ADFT0_SARBUS0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_ADFT1_SARBUS1__OFFSET
CYFLD_SAR_MUX_FW_ADFT1_SARBUS1__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_FW_ADFT1_SARBUS1__SIZE
CYFLD_SAR_MUX_FW_ADFT1_SARBUS1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH_CLEAR1
CYREG_SAR_MUX_SWITCH_CLEAR1 EQU 0x403a030c
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH_HW_CTRL
CYREG_SAR_MUX_SWITCH_HW_CTRL EQU 0x403a0340
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P0__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P0__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P0__SIZE
CYFLD_SAR_MUX_HW_CTRL_P0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P1__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P1__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P1__SIZE
CYFLD_SAR_MUX_HW_CTRL_P1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P2__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P2__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P2__SIZE
CYFLD_SAR_MUX_HW_CTRL_P2__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P3__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P3__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P3__SIZE
CYFLD_SAR_MUX_HW_CTRL_P3__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P4__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P4__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P4__SIZE
CYFLD_SAR_MUX_HW_CTRL_P4__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P5__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P5__OFFSET EQU 0x00000005
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P5__SIZE
CYFLD_SAR_MUX_HW_CTRL_P5__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P6__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P6__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P6__SIZE
CYFLD_SAR_MUX_HW_CTRL_P6__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P7__OFFSET
CYFLD_SAR_MUX_HW_CTRL_P7__OFFSET EQU 0x00000007
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_P7__SIZE
CYFLD_SAR_MUX_HW_CTRL_P7__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_VSSA__OFFSET
CYFLD_SAR_MUX_HW_CTRL_VSSA__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_VSSA__SIZE
CYFLD_SAR_MUX_HW_CTRL_VSSA__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_TEMP__OFFSET
CYFLD_SAR_MUX_HW_CTRL_TEMP__OFFSET EQU 0x00000011
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_TEMP__SIZE
CYFLD_SAR_MUX_HW_CTRL_TEMP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_AMUXBUSA__OFFSET
CYFLD_SAR_MUX_HW_CTRL_AMUXBUSA__OFFSET EQU 0x00000012
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_AMUXBUSA__SIZE
CYFLD_SAR_MUX_HW_CTRL_AMUXBUSA__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_AMUXBUSB__OFFSET
CYFLD_SAR_MUX_HW_CTRL_AMUXBUSB__OFFSET EQU 0x00000013
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_AMUXBUSB__SIZE
CYFLD_SAR_MUX_HW_CTRL_AMUXBUSB__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_SARBUS0__OFFSET
CYFLD_SAR_MUX_HW_CTRL_SARBUS0__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_SARBUS0__SIZE
CYFLD_SAR_MUX_HW_CTRL_SARBUS0__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_SARBUS1__OFFSET
CYFLD_SAR_MUX_HW_CTRL_SARBUS1__OFFSET EQU 0x00000017
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_MUX_HW_CTRL_SARBUS1__SIZE
CYFLD_SAR_MUX_HW_CTRL_SARBUS1__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_MUX_SWITCH_STATUS
CYREG_SAR_MUX_SWITCH_STATUS EQU 0x403a0348
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_PUMP_CTRL
CYREG_SAR_PUMP_CTRL EQU 0x403a0380
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CLOCK_SEL__OFFSET
CYFLD_SAR_CLOCK_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CLOCK_SEL__SIZE
CYFLD_SAR_CLOCK_SEL__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_ANA_TRIM
CYREG_SAR_ANA_TRIM EQU 0x403a0f00
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CAP_TRIM__OFFSET
CYFLD_SAR_CAP_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_CAP_TRIM__SIZE
CYFLD_SAR_CAP_TRIM__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_TRIMUNIT__OFFSET
CYFLD_SAR_TRIMUNIT__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_TRIMUNIT__SIZE
CYFLD_SAR_TRIMUNIT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_WOUNDING
CYREG_SAR_WOUNDING EQU 0x403a0f04
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_WOUND_RESOLUTION__OFFSET
CYFLD_SAR_WOUND_RESOLUTION__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_SAR_WOUND_RESOLUTION__SIZE
CYFLD_SAR_WOUND_RESOLUTION__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_WOUND_RESOLUTION_12BIT
CYVAL_SAR_WOUND_RESOLUTION_12BIT EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_WOUND_RESOLUTION_10BIT
CYVAL_SAR_WOUND_RESOLUTION_10BIT EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_WOUND_RESOLUTION_8BIT
CYVAL_SAR_WOUND_RESOLUTION_8BIT EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYVAL_SAR_WOUND_RESOLUTION_8BIT_TOO
CYVAL_SAR_WOUND_RESOLUTION_8BIT_TOO EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYDEV_PASS_BASE
CYDEV_PASS_BASE EQU 0x403f0000
    ENDIF
    IF :LNOT::DEF:CYDEV_PASS_SIZE
CYDEV_PASS_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYREG_PASS_INTR_CAUSE
CYREG_PASS_INTR_CAUSE EQU 0x403f0000
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_CTB0_INT__OFFSET
CYFLD_PASS_CTB0_INT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_CTB0_INT__SIZE
CYFLD_PASS_CTB0_INT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_CTB1_INT__OFFSET
CYFLD_PASS_CTB1_INT__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_CTB1_INT__SIZE
CYFLD_PASS_CTB1_INT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PASS_DFT_CTRL
CYREG_PASS_DFT_CTRL EQU 0x403f0030
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_ADFT_RES_EN__OFFSET
CYFLD_PASS_DSAB_ADFT_RES_EN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_ADFT_RES_EN__SIZE
CYFLD_PASS_DSAB_ADFT_RES_EN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYDEV_PASS_DSAB_BASE
CYDEV_PASS_DSAB_BASE EQU 0x403f0e00
    ENDIF
    IF :LNOT::DEF:CYDEV_PASS_DSAB_SIZE
CYDEV_PASS_DSAB_SIZE EQU 0x00000100
    ENDIF
    IF :LNOT::DEF:CYREG_PASS_DSAB_DSAB_CTRL
CYREG_PASS_DSAB_DSAB_CTRL EQU 0x403f0e00
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_CURRENT_SEL__OFFSET
CYFLD_PASS_DSAB_CURRENT_SEL__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_CURRENT_SEL__SIZE
CYFLD_PASS_DSAB_CURRENT_SEL__SIZE EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_SEL_OUT__OFFSET
CYFLD_PASS_DSAB_SEL_OUT__OFFSET EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_SEL_OUT__SIZE
CYFLD_PASS_DSAB_SEL_OUT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_ENABLED__OFFSET
CYFLD_PASS_DSAB_ENABLED__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_ENABLED__SIZE
CYFLD_PASS_DSAB_ENABLED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_PASS_DSAB_DSAB_DFT
CYREG_PASS_DSAB_DSAB_DFT EQU 0x403f0e04
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_EN_DFT__OFFSET
CYFLD_PASS_DSAB_EN_DFT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_DSAB_EN_DFT__SIZE
CYFLD_PASS_DSAB_EN_DFT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_PASS_DSAB_TRIM
CYREG_PASS_DSAB_TRIM EQU 0x403f0f00
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_IBIAS_TRIM__OFFSET
CYFLD_PASS_IBIAS_TRIM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_PASS_IBIAS_TRIM__SIZE
CYFLD_PASS_IBIAS_TRIM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYDEV_CM0_BASE
CYDEV_CM0_BASE EQU 0xe0000000
    ENDIF
    IF :LNOT::DEF:CYDEV_CM0_SIZE
CYDEV_CM0_SIZE EQU 0x00100000
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_DWT_PID4
CYREG_CM0_DWT_PID4 EQU 0xe0001fd0
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VALUE__OFFSET
CYFLD_CM0_VALUE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VALUE__SIZE
CYFLD_CM0_VALUE__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_DWT_PID0
CYREG_CM0_DWT_PID0 EQU 0xe0001fe0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_DWT_PID1
CYREG_CM0_DWT_PID1 EQU 0xe0001fe4
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_DWT_PID2
CYREG_CM0_DWT_PID2 EQU 0xe0001fe8
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_DWT_PID3
CYREG_CM0_DWT_PID3 EQU 0xe0001fec
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_DWT_CID0
CYREG_CM0_DWT_CID0 EQU 0xe0001ff0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_DWT_CID1
CYREG_CM0_DWT_CID1 EQU 0xe0001ff4
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_DWT_CID2
CYREG_CM0_DWT_CID2 EQU 0xe0001ff8
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_DWT_CID3
CYREG_CM0_DWT_CID3 EQU 0xe0001ffc
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_BP_PID4
CYREG_CM0_BP_PID4 EQU 0xe0002fd0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_BP_PID0
CYREG_CM0_BP_PID0 EQU 0xe0002fe0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_BP_PID1
CYREG_CM0_BP_PID1 EQU 0xe0002fe4
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_BP_PID2
CYREG_CM0_BP_PID2 EQU 0xe0002fe8
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_BP_PID3
CYREG_CM0_BP_PID3 EQU 0xe0002fec
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_BP_CID0
CYREG_CM0_BP_CID0 EQU 0xe0002ff0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_BP_CID1
CYREG_CM0_BP_CID1 EQU 0xe0002ff4
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_BP_CID2
CYREG_CM0_BP_CID2 EQU 0xe0002ff8
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_BP_CID3
CYREG_CM0_BP_CID3 EQU 0xe0002ffc
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SYST_CSR
CYREG_CM0_SYST_CSR EQU 0xe000e010
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_ENABLE__OFFSET
CYFLD_CM0_ENABLE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_ENABLE__SIZE
CYFLD_CM0_ENABLE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_TICKINT__OFFSET
CYFLD_CM0_TICKINT__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_TICKINT__SIZE
CYFLD_CM0_TICKINT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CLKSOURCE__OFFSET
CYFLD_CM0_CLKSOURCE__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CLKSOURCE__SIZE
CYFLD_CM0_CLKSOURCE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_COUNTFLAG__OFFSET
CYFLD_CM0_COUNTFLAG__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_COUNTFLAG__SIZE
CYFLD_CM0_COUNTFLAG__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SYST_RVR
CYREG_CM0_SYST_RVR EQU 0xe000e014
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_RELOAD__OFFSET
CYFLD_CM0_RELOAD__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_RELOAD__SIZE
CYFLD_CM0_RELOAD__SIZE EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SYST_CVR
CYREG_CM0_SYST_CVR EQU 0xe000e018
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CURRENT__OFFSET
CYFLD_CM0_CURRENT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CURRENT__SIZE
CYFLD_CM0_CURRENT__SIZE EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SYST_CALIB
CYREG_CM0_SYST_CALIB EQU 0xe000e01c
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_TENMS__OFFSET
CYFLD_CM0_TENMS__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_TENMS__SIZE
CYFLD_CM0_TENMS__SIZE EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SKEW__OFFSET
CYFLD_CM0_SKEW__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SKEW__SIZE
CYFLD_CM0_SKEW__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_NOREF__OFFSET
CYFLD_CM0_NOREF__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_NOREF__SIZE
CYFLD_CM0_NOREF__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ISER
CYREG_CM0_ISER EQU 0xe000e100
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SETENA__OFFSET
CYFLD_CM0_SETENA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SETENA__SIZE
CYFLD_CM0_SETENA__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ICER
CYREG_CM0_ICER EQU 0xe000e180
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CLRENA__OFFSET
CYFLD_CM0_CLRENA__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CLRENA__SIZE
CYFLD_CM0_CLRENA__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ISPR
CYREG_CM0_ISPR EQU 0xe000e200
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SETPEND__OFFSET
CYFLD_CM0_SETPEND__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SETPEND__SIZE
CYFLD_CM0_SETPEND__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ICPR
CYREG_CM0_ICPR EQU 0xe000e280
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CLRPEND__OFFSET
CYFLD_CM0_CLRPEND__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CLRPEND__SIZE
CYFLD_CM0_CLRPEND__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_IPR0
CYREG_CM0_IPR0 EQU 0xe000e400
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_N0__OFFSET
CYFLD_CM0_PRI_N0__OFFSET EQU 0x00000006
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_N0__SIZE
CYFLD_CM0_PRI_N0__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_N1__OFFSET
CYFLD_CM0_PRI_N1__OFFSET EQU 0x0000000e
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_N1__SIZE
CYFLD_CM0_PRI_N1__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_N2__OFFSET
CYFLD_CM0_PRI_N2__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_N2__SIZE
CYFLD_CM0_PRI_N2__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_N3__OFFSET
CYFLD_CM0_PRI_N3__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_N3__SIZE
CYFLD_CM0_PRI_N3__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_IPR1
CYREG_CM0_IPR1 EQU 0xe000e404
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_IPR2
CYREG_CM0_IPR2 EQU 0xe000e408
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_IPR3
CYREG_CM0_IPR3 EQU 0xe000e40c
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_IPR4
CYREG_CM0_IPR4 EQU 0xe000e410
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_IPR5
CYREG_CM0_IPR5 EQU 0xe000e414
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_IPR6
CYREG_CM0_IPR6 EQU 0xe000e418
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_IPR7
CYREG_CM0_IPR7 EQU 0xe000e41c
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_CPUID
CYREG_CM0_CPUID EQU 0xe000ed00
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_REVISION__OFFSET
CYFLD_CM0_REVISION__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_REVISION__SIZE
CYFLD_CM0_REVISION__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PARTNO__OFFSET
CYFLD_CM0_PARTNO__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PARTNO__SIZE
CYFLD_CM0_PARTNO__SIZE EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CONSTANT__OFFSET
CYFLD_CM0_CONSTANT__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_CONSTANT__SIZE
CYFLD_CM0_CONSTANT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VARIANT__OFFSET
CYFLD_CM0_VARIANT__OFFSET EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VARIANT__SIZE
CYFLD_CM0_VARIANT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_IMPLEMENTER__OFFSET
CYFLD_CM0_IMPLEMENTER__OFFSET EQU 0x00000018
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_IMPLEMENTER__SIZE
CYFLD_CM0_IMPLEMENTER__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ICSR
CYREG_CM0_ICSR EQU 0xe000ed04
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VECTACTIVE__OFFSET
CYFLD_CM0_VECTACTIVE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VECTACTIVE__SIZE
CYFLD_CM0_VECTACTIVE__SIZE EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VECTPENDING__OFFSET
CYFLD_CM0_VECTPENDING__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VECTPENDING__SIZE
CYFLD_CM0_VECTPENDING__SIZE EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_ISRPENDING__OFFSET
CYFLD_CM0_ISRPENDING__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_ISRPENDING__SIZE
CYFLD_CM0_ISRPENDING__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_ISRPREEMPT__OFFSET
CYFLD_CM0_ISRPREEMPT__OFFSET EQU 0x00000017
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_ISRPREEMPT__SIZE
CYFLD_CM0_ISRPREEMPT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PENDSTCLR__OFFSET
CYFLD_CM0_PENDSTCLR__OFFSET EQU 0x00000019
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PENDSTCLR__SIZE
CYFLD_CM0_PENDSTCLR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PENDSTSETb__OFFSET
CYFLD_CM0_PENDSTSETb__OFFSET EQU 0x0000001a
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PENDSTSETb__SIZE
CYFLD_CM0_PENDSTSETb__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PENDSVCLR__OFFSET
CYFLD_CM0_PENDSVCLR__OFFSET EQU 0x0000001b
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PENDSVCLR__SIZE
CYFLD_CM0_PENDSVCLR__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PENDSVSET__OFFSET
CYFLD_CM0_PENDSVSET__OFFSET EQU 0x0000001c
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PENDSVSET__SIZE
CYFLD_CM0_PENDSVSET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_NMIPENDSET__OFFSET
CYFLD_CM0_NMIPENDSET__OFFSET EQU 0x0000001f
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_NMIPENDSET__SIZE
CYFLD_CM0_NMIPENDSET__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_AIRCR
CYREG_CM0_AIRCR EQU 0xe000ed0c
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VECTCLRACTIVE__OFFSET
CYFLD_CM0_VECTCLRACTIVE__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VECTCLRACTIVE__SIZE
CYFLD_CM0_VECTCLRACTIVE__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SYSRESETREQ__OFFSET
CYFLD_CM0_SYSRESETREQ__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SYSRESETREQ__SIZE
CYFLD_CM0_SYSRESETREQ__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_ENDIANNESS__OFFSET
CYFLD_CM0_ENDIANNESS__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_ENDIANNESS__SIZE
CYFLD_CM0_ENDIANNESS__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VECTKEY__OFFSET
CYFLD_CM0_VECTKEY__OFFSET EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_VECTKEY__SIZE
CYFLD_CM0_VECTKEY__SIZE EQU 0x00000010
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCR
CYREG_CM0_SCR EQU 0xe000ed10
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SLEEPONEXIT__OFFSET
CYFLD_CM0_SLEEPONEXIT__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SLEEPONEXIT__SIZE
CYFLD_CM0_SLEEPONEXIT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SLEEPDEEP__OFFSET
CYFLD_CM0_SLEEPDEEP__OFFSET EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SLEEPDEEP__SIZE
CYFLD_CM0_SLEEPDEEP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SEVONPEND__OFFSET
CYFLD_CM0_SEVONPEND__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SEVONPEND__SIZE
CYFLD_CM0_SEVONPEND__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_CCR
CYREG_CM0_CCR EQU 0xe000ed14
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_UNALIGN_TRP__OFFSET
CYFLD_CM0_UNALIGN_TRP__OFFSET EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_UNALIGN_TRP__SIZE
CYFLD_CM0_UNALIGN_TRP__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_STKALIGN__OFFSET
CYFLD_CM0_STKALIGN__OFFSET EQU 0x00000009
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_STKALIGN__SIZE
CYFLD_CM0_STKALIGN__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SHPR2
CYREG_CM0_SHPR2 EQU 0xe000ed1c
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_11__OFFSET
CYFLD_CM0_PRI_11__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_11__SIZE
CYFLD_CM0_PRI_11__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SHPR3
CYREG_CM0_SHPR3 EQU 0xe000ed20
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_14__OFFSET
CYFLD_CM0_PRI_14__OFFSET EQU 0x00000016
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_14__SIZE
CYFLD_CM0_PRI_14__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_15__OFFSET
CYFLD_CM0_PRI_15__OFFSET EQU 0x0000001e
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_PRI_15__SIZE
CYFLD_CM0_PRI_15__SIZE EQU 0x00000002
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SHCSR
CYREG_CM0_SHCSR EQU 0xe000ed24
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SVCALLPENDED__OFFSET
CYFLD_CM0_SVCALLPENDED__OFFSET EQU 0x0000000f
    ENDIF
    IF :LNOT::DEF:CYFLD_CM0_SVCALLPENDED__SIZE
CYFLD_CM0_SVCALLPENDED__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCS_PID4
CYREG_CM0_SCS_PID4 EQU 0xe000efd0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCS_PID0
CYREG_CM0_SCS_PID0 EQU 0xe000efe0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCS_PID1
CYREG_CM0_SCS_PID1 EQU 0xe000efe4
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCS_PID2
CYREG_CM0_SCS_PID2 EQU 0xe000efe8
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCS_PID3
CYREG_CM0_SCS_PID3 EQU 0xe000efec
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCS_CID0
CYREG_CM0_SCS_CID0 EQU 0xe000eff0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCS_CID1
CYREG_CM0_SCS_CID1 EQU 0xe000eff4
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCS_CID2
CYREG_CM0_SCS_CID2 EQU 0xe000eff8
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_SCS_CID3
CYREG_CM0_SCS_CID3 EQU 0xe000effc
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_SCS
CYREG_CM0_ROM_SCS EQU 0xe00ff000
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_DWT
CYREG_CM0_ROM_DWT EQU 0xe00ff004
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_BPU
CYREG_CM0_ROM_BPU EQU 0xe00ff008
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_END
CYREG_CM0_ROM_END EQU 0xe00ff00c
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_CSMT
CYREG_CM0_ROM_CSMT EQU 0xe00fffcc
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_PID4
CYREG_CM0_ROM_PID4 EQU 0xe00fffd0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_PID0
CYREG_CM0_ROM_PID0 EQU 0xe00fffe0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_PID1
CYREG_CM0_ROM_PID1 EQU 0xe00fffe4
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_PID2
CYREG_CM0_ROM_PID2 EQU 0xe00fffe8
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_PID3
CYREG_CM0_ROM_PID3 EQU 0xe00fffec
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_CID0
CYREG_CM0_ROM_CID0 EQU 0xe00ffff0
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_CID1
CYREG_CM0_ROM_CID1 EQU 0xe00ffff4
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_CID2
CYREG_CM0_ROM_CID2 EQU 0xe00ffff8
    ENDIF
    IF :LNOT::DEF:CYREG_CM0_ROM_CID3
CYREG_CM0_ROM_CID3 EQU 0xe00ffffc
    ENDIF
    IF :LNOT::DEF:CYDEV_ROMTABLE_BASE
CYDEV_ROMTABLE_BASE EQU 0xf0000000
    ENDIF
    IF :LNOT::DEF:CYDEV_ROMTABLE_SIZE
CYDEV_ROMTABLE_SIZE EQU 0x00001000
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_ADDR
CYREG_ROMTABLE_ADDR EQU 0xf0000000
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_PRESENT__OFFSET
CYFLD_ROMTABLE_PRESENT__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_PRESENT__SIZE
CYFLD_ROMTABLE_PRESENT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_FORMAT_32BIT__OFFSET
CYFLD_ROMTABLE_FORMAT_32BIT__OFFSET EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_FORMAT_32BIT__SIZE
CYFLD_ROMTABLE_FORMAT_32BIT__SIZE EQU 0x00000001
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_ADDR_OFFSET__OFFSET
CYFLD_ROMTABLE_ADDR_OFFSET__OFFSET EQU 0x0000000c
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_ADDR_OFFSET__SIZE
CYFLD_ROMTABLE_ADDR_OFFSET__SIZE EQU 0x00000014
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_DID
CYREG_ROMTABLE_DID EQU 0xf0000fcc
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_VALUE__OFFSET
CYFLD_ROMTABLE_VALUE__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_VALUE__SIZE
CYFLD_ROMTABLE_VALUE__SIZE EQU 0x00000020
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_PID4
CYREG_ROMTABLE_PID4 EQU 0xf0000fd0
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_JEP_CONTINUATION__OFFSET
CYFLD_ROMTABLE_JEP_CONTINUATION__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_JEP_CONTINUATION__SIZE
CYFLD_ROMTABLE_JEP_CONTINUATION__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_COUNT__OFFSET
CYFLD_ROMTABLE_COUNT__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_COUNT__SIZE
CYFLD_ROMTABLE_COUNT__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_PID5
CYREG_ROMTABLE_PID5 EQU 0xf0000fd4
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_PID6
CYREG_ROMTABLE_PID6 EQU 0xf0000fd8
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_PID7
CYREG_ROMTABLE_PID7 EQU 0xf0000fdc
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_PID0
CYREG_ROMTABLE_PID0 EQU 0xf0000fe0
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_PN_MIN__OFFSET
CYFLD_ROMTABLE_PN_MIN__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_PN_MIN__SIZE
CYFLD_ROMTABLE_PN_MIN__SIZE EQU 0x00000008
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_PID1
CYREG_ROMTABLE_PID1 EQU 0xf0000fe4
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_PN_MAJ__OFFSET
CYFLD_ROMTABLE_PN_MAJ__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_PN_MAJ__SIZE
CYFLD_ROMTABLE_PN_MAJ__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_JEPID_MIN__OFFSET
CYFLD_ROMTABLE_JEPID_MIN__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_JEPID_MIN__SIZE
CYFLD_ROMTABLE_JEPID_MIN__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_PID2
CYREG_ROMTABLE_PID2 EQU 0xf0000fe8
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_JEPID_MAJ__OFFSET
CYFLD_ROMTABLE_JEPID_MAJ__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_JEPID_MAJ__SIZE
CYFLD_ROMTABLE_JEPID_MAJ__SIZE EQU 0x00000003
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_REV__OFFSET
CYFLD_ROMTABLE_REV__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_REV__SIZE
CYFLD_ROMTABLE_REV__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_PID3
CYREG_ROMTABLE_PID3 EQU 0xf0000fec
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_CM__OFFSET
CYFLD_ROMTABLE_CM__OFFSET EQU 0x00000000
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_CM__SIZE
CYFLD_ROMTABLE_CM__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_REV_AND__OFFSET
CYFLD_ROMTABLE_REV_AND__OFFSET EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYFLD_ROMTABLE_REV_AND__SIZE
CYFLD_ROMTABLE_REV_AND__SIZE EQU 0x00000004
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_CID0
CYREG_ROMTABLE_CID0 EQU 0xf0000ff0
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_CID1
CYREG_ROMTABLE_CID1 EQU 0xf0000ff4
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_CID2
CYREG_ROMTABLE_CID2 EQU 0xf0000ff8
    ENDIF
    IF :LNOT::DEF:CYREG_ROMTABLE_CID3
CYREG_ROMTABLE_CID3 EQU 0xf0000ffc
    ENDIF
    IF :LNOT::DEF:CYDEV_FLS_SECTOR_SIZE
CYDEV_FLS_SECTOR_SIZE EQU 0x00010000
    ENDIF
    IF :LNOT::DEF:CYDEV_FLS_ROW_SIZE
CYDEV_FLS_ROW_SIZE EQU 0x00000080
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW00
CYREG_SFLASH_PROT_ROW00 EQU CYREG_SFLASH_PROT_ROW0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW01
CYREG_SFLASH_PROT_ROW01 EQU CYREG_SFLASH_PROT_ROW1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW02
CYREG_SFLASH_PROT_ROW02 EQU CYREG_SFLASH_PROT_ROW2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW03
CYREG_SFLASH_PROT_ROW03 EQU CYREG_SFLASH_PROT_ROW3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW04
CYREG_SFLASH_PROT_ROW04 EQU CYREG_SFLASH_PROT_ROW4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW05
CYREG_SFLASH_PROT_ROW05 EQU CYREG_SFLASH_PROT_ROW5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW06
CYREG_SFLASH_PROT_ROW06 EQU CYREG_SFLASH_PROT_ROW6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW07
CYREG_SFLASH_PROT_ROW07 EQU CYREG_SFLASH_PROT_ROW7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW08
CYREG_SFLASH_PROT_ROW08 EQU CYREG_SFLASH_PROT_ROW8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PROT_ROW09
CYREG_SFLASH_PROT_ROW09 EQU CYREG_SFLASH_PROT_ROW9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B000
CYREG_SFLASH_AV_PAIRS_8B000 EQU CYREG_SFLASH_AV_PAIRS_8B0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B001
CYREG_SFLASH_AV_PAIRS_8B001 EQU CYREG_SFLASH_AV_PAIRS_8B1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B002
CYREG_SFLASH_AV_PAIRS_8B002 EQU CYREG_SFLASH_AV_PAIRS_8B2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B003
CYREG_SFLASH_AV_PAIRS_8B003 EQU CYREG_SFLASH_AV_PAIRS_8B3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B004
CYREG_SFLASH_AV_PAIRS_8B004 EQU CYREG_SFLASH_AV_PAIRS_8B4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B005
CYREG_SFLASH_AV_PAIRS_8B005 EQU CYREG_SFLASH_AV_PAIRS_8B5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B006
CYREG_SFLASH_AV_PAIRS_8B006 EQU CYREG_SFLASH_AV_PAIRS_8B6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B007
CYREG_SFLASH_AV_PAIRS_8B007 EQU CYREG_SFLASH_AV_PAIRS_8B7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B008
CYREG_SFLASH_AV_PAIRS_8B008 EQU CYREG_SFLASH_AV_PAIRS_8B8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B009
CYREG_SFLASH_AV_PAIRS_8B009 EQU CYREG_SFLASH_AV_PAIRS_8B9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B010
CYREG_SFLASH_AV_PAIRS_8B010 EQU CYREG_SFLASH_AV_PAIRS_8B10
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B011
CYREG_SFLASH_AV_PAIRS_8B011 EQU CYREG_SFLASH_AV_PAIRS_8B11
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B012
CYREG_SFLASH_AV_PAIRS_8B012 EQU CYREG_SFLASH_AV_PAIRS_8B12
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B013
CYREG_SFLASH_AV_PAIRS_8B013 EQU CYREG_SFLASH_AV_PAIRS_8B13
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B014
CYREG_SFLASH_AV_PAIRS_8B014 EQU CYREG_SFLASH_AV_PAIRS_8B14
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B015
CYREG_SFLASH_AV_PAIRS_8B015 EQU CYREG_SFLASH_AV_PAIRS_8B15
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B016
CYREG_SFLASH_AV_PAIRS_8B016 EQU CYREG_SFLASH_AV_PAIRS_8B16
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B017
CYREG_SFLASH_AV_PAIRS_8B017 EQU CYREG_SFLASH_AV_PAIRS_8B17
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B018
CYREG_SFLASH_AV_PAIRS_8B018 EQU CYREG_SFLASH_AV_PAIRS_8B18
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B019
CYREG_SFLASH_AV_PAIRS_8B019 EQU CYREG_SFLASH_AV_PAIRS_8B19
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B020
CYREG_SFLASH_AV_PAIRS_8B020 EQU CYREG_SFLASH_AV_PAIRS_8B20
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B021
CYREG_SFLASH_AV_PAIRS_8B021 EQU CYREG_SFLASH_AV_PAIRS_8B21
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B022
CYREG_SFLASH_AV_PAIRS_8B022 EQU CYREG_SFLASH_AV_PAIRS_8B22
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B023
CYREG_SFLASH_AV_PAIRS_8B023 EQU CYREG_SFLASH_AV_PAIRS_8B23
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B024
CYREG_SFLASH_AV_PAIRS_8B024 EQU CYREG_SFLASH_AV_PAIRS_8B24
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B025
CYREG_SFLASH_AV_PAIRS_8B025 EQU CYREG_SFLASH_AV_PAIRS_8B25
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B026
CYREG_SFLASH_AV_PAIRS_8B026 EQU CYREG_SFLASH_AV_PAIRS_8B26
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B027
CYREG_SFLASH_AV_PAIRS_8B027 EQU CYREG_SFLASH_AV_PAIRS_8B27
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B028
CYREG_SFLASH_AV_PAIRS_8B028 EQU CYREG_SFLASH_AV_PAIRS_8B28
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B029
CYREG_SFLASH_AV_PAIRS_8B029 EQU CYREG_SFLASH_AV_PAIRS_8B29
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B030
CYREG_SFLASH_AV_PAIRS_8B030 EQU CYREG_SFLASH_AV_PAIRS_8B30
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B031
CYREG_SFLASH_AV_PAIRS_8B031 EQU CYREG_SFLASH_AV_PAIRS_8B31
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B032
CYREG_SFLASH_AV_PAIRS_8B032 EQU CYREG_SFLASH_AV_PAIRS_8B32
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B033
CYREG_SFLASH_AV_PAIRS_8B033 EQU CYREG_SFLASH_AV_PAIRS_8B33
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B034
CYREG_SFLASH_AV_PAIRS_8B034 EQU CYREG_SFLASH_AV_PAIRS_8B34
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B035
CYREG_SFLASH_AV_PAIRS_8B035 EQU CYREG_SFLASH_AV_PAIRS_8B35
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B036
CYREG_SFLASH_AV_PAIRS_8B036 EQU CYREG_SFLASH_AV_PAIRS_8B36
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B037
CYREG_SFLASH_AV_PAIRS_8B037 EQU CYREG_SFLASH_AV_PAIRS_8B37
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B038
CYREG_SFLASH_AV_PAIRS_8B038 EQU CYREG_SFLASH_AV_PAIRS_8B38
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B039
CYREG_SFLASH_AV_PAIRS_8B039 EQU CYREG_SFLASH_AV_PAIRS_8B39
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B040
CYREG_SFLASH_AV_PAIRS_8B040 EQU CYREG_SFLASH_AV_PAIRS_8B40
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B041
CYREG_SFLASH_AV_PAIRS_8B041 EQU CYREG_SFLASH_AV_PAIRS_8B41
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B042
CYREG_SFLASH_AV_PAIRS_8B042 EQU CYREG_SFLASH_AV_PAIRS_8B42
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B043
CYREG_SFLASH_AV_PAIRS_8B043 EQU CYREG_SFLASH_AV_PAIRS_8B43
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B044
CYREG_SFLASH_AV_PAIRS_8B044 EQU CYREG_SFLASH_AV_PAIRS_8B44
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B045
CYREG_SFLASH_AV_PAIRS_8B045 EQU CYREG_SFLASH_AV_PAIRS_8B45
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B046
CYREG_SFLASH_AV_PAIRS_8B046 EQU CYREG_SFLASH_AV_PAIRS_8B46
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B047
CYREG_SFLASH_AV_PAIRS_8B047 EQU CYREG_SFLASH_AV_PAIRS_8B47
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B048
CYREG_SFLASH_AV_PAIRS_8B048 EQU CYREG_SFLASH_AV_PAIRS_8B48
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B049
CYREG_SFLASH_AV_PAIRS_8B049 EQU CYREG_SFLASH_AV_PAIRS_8B49
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B050
CYREG_SFLASH_AV_PAIRS_8B050 EQU CYREG_SFLASH_AV_PAIRS_8B50
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B051
CYREG_SFLASH_AV_PAIRS_8B051 EQU CYREG_SFLASH_AV_PAIRS_8B51
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B052
CYREG_SFLASH_AV_PAIRS_8B052 EQU CYREG_SFLASH_AV_PAIRS_8B52
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B053
CYREG_SFLASH_AV_PAIRS_8B053 EQU CYREG_SFLASH_AV_PAIRS_8B53
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B054
CYREG_SFLASH_AV_PAIRS_8B054 EQU CYREG_SFLASH_AV_PAIRS_8B54
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B055
CYREG_SFLASH_AV_PAIRS_8B055 EQU CYREG_SFLASH_AV_PAIRS_8B55
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B056
CYREG_SFLASH_AV_PAIRS_8B056 EQU CYREG_SFLASH_AV_PAIRS_8B56
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B057
CYREG_SFLASH_AV_PAIRS_8B057 EQU CYREG_SFLASH_AV_PAIRS_8B57
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B058
CYREG_SFLASH_AV_PAIRS_8B058 EQU CYREG_SFLASH_AV_PAIRS_8B58
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B059
CYREG_SFLASH_AV_PAIRS_8B059 EQU CYREG_SFLASH_AV_PAIRS_8B59
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B060
CYREG_SFLASH_AV_PAIRS_8B060 EQU CYREG_SFLASH_AV_PAIRS_8B60
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B061
CYREG_SFLASH_AV_PAIRS_8B061 EQU CYREG_SFLASH_AV_PAIRS_8B61
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B062
CYREG_SFLASH_AV_PAIRS_8B062 EQU CYREG_SFLASH_AV_PAIRS_8B62
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B063
CYREG_SFLASH_AV_PAIRS_8B063 EQU CYREG_SFLASH_AV_PAIRS_8B63
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B064
CYREG_SFLASH_AV_PAIRS_8B064 EQU CYREG_SFLASH_AV_PAIRS_8B64
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B065
CYREG_SFLASH_AV_PAIRS_8B065 EQU CYREG_SFLASH_AV_PAIRS_8B65
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B066
CYREG_SFLASH_AV_PAIRS_8B066 EQU CYREG_SFLASH_AV_PAIRS_8B66
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B067
CYREG_SFLASH_AV_PAIRS_8B067 EQU CYREG_SFLASH_AV_PAIRS_8B67
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B068
CYREG_SFLASH_AV_PAIRS_8B068 EQU CYREG_SFLASH_AV_PAIRS_8B68
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B069
CYREG_SFLASH_AV_PAIRS_8B069 EQU CYREG_SFLASH_AV_PAIRS_8B69
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B070
CYREG_SFLASH_AV_PAIRS_8B070 EQU CYREG_SFLASH_AV_PAIRS_8B70
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B071
CYREG_SFLASH_AV_PAIRS_8B071 EQU CYREG_SFLASH_AV_PAIRS_8B71
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B072
CYREG_SFLASH_AV_PAIRS_8B072 EQU CYREG_SFLASH_AV_PAIRS_8B72
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B073
CYREG_SFLASH_AV_PAIRS_8B073 EQU CYREG_SFLASH_AV_PAIRS_8B73
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B074
CYREG_SFLASH_AV_PAIRS_8B074 EQU CYREG_SFLASH_AV_PAIRS_8B74
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B075
CYREG_SFLASH_AV_PAIRS_8B075 EQU CYREG_SFLASH_AV_PAIRS_8B75
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B076
CYREG_SFLASH_AV_PAIRS_8B076 EQU CYREG_SFLASH_AV_PAIRS_8B76
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B077
CYREG_SFLASH_AV_PAIRS_8B077 EQU CYREG_SFLASH_AV_PAIRS_8B77
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B078
CYREG_SFLASH_AV_PAIRS_8B078 EQU CYREG_SFLASH_AV_PAIRS_8B78
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B079
CYREG_SFLASH_AV_PAIRS_8B079 EQU CYREG_SFLASH_AV_PAIRS_8B79
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B080
CYREG_SFLASH_AV_PAIRS_8B080 EQU CYREG_SFLASH_AV_PAIRS_8B80
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B081
CYREG_SFLASH_AV_PAIRS_8B081 EQU CYREG_SFLASH_AV_PAIRS_8B81
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B082
CYREG_SFLASH_AV_PAIRS_8B082 EQU CYREG_SFLASH_AV_PAIRS_8B82
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B083
CYREG_SFLASH_AV_PAIRS_8B083 EQU CYREG_SFLASH_AV_PAIRS_8B83
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B084
CYREG_SFLASH_AV_PAIRS_8B084 EQU CYREG_SFLASH_AV_PAIRS_8B84
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B085
CYREG_SFLASH_AV_PAIRS_8B085 EQU CYREG_SFLASH_AV_PAIRS_8B85
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B086
CYREG_SFLASH_AV_PAIRS_8B086 EQU CYREG_SFLASH_AV_PAIRS_8B86
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B087
CYREG_SFLASH_AV_PAIRS_8B087 EQU CYREG_SFLASH_AV_PAIRS_8B87
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B088
CYREG_SFLASH_AV_PAIRS_8B088 EQU CYREG_SFLASH_AV_PAIRS_8B88
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B089
CYREG_SFLASH_AV_PAIRS_8B089 EQU CYREG_SFLASH_AV_PAIRS_8B89
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B090
CYREG_SFLASH_AV_PAIRS_8B090 EQU CYREG_SFLASH_AV_PAIRS_8B90
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B091
CYREG_SFLASH_AV_PAIRS_8B091 EQU CYREG_SFLASH_AV_PAIRS_8B91
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B092
CYREG_SFLASH_AV_PAIRS_8B092 EQU CYREG_SFLASH_AV_PAIRS_8B92
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B093
CYREG_SFLASH_AV_PAIRS_8B093 EQU CYREG_SFLASH_AV_PAIRS_8B93
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B094
CYREG_SFLASH_AV_PAIRS_8B094 EQU CYREG_SFLASH_AV_PAIRS_8B94
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B095
CYREG_SFLASH_AV_PAIRS_8B095 EQU CYREG_SFLASH_AV_PAIRS_8B95
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B096
CYREG_SFLASH_AV_PAIRS_8B096 EQU CYREG_SFLASH_AV_PAIRS_8B96
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B097
CYREG_SFLASH_AV_PAIRS_8B097 EQU CYREG_SFLASH_AV_PAIRS_8B97
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B098
CYREG_SFLASH_AV_PAIRS_8B098 EQU CYREG_SFLASH_AV_PAIRS_8B98
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_8B099
CYREG_SFLASH_AV_PAIRS_8B099 EQU CYREG_SFLASH_AV_PAIRS_8B99
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B00
CYREG_SFLASH_AV_PAIRS_32B00 EQU CYREG_SFLASH_AV_PAIRS_32B0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B01
CYREG_SFLASH_AV_PAIRS_32B01 EQU CYREG_SFLASH_AV_PAIRS_32B1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B02
CYREG_SFLASH_AV_PAIRS_32B02 EQU CYREG_SFLASH_AV_PAIRS_32B2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B03
CYREG_SFLASH_AV_PAIRS_32B03 EQU CYREG_SFLASH_AV_PAIRS_32B3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B04
CYREG_SFLASH_AV_PAIRS_32B04 EQU CYREG_SFLASH_AV_PAIRS_32B4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B05
CYREG_SFLASH_AV_PAIRS_32B05 EQU CYREG_SFLASH_AV_PAIRS_32B5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B06
CYREG_SFLASH_AV_PAIRS_32B06 EQU CYREG_SFLASH_AV_PAIRS_32B6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B07
CYREG_SFLASH_AV_PAIRS_32B07 EQU CYREG_SFLASH_AV_PAIRS_32B7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B08
CYREG_SFLASH_AV_PAIRS_32B08 EQU CYREG_SFLASH_AV_PAIRS_32B8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_AV_PAIRS_32B09
CYREG_SFLASH_AV_PAIRS_32B09 EQU CYREG_SFLASH_AV_PAIRS_32B9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA00
CYREG_SFLASH_PE_TE_DATA00 EQU CYREG_SFLASH_PE_TE_DATA0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA01
CYREG_SFLASH_PE_TE_DATA01 EQU CYREG_SFLASH_PE_TE_DATA1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA02
CYREG_SFLASH_PE_TE_DATA02 EQU CYREG_SFLASH_PE_TE_DATA2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA03
CYREG_SFLASH_PE_TE_DATA03 EQU CYREG_SFLASH_PE_TE_DATA3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA04
CYREG_SFLASH_PE_TE_DATA04 EQU CYREG_SFLASH_PE_TE_DATA4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA05
CYREG_SFLASH_PE_TE_DATA05 EQU CYREG_SFLASH_PE_TE_DATA5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA06
CYREG_SFLASH_PE_TE_DATA06 EQU CYREG_SFLASH_PE_TE_DATA6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA07
CYREG_SFLASH_PE_TE_DATA07 EQU CYREG_SFLASH_PE_TE_DATA7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA08
CYREG_SFLASH_PE_TE_DATA08 EQU CYREG_SFLASH_PE_TE_DATA8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_PE_TE_DATA09
CYREG_SFLASH_PE_TE_DATA09 EQU CYREG_SFLASH_PE_TE_DATA9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM00
CYREG_SFLASH_IMO_TRIM00 EQU CYREG_SFLASH_IMO_TRIM0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM01
CYREG_SFLASH_IMO_TRIM01 EQU CYREG_SFLASH_IMO_TRIM1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM02
CYREG_SFLASH_IMO_TRIM02 EQU CYREG_SFLASH_IMO_TRIM2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM03
CYREG_SFLASH_IMO_TRIM03 EQU CYREG_SFLASH_IMO_TRIM3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM04
CYREG_SFLASH_IMO_TRIM04 EQU CYREG_SFLASH_IMO_TRIM4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM05
CYREG_SFLASH_IMO_TRIM05 EQU CYREG_SFLASH_IMO_TRIM5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM06
CYREG_SFLASH_IMO_TRIM06 EQU CYREG_SFLASH_IMO_TRIM6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM07
CYREG_SFLASH_IMO_TRIM07 EQU CYREG_SFLASH_IMO_TRIM7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM08
CYREG_SFLASH_IMO_TRIM08 EQU CYREG_SFLASH_IMO_TRIM8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_IMO_TRIM09
CYREG_SFLASH_IMO_TRIM09 EQU CYREG_SFLASH_IMO_TRIM9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW000
CYREG_SFLASH_ALT_PROT_ROW000 EQU CYREG_SFLASH_ALT_PROT_ROW0
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW001
CYREG_SFLASH_ALT_PROT_ROW001 EQU CYREG_SFLASH_ALT_PROT_ROW1
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW002
CYREG_SFLASH_ALT_PROT_ROW002 EQU CYREG_SFLASH_ALT_PROT_ROW2
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW003
CYREG_SFLASH_ALT_PROT_ROW003 EQU CYREG_SFLASH_ALT_PROT_ROW3
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW004
CYREG_SFLASH_ALT_PROT_ROW004 EQU CYREG_SFLASH_ALT_PROT_ROW4
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW005
CYREG_SFLASH_ALT_PROT_ROW005 EQU CYREG_SFLASH_ALT_PROT_ROW5
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW006
CYREG_SFLASH_ALT_PROT_ROW006 EQU CYREG_SFLASH_ALT_PROT_ROW6
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW007
CYREG_SFLASH_ALT_PROT_ROW007 EQU CYREG_SFLASH_ALT_PROT_ROW7
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW008
CYREG_SFLASH_ALT_PROT_ROW008 EQU CYREG_SFLASH_ALT_PROT_ROW8
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW009
CYREG_SFLASH_ALT_PROT_ROW009 EQU CYREG_SFLASH_ALT_PROT_ROW9
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW010
CYREG_SFLASH_ALT_PROT_ROW010 EQU CYREG_SFLASH_ALT_PROT_ROW10
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW011
CYREG_SFLASH_ALT_PROT_ROW011 EQU CYREG_SFLASH_ALT_PROT_ROW11
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW012
CYREG_SFLASH_ALT_PROT_ROW012 EQU CYREG_SFLASH_ALT_PROT_ROW12
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW013
CYREG_SFLASH_ALT_PROT_ROW013 EQU CYREG_SFLASH_ALT_PROT_ROW13
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW014
CYREG_SFLASH_ALT_PROT_ROW014 EQU CYREG_SFLASH_ALT_PROT_ROW14
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW015
CYREG_SFLASH_ALT_PROT_ROW015 EQU CYREG_SFLASH_ALT_PROT_ROW15
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW016
CYREG_SFLASH_ALT_PROT_ROW016 EQU CYREG_SFLASH_ALT_PROT_ROW16
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW017
CYREG_SFLASH_ALT_PROT_ROW017 EQU CYREG_SFLASH_ALT_PROT_ROW17
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW018
CYREG_SFLASH_ALT_PROT_ROW018 EQU CYREG_SFLASH_ALT_PROT_ROW18
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW019
CYREG_SFLASH_ALT_PROT_ROW019 EQU CYREG_SFLASH_ALT_PROT_ROW19
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW020
CYREG_SFLASH_ALT_PROT_ROW020 EQU CYREG_SFLASH_ALT_PROT_ROW20
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW021
CYREG_SFLASH_ALT_PROT_ROW021 EQU CYREG_SFLASH_ALT_PROT_ROW21
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW022
CYREG_SFLASH_ALT_PROT_ROW022 EQU CYREG_SFLASH_ALT_PROT_ROW22
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW023
CYREG_SFLASH_ALT_PROT_ROW023 EQU CYREG_SFLASH_ALT_PROT_ROW23
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW024
CYREG_SFLASH_ALT_PROT_ROW024 EQU CYREG_SFLASH_ALT_PROT_ROW24
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW025
CYREG_SFLASH_ALT_PROT_ROW025 EQU CYREG_SFLASH_ALT_PROT_ROW25
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW026
CYREG_SFLASH_ALT_PROT_ROW026 EQU CYREG_SFLASH_ALT_PROT_ROW26
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW027
CYREG_SFLASH_ALT_PROT_ROW027 EQU CYREG_SFLASH_ALT_PROT_ROW27
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW028
CYREG_SFLASH_ALT_PROT_ROW028 EQU CYREG_SFLASH_ALT_PROT_ROW28
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW029
CYREG_SFLASH_ALT_PROT_ROW029 EQU CYREG_SFLASH_ALT_PROT_ROW29
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW030
CYREG_SFLASH_ALT_PROT_ROW030 EQU CYREG_SFLASH_ALT_PROT_ROW30
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW031
CYREG_SFLASH_ALT_PROT_ROW031 EQU CYREG_SFLASH_ALT_PROT_ROW31
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW032
CYREG_SFLASH_ALT_PROT_ROW032 EQU CYREG_SFLASH_ALT_PROT_ROW32
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW033
CYREG_SFLASH_ALT_PROT_ROW033 EQU CYREG_SFLASH_ALT_PROT_ROW33
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW034
CYREG_SFLASH_ALT_PROT_ROW034 EQU CYREG_SFLASH_ALT_PROT_ROW34
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW035
CYREG_SFLASH_ALT_PROT_ROW035 EQU CYREG_SFLASH_ALT_PROT_ROW35
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW036
CYREG_SFLASH_ALT_PROT_ROW036 EQU CYREG_SFLASH_ALT_PROT_ROW36
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW037
CYREG_SFLASH_ALT_PROT_ROW037 EQU CYREG_SFLASH_ALT_PROT_ROW37
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW038
CYREG_SFLASH_ALT_PROT_ROW038 EQU CYREG_SFLASH_ALT_PROT_ROW38
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW039
CYREG_SFLASH_ALT_PROT_ROW039 EQU CYREG_SFLASH_ALT_PROT_ROW39
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW040
CYREG_SFLASH_ALT_PROT_ROW040 EQU CYREG_SFLASH_ALT_PROT_ROW40
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW041
CYREG_SFLASH_ALT_PROT_ROW041 EQU CYREG_SFLASH_ALT_PROT_ROW41
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW042
CYREG_SFLASH_ALT_PROT_ROW042 EQU CYREG_SFLASH_ALT_PROT_ROW42
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW043
CYREG_SFLASH_ALT_PROT_ROW043 EQU CYREG_SFLASH_ALT_PROT_ROW43
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW044
CYREG_SFLASH_ALT_PROT_ROW044 EQU CYREG_SFLASH_ALT_PROT_ROW44
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW045
CYREG_SFLASH_ALT_PROT_ROW045 EQU CYREG_SFLASH_ALT_PROT_ROW45
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW046
CYREG_SFLASH_ALT_PROT_ROW046 EQU CYREG_SFLASH_ALT_PROT_ROW46
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW047
CYREG_SFLASH_ALT_PROT_ROW047 EQU CYREG_SFLASH_ALT_PROT_ROW47
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW048
CYREG_SFLASH_ALT_PROT_ROW048 EQU CYREG_SFLASH_ALT_PROT_ROW48
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW049
CYREG_SFLASH_ALT_PROT_ROW049 EQU CYREG_SFLASH_ALT_PROT_ROW49
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW050
CYREG_SFLASH_ALT_PROT_ROW050 EQU CYREG_SFLASH_ALT_PROT_ROW50
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW051
CYREG_SFLASH_ALT_PROT_ROW051 EQU CYREG_SFLASH_ALT_PROT_ROW51
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW052
CYREG_SFLASH_ALT_PROT_ROW052 EQU CYREG_SFLASH_ALT_PROT_ROW52
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW053
CYREG_SFLASH_ALT_PROT_ROW053 EQU CYREG_SFLASH_ALT_PROT_ROW53
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW054
CYREG_SFLASH_ALT_PROT_ROW054 EQU CYREG_SFLASH_ALT_PROT_ROW54
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW055
CYREG_SFLASH_ALT_PROT_ROW055 EQU CYREG_SFLASH_ALT_PROT_ROW55
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW056
CYREG_SFLASH_ALT_PROT_ROW056 EQU CYREG_SFLASH_ALT_PROT_ROW56
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW057
CYREG_SFLASH_ALT_PROT_ROW057 EQU CYREG_SFLASH_ALT_PROT_ROW57
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW058
CYREG_SFLASH_ALT_PROT_ROW058 EQU CYREG_SFLASH_ALT_PROT_ROW58
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW059
CYREG_SFLASH_ALT_PROT_ROW059 EQU CYREG_SFLASH_ALT_PROT_ROW59
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW060
CYREG_SFLASH_ALT_PROT_ROW060 EQU CYREG_SFLASH_ALT_PROT_ROW60
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW061
CYREG_SFLASH_ALT_PROT_ROW061 EQU CYREG_SFLASH_ALT_PROT_ROW61
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW062
CYREG_SFLASH_ALT_PROT_ROW062 EQU CYREG_SFLASH_ALT_PROT_ROW62
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW063
CYREG_SFLASH_ALT_PROT_ROW063 EQU CYREG_SFLASH_ALT_PROT_ROW63
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW064
CYREG_SFLASH_ALT_PROT_ROW064 EQU CYREG_SFLASH_ALT_PROT_ROW64
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW065
CYREG_SFLASH_ALT_PROT_ROW065 EQU CYREG_SFLASH_ALT_PROT_ROW65
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW066
CYREG_SFLASH_ALT_PROT_ROW066 EQU CYREG_SFLASH_ALT_PROT_ROW66
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW067
CYREG_SFLASH_ALT_PROT_ROW067 EQU CYREG_SFLASH_ALT_PROT_ROW67
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW068
CYREG_SFLASH_ALT_PROT_ROW068 EQU CYREG_SFLASH_ALT_PROT_ROW68
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW069
CYREG_SFLASH_ALT_PROT_ROW069 EQU CYREG_SFLASH_ALT_PROT_ROW69
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW070
CYREG_SFLASH_ALT_PROT_ROW070 EQU CYREG_SFLASH_ALT_PROT_ROW70
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW071
CYREG_SFLASH_ALT_PROT_ROW071 EQU CYREG_SFLASH_ALT_PROT_ROW71
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW072
CYREG_SFLASH_ALT_PROT_ROW072 EQU CYREG_SFLASH_ALT_PROT_ROW72
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW073
CYREG_SFLASH_ALT_PROT_ROW073 EQU CYREG_SFLASH_ALT_PROT_ROW73
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW074
CYREG_SFLASH_ALT_PROT_ROW074 EQU CYREG_SFLASH_ALT_PROT_ROW74
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW075
CYREG_SFLASH_ALT_PROT_ROW075 EQU CYREG_SFLASH_ALT_PROT_ROW75
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW076
CYREG_SFLASH_ALT_PROT_ROW076 EQU CYREG_SFLASH_ALT_PROT_ROW76
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW077
CYREG_SFLASH_ALT_PROT_ROW077 EQU CYREG_SFLASH_ALT_PROT_ROW77
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW078
CYREG_SFLASH_ALT_PROT_ROW078 EQU CYREG_SFLASH_ALT_PROT_ROW78
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW079
CYREG_SFLASH_ALT_PROT_ROW079 EQU CYREG_SFLASH_ALT_PROT_ROW79
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW080
CYREG_SFLASH_ALT_PROT_ROW080 EQU CYREG_SFLASH_ALT_PROT_ROW80
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW081
CYREG_SFLASH_ALT_PROT_ROW081 EQU CYREG_SFLASH_ALT_PROT_ROW81
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW082
CYREG_SFLASH_ALT_PROT_ROW082 EQU CYREG_SFLASH_ALT_PROT_ROW82
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW083
CYREG_SFLASH_ALT_PROT_ROW083 EQU CYREG_SFLASH_ALT_PROT_ROW83
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW084
CYREG_SFLASH_ALT_PROT_ROW084 EQU CYREG_SFLASH_ALT_PROT_ROW84
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW085
CYREG_SFLASH_ALT_PROT_ROW085 EQU CYREG_SFLASH_ALT_PROT_ROW85
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW086
CYREG_SFLASH_ALT_PROT_ROW086 EQU CYREG_SFLASH_ALT_PROT_ROW86
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW087
CYREG_SFLASH_ALT_PROT_ROW087 EQU CYREG_SFLASH_ALT_PROT_ROW87
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW088
CYREG_SFLASH_ALT_PROT_ROW088 EQU CYREG_SFLASH_ALT_PROT_ROW88
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW089
CYREG_SFLASH_ALT_PROT_ROW089 EQU CYREG_SFLASH_ALT_PROT_ROW89
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW090
CYREG_SFLASH_ALT_PROT_ROW090 EQU CYREG_SFLASH_ALT_PROT_ROW90
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW091
CYREG_SFLASH_ALT_PROT_ROW091 EQU CYREG_SFLASH_ALT_PROT_ROW91
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW092
CYREG_SFLASH_ALT_PROT_ROW092 EQU CYREG_SFLASH_ALT_PROT_ROW92
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW093
CYREG_SFLASH_ALT_PROT_ROW093 EQU CYREG_SFLASH_ALT_PROT_ROW93
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW094
CYREG_SFLASH_ALT_PROT_ROW094 EQU CYREG_SFLASH_ALT_PROT_ROW94
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW095
CYREG_SFLASH_ALT_PROT_ROW095 EQU CYREG_SFLASH_ALT_PROT_ROW95
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW096
CYREG_SFLASH_ALT_PROT_ROW096 EQU CYREG_SFLASH_ALT_PROT_ROW96
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW097
CYREG_SFLASH_ALT_PROT_ROW097 EQU CYREG_SFLASH_ALT_PROT_ROW97
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW098
CYREG_SFLASH_ALT_PROT_ROW098 EQU CYREG_SFLASH_ALT_PROT_ROW98
    ENDIF
    IF :LNOT::DEF:CYREG_SFLASH_ALT_PROT_ROW099
CYREG_SFLASH_ALT_PROT_ROW099 EQU CYREG_SFLASH_ALT_PROT_ROW99
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL00
CYREG_PERI_PCLK_CTL00 EQU CYREG_PERI_PCLK_CTL0
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL01
CYREG_PERI_PCLK_CTL01 EQU CYREG_PERI_PCLK_CTL1
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL02
CYREG_PERI_PCLK_CTL02 EQU CYREG_PERI_PCLK_CTL2
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL03
CYREG_PERI_PCLK_CTL03 EQU CYREG_PERI_PCLK_CTL3
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL04
CYREG_PERI_PCLK_CTL04 EQU CYREG_PERI_PCLK_CTL4
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL05
CYREG_PERI_PCLK_CTL05 EQU CYREG_PERI_PCLK_CTL5
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL06
CYREG_PERI_PCLK_CTL06 EQU CYREG_PERI_PCLK_CTL6
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL07
CYREG_PERI_PCLK_CTL07 EQU CYREG_PERI_PCLK_CTL7
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL08
CYREG_PERI_PCLK_CTL08 EQU CYREG_PERI_PCLK_CTL8
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_PCLK_CTL09
CYREG_PERI_PCLK_CTL09 EQU CYREG_PERI_PCLK_CTL9
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL00
CYREG_PERI_DIV_16_CTL00 EQU CYREG_PERI_DIV_16_CTL0
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL01
CYREG_PERI_DIV_16_CTL01 EQU CYREG_PERI_DIV_16_CTL1
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL02
CYREG_PERI_DIV_16_CTL02 EQU CYREG_PERI_DIV_16_CTL2
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL03
CYREG_PERI_DIV_16_CTL03 EQU CYREG_PERI_DIV_16_CTL3
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL04
CYREG_PERI_DIV_16_CTL04 EQU CYREG_PERI_DIV_16_CTL4
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL05
CYREG_PERI_DIV_16_CTL05 EQU CYREG_PERI_DIV_16_CTL5
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL06
CYREG_PERI_DIV_16_CTL06 EQU CYREG_PERI_DIV_16_CTL6
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL07
CYREG_PERI_DIV_16_CTL07 EQU CYREG_PERI_DIV_16_CTL7
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL08
CYREG_PERI_DIV_16_CTL08 EQU CYREG_PERI_DIV_16_CTL8
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_CTL09
CYREG_PERI_DIV_16_CTL09 EQU CYREG_PERI_DIV_16_CTL9
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_5_CTL00
CYREG_PERI_DIV_16_5_CTL00 EQU CYREG_PERI_DIV_16_5_CTL0
    ENDIF
    IF :LNOT::DEF:CYREG_PERI_DIV_16_5_CTL01
CYREG_PERI_DIV_16_5_CTL01 EQU CYREG_PERI_DIV_16_5_CTL1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A0_00
CYREG_UDB_W8_A0_00 EQU CYREG_UDB_W8_A00
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A0_01
CYREG_UDB_W8_A0_01 EQU CYREG_UDB_W8_A01
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A0_02
CYREG_UDB_W8_A0_02 EQU CYREG_UDB_W8_A02
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A0_03
CYREG_UDB_W8_A0_03 EQU CYREG_UDB_W8_A03
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A1_00
CYREG_UDB_W8_A1_00 EQU CYREG_UDB_W8_A10
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A1_01
CYREG_UDB_W8_A1_01 EQU CYREG_UDB_W8_A11
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A1_02
CYREG_UDB_W8_A1_02 EQU CYREG_UDB_W8_A12
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_A1_03
CYREG_UDB_W8_A1_03 EQU CYREG_UDB_W8_A13
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D0_00
CYREG_UDB_W8_D0_00 EQU CYREG_UDB_W8_D00
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D0_01
CYREG_UDB_W8_D0_01 EQU CYREG_UDB_W8_D01
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D0_02
CYREG_UDB_W8_D0_02 EQU CYREG_UDB_W8_D02
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D0_03
CYREG_UDB_W8_D0_03 EQU CYREG_UDB_W8_D03
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D1_00
CYREG_UDB_W8_D1_00 EQU CYREG_UDB_W8_D10
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D1_01
CYREG_UDB_W8_D1_01 EQU CYREG_UDB_W8_D11
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D1_02
CYREG_UDB_W8_D1_02 EQU CYREG_UDB_W8_D12
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_D1_03
CYREG_UDB_W8_D1_03 EQU CYREG_UDB_W8_D13
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F0_00
CYREG_UDB_W8_F0_00 EQU CYREG_UDB_W8_F00
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F0_01
CYREG_UDB_W8_F0_01 EQU CYREG_UDB_W8_F01
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F0_02
CYREG_UDB_W8_F0_02 EQU CYREG_UDB_W8_F02
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F0_03
CYREG_UDB_W8_F0_03 EQU CYREG_UDB_W8_F03
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F1_00
CYREG_UDB_W8_F1_00 EQU CYREG_UDB_W8_F10
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F1_01
CYREG_UDB_W8_F1_01 EQU CYREG_UDB_W8_F11
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F1_02
CYREG_UDB_W8_F1_02 EQU CYREG_UDB_W8_F12
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_F1_03
CYREG_UDB_W8_F1_03 EQU CYREG_UDB_W8_F13
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ST_00
CYREG_UDB_W8_ST_00 EQU CYREG_UDB_W8_ST0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ST_01
CYREG_UDB_W8_ST_01 EQU CYREG_UDB_W8_ST1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ST_02
CYREG_UDB_W8_ST_02 EQU CYREG_UDB_W8_ST2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ST_03
CYREG_UDB_W8_ST_03 EQU CYREG_UDB_W8_ST3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_CTL_00
CYREG_UDB_W8_CTL_00 EQU CYREG_UDB_W8_CTL0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_CTL_01
CYREG_UDB_W8_CTL_01 EQU CYREG_UDB_W8_CTL1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_CTL_02
CYREG_UDB_W8_CTL_02 EQU CYREG_UDB_W8_CTL2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_CTL_03
CYREG_UDB_W8_CTL_03 EQU CYREG_UDB_W8_CTL3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MSK_00
CYREG_UDB_W8_MSK_00 EQU CYREG_UDB_W8_MSK0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MSK_01
CYREG_UDB_W8_MSK_01 EQU CYREG_UDB_W8_MSK1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MSK_02
CYREG_UDB_W8_MSK_02 EQU CYREG_UDB_W8_MSK2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MSK_03
CYREG_UDB_W8_MSK_03 EQU CYREG_UDB_W8_MSK3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ACTL_00
CYREG_UDB_W8_ACTL_00 EQU CYREG_UDB_W8_ACTL0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ACTL_01
CYREG_UDB_W8_ACTL_01 EQU CYREG_UDB_W8_ACTL1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ACTL_02
CYREG_UDB_W8_ACTL_02 EQU CYREG_UDB_W8_ACTL2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_ACTL_03
CYREG_UDB_W8_ACTL_03 EQU CYREG_UDB_W8_ACTL3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MC_00
CYREG_UDB_W8_MC_00 EQU CYREG_UDB_W8_MC0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MC_01
CYREG_UDB_W8_MC_01 EQU CYREG_UDB_W8_MC1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MC_02
CYREG_UDB_W8_MC_02 EQU CYREG_UDB_W8_MC2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W8_MC_03
CYREG_UDB_W8_MC_03 EQU CYREG_UDB_W8_MC3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_A_00
CYREG_UDB_CAT16_A_00 EQU CYREG_UDB_CAT16_A0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_A_01
CYREG_UDB_CAT16_A_01 EQU CYREG_UDB_CAT16_A1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_A_02
CYREG_UDB_CAT16_A_02 EQU CYREG_UDB_CAT16_A2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_A_03
CYREG_UDB_CAT16_A_03 EQU CYREG_UDB_CAT16_A3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_D_00
CYREG_UDB_CAT16_D_00 EQU CYREG_UDB_CAT16_D0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_D_01
CYREG_UDB_CAT16_D_01 EQU CYREG_UDB_CAT16_D1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_D_02
CYREG_UDB_CAT16_D_02 EQU CYREG_UDB_CAT16_D2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_D_03
CYREG_UDB_CAT16_D_03 EQU CYREG_UDB_CAT16_D3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_F_00
CYREG_UDB_CAT16_F_00 EQU CYREG_UDB_CAT16_F0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_F_01
CYREG_UDB_CAT16_F_01 EQU CYREG_UDB_CAT16_F1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_F_02
CYREG_UDB_CAT16_F_02 EQU CYREG_UDB_CAT16_F2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_F_03
CYREG_UDB_CAT16_F_03 EQU CYREG_UDB_CAT16_F3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST_00
CYREG_UDB_CAT16_CTL_ST_00 EQU CYREG_UDB_CAT16_CTL_ST0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST_01
CYREG_UDB_CAT16_CTL_ST_01 EQU CYREG_UDB_CAT16_CTL_ST1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST_02
CYREG_UDB_CAT16_CTL_ST_02 EQU CYREG_UDB_CAT16_CTL_ST2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_CTL_ST_03
CYREG_UDB_CAT16_CTL_ST_03 EQU CYREG_UDB_CAT16_CTL_ST3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK_00
CYREG_UDB_CAT16_ACTL_MSK_00 EQU CYREG_UDB_CAT16_ACTL_MSK0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK_01
CYREG_UDB_CAT16_ACTL_MSK_01 EQU CYREG_UDB_CAT16_ACTL_MSK1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK_02
CYREG_UDB_CAT16_ACTL_MSK_02 EQU CYREG_UDB_CAT16_ACTL_MSK2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_ACTL_MSK_03
CYREG_UDB_CAT16_ACTL_MSK_03 EQU CYREG_UDB_CAT16_ACTL_MSK3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_MC_00
CYREG_UDB_CAT16_MC_00 EQU CYREG_UDB_CAT16_MC0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_MC_01
CYREG_UDB_CAT16_MC_01 EQU CYREG_UDB_CAT16_MC1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_MC_02
CYREG_UDB_CAT16_MC_02 EQU CYREG_UDB_CAT16_MC2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_CAT16_MC_03
CYREG_UDB_CAT16_MC_03 EQU CYREG_UDB_CAT16_MC3
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A0_00
CYREG_UDB_W16_A0_00 EQU CYREG_UDB_W16_A00
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A0_01
CYREG_UDB_W16_A0_01 EQU CYREG_UDB_W16_A01
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A0_02
CYREG_UDB_W16_A0_02 EQU CYREG_UDB_W16_A02
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A1_00
CYREG_UDB_W16_A1_00 EQU CYREG_UDB_W16_A10
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A1_01
CYREG_UDB_W16_A1_01 EQU CYREG_UDB_W16_A11
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_A1_02
CYREG_UDB_W16_A1_02 EQU CYREG_UDB_W16_A12
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D0_00
CYREG_UDB_W16_D0_00 EQU CYREG_UDB_W16_D00
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D0_01
CYREG_UDB_W16_D0_01 EQU CYREG_UDB_W16_D01
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D0_02
CYREG_UDB_W16_D0_02 EQU CYREG_UDB_W16_D02
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D1_00
CYREG_UDB_W16_D1_00 EQU CYREG_UDB_W16_D10
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D1_01
CYREG_UDB_W16_D1_01 EQU CYREG_UDB_W16_D11
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_D1_02
CYREG_UDB_W16_D1_02 EQU CYREG_UDB_W16_D12
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F0_00
CYREG_UDB_W16_F0_00 EQU CYREG_UDB_W16_F00
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F0_01
CYREG_UDB_W16_F0_01 EQU CYREG_UDB_W16_F01
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F0_02
CYREG_UDB_W16_F0_02 EQU CYREG_UDB_W16_F02
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F1_00
CYREG_UDB_W16_F1_00 EQU CYREG_UDB_W16_F10
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F1_01
CYREG_UDB_W16_F1_01 EQU CYREG_UDB_W16_F11
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_F1_02
CYREG_UDB_W16_F1_02 EQU CYREG_UDB_W16_F12
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ST_00
CYREG_UDB_W16_ST_00 EQU CYREG_UDB_W16_ST0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ST_01
CYREG_UDB_W16_ST_01 EQU CYREG_UDB_W16_ST1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ST_02
CYREG_UDB_W16_ST_02 EQU CYREG_UDB_W16_ST2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_CTL_00
CYREG_UDB_W16_CTL_00 EQU CYREG_UDB_W16_CTL0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_CTL_01
CYREG_UDB_W16_CTL_01 EQU CYREG_UDB_W16_CTL1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_CTL_02
CYREG_UDB_W16_CTL_02 EQU CYREG_UDB_W16_CTL2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MSK_00
CYREG_UDB_W16_MSK_00 EQU CYREG_UDB_W16_MSK0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MSK_01
CYREG_UDB_W16_MSK_01 EQU CYREG_UDB_W16_MSK1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MSK_02
CYREG_UDB_W16_MSK_02 EQU CYREG_UDB_W16_MSK2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ACTL_00
CYREG_UDB_W16_ACTL_00 EQU CYREG_UDB_W16_ACTL0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ACTL_01
CYREG_UDB_W16_ACTL_01 EQU CYREG_UDB_W16_ACTL1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_ACTL_02
CYREG_UDB_W16_ACTL_02 EQU CYREG_UDB_W16_ACTL2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MC_00
CYREG_UDB_W16_MC_00 EQU CYREG_UDB_W16_MC0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MC_01
CYREG_UDB_W16_MC_01 EQU CYREG_UDB_W16_MC1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W16_MC_02
CYREG_UDB_W16_MC_02 EQU CYREG_UDB_W16_MC2
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_A0_00
CYREG_UDB_W32_A0_00 EQU CYREG_UDB_W32_A0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_A1_00
CYREG_UDB_W32_A1_00 EQU CYREG_UDB_W32_A1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_D0_00
CYREG_UDB_W32_D0_00 EQU CYREG_UDB_W32_D0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_D1_00
CYREG_UDB_W32_D1_00 EQU CYREG_UDB_W32_D1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_F0_00
CYREG_UDB_W32_F0_00 EQU CYREG_UDB_W32_F0
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_F1_00
CYREG_UDB_W32_F1_00 EQU CYREG_UDB_W32_F1
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_ST_00
CYREG_UDB_W32_ST_00 EQU CYREG_UDB_W32_ST
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_CTL_00
CYREG_UDB_W32_CTL_00 EQU CYREG_UDB_W32_CTL
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_MSK_00
CYREG_UDB_W32_MSK_00 EQU CYREG_UDB_W32_MSK
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_ACTL_00
CYREG_UDB_W32_ACTL_00 EQU CYREG_UDB_W32_ACTL
    ENDIF
    IF :LNOT::DEF:CYREG_UDB_W32_MC_00
CYREG_UDB_W32_MC_00 EQU CYREG_UDB_W32_MC
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA000
CYREG_SCB0_EZ_DATA000 EQU CYREG_SCB0_EZ_DATA0
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA001
CYREG_SCB0_EZ_DATA001 EQU CYREG_SCB0_EZ_DATA1
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA002
CYREG_SCB0_EZ_DATA002 EQU CYREG_SCB0_EZ_DATA2
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA003
CYREG_SCB0_EZ_DATA003 EQU CYREG_SCB0_EZ_DATA3
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA004
CYREG_SCB0_EZ_DATA004 EQU CYREG_SCB0_EZ_DATA4
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA005
CYREG_SCB0_EZ_DATA005 EQU CYREG_SCB0_EZ_DATA5
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA006
CYREG_SCB0_EZ_DATA006 EQU CYREG_SCB0_EZ_DATA6
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA007
CYREG_SCB0_EZ_DATA007 EQU CYREG_SCB0_EZ_DATA7
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA008
CYREG_SCB0_EZ_DATA008 EQU CYREG_SCB0_EZ_DATA8
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA009
CYREG_SCB0_EZ_DATA009 EQU CYREG_SCB0_EZ_DATA9
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA010
CYREG_SCB0_EZ_DATA010 EQU CYREG_SCB0_EZ_DATA10
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA011
CYREG_SCB0_EZ_DATA011 EQU CYREG_SCB0_EZ_DATA11
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA012
CYREG_SCB0_EZ_DATA012 EQU CYREG_SCB0_EZ_DATA12
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA013
CYREG_SCB0_EZ_DATA013 EQU CYREG_SCB0_EZ_DATA13
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA014
CYREG_SCB0_EZ_DATA014 EQU CYREG_SCB0_EZ_DATA14
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA015
CYREG_SCB0_EZ_DATA015 EQU CYREG_SCB0_EZ_DATA15
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA016
CYREG_SCB0_EZ_DATA016 EQU CYREG_SCB0_EZ_DATA16
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA017
CYREG_SCB0_EZ_DATA017 EQU CYREG_SCB0_EZ_DATA17
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA018
CYREG_SCB0_EZ_DATA018 EQU CYREG_SCB0_EZ_DATA18
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA019
CYREG_SCB0_EZ_DATA019 EQU CYREG_SCB0_EZ_DATA19
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA020
CYREG_SCB0_EZ_DATA020 EQU CYREG_SCB0_EZ_DATA20
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA021
CYREG_SCB0_EZ_DATA021 EQU CYREG_SCB0_EZ_DATA21
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA022
CYREG_SCB0_EZ_DATA022 EQU CYREG_SCB0_EZ_DATA22
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA023
CYREG_SCB0_EZ_DATA023 EQU CYREG_SCB0_EZ_DATA23
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA024
CYREG_SCB0_EZ_DATA024 EQU CYREG_SCB0_EZ_DATA24
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA025
CYREG_SCB0_EZ_DATA025 EQU CYREG_SCB0_EZ_DATA25
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA026
CYREG_SCB0_EZ_DATA026 EQU CYREG_SCB0_EZ_DATA26
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA027
CYREG_SCB0_EZ_DATA027 EQU CYREG_SCB0_EZ_DATA27
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA028
CYREG_SCB0_EZ_DATA028 EQU CYREG_SCB0_EZ_DATA28
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA029
CYREG_SCB0_EZ_DATA029 EQU CYREG_SCB0_EZ_DATA29
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA030
CYREG_SCB0_EZ_DATA030 EQU CYREG_SCB0_EZ_DATA30
    ENDIF
    IF :LNOT::DEF:CYREG_SCB0_EZ_DATA031
CYREG_SCB0_EZ_DATA031 EQU CYREG_SCB0_EZ_DATA31
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA000
CYREG_SCB1_EZ_DATA000 EQU CYREG_SCB1_EZ_DATA0
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA001
CYREG_SCB1_EZ_DATA001 EQU CYREG_SCB1_EZ_DATA1
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA002
CYREG_SCB1_EZ_DATA002 EQU CYREG_SCB1_EZ_DATA2
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA003
CYREG_SCB1_EZ_DATA003 EQU CYREG_SCB1_EZ_DATA3
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA004
CYREG_SCB1_EZ_DATA004 EQU CYREG_SCB1_EZ_DATA4
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA005
CYREG_SCB1_EZ_DATA005 EQU CYREG_SCB1_EZ_DATA5
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA006
CYREG_SCB1_EZ_DATA006 EQU CYREG_SCB1_EZ_DATA6
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA007
CYREG_SCB1_EZ_DATA007 EQU CYREG_SCB1_EZ_DATA7
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA008
CYREG_SCB1_EZ_DATA008 EQU CYREG_SCB1_EZ_DATA8
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA009
CYREG_SCB1_EZ_DATA009 EQU CYREG_SCB1_EZ_DATA9
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA010
CYREG_SCB1_EZ_DATA010 EQU CYREG_SCB1_EZ_DATA10
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA011
CYREG_SCB1_EZ_DATA011 EQU CYREG_SCB1_EZ_DATA11
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA012
CYREG_SCB1_EZ_DATA012 EQU CYREG_SCB1_EZ_DATA12
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA013
CYREG_SCB1_EZ_DATA013 EQU CYREG_SCB1_EZ_DATA13
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA014
CYREG_SCB1_EZ_DATA014 EQU CYREG_SCB1_EZ_DATA14
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA015
CYREG_SCB1_EZ_DATA015 EQU CYREG_SCB1_EZ_DATA15
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA016
CYREG_SCB1_EZ_DATA016 EQU CYREG_SCB1_EZ_DATA16
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA017
CYREG_SCB1_EZ_DATA017 EQU CYREG_SCB1_EZ_DATA17
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA018
CYREG_SCB1_EZ_DATA018 EQU CYREG_SCB1_EZ_DATA18
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA019
CYREG_SCB1_EZ_DATA019 EQU CYREG_SCB1_EZ_DATA19
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA020
CYREG_SCB1_EZ_DATA020 EQU CYREG_SCB1_EZ_DATA20
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA021
CYREG_SCB1_EZ_DATA021 EQU CYREG_SCB1_EZ_DATA21
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA022
CYREG_SCB1_EZ_DATA022 EQU CYREG_SCB1_EZ_DATA22
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA023
CYREG_SCB1_EZ_DATA023 EQU CYREG_SCB1_EZ_DATA23
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA024
CYREG_SCB1_EZ_DATA024 EQU CYREG_SCB1_EZ_DATA24
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA025
CYREG_SCB1_EZ_DATA025 EQU CYREG_SCB1_EZ_DATA25
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA026
CYREG_SCB1_EZ_DATA026 EQU CYREG_SCB1_EZ_DATA26
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA027
CYREG_SCB1_EZ_DATA027 EQU CYREG_SCB1_EZ_DATA27
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA028
CYREG_SCB1_EZ_DATA028 EQU CYREG_SCB1_EZ_DATA28
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA029
CYREG_SCB1_EZ_DATA029 EQU CYREG_SCB1_EZ_DATA29
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA030
CYREG_SCB1_EZ_DATA030 EQU CYREG_SCB1_EZ_DATA30
    ENDIF
    IF :LNOT::DEF:CYREG_SCB1_EZ_DATA031
CYREG_SCB1_EZ_DATA031 EQU CYREG_SCB1_EZ_DATA31
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG00
CYREG_SAR_CHAN_CONFIG00 EQU CYREG_SAR_CHAN_CONFIG0
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG01
CYREG_SAR_CHAN_CONFIG01 EQU CYREG_SAR_CHAN_CONFIG1
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG02
CYREG_SAR_CHAN_CONFIG02 EQU CYREG_SAR_CHAN_CONFIG2
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG03
CYREG_SAR_CHAN_CONFIG03 EQU CYREG_SAR_CHAN_CONFIG3
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG04
CYREG_SAR_CHAN_CONFIG04 EQU CYREG_SAR_CHAN_CONFIG4
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG05
CYREG_SAR_CHAN_CONFIG05 EQU CYREG_SAR_CHAN_CONFIG5
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG06
CYREG_SAR_CHAN_CONFIG06 EQU CYREG_SAR_CHAN_CONFIG6
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG07
CYREG_SAR_CHAN_CONFIG07 EQU CYREG_SAR_CHAN_CONFIG7
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG08
CYREG_SAR_CHAN_CONFIG08 EQU CYREG_SAR_CHAN_CONFIG8
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_CONFIG09
CYREG_SAR_CHAN_CONFIG09 EQU CYREG_SAR_CHAN_CONFIG9
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK00
CYREG_SAR_CHAN_WORK00 EQU CYREG_SAR_CHAN_WORK0
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK01
CYREG_SAR_CHAN_WORK01 EQU CYREG_SAR_CHAN_WORK1
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK02
CYREG_SAR_CHAN_WORK02 EQU CYREG_SAR_CHAN_WORK2
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK03
CYREG_SAR_CHAN_WORK03 EQU CYREG_SAR_CHAN_WORK3
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK04
CYREG_SAR_CHAN_WORK04 EQU CYREG_SAR_CHAN_WORK4
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK05
CYREG_SAR_CHAN_WORK05 EQU CYREG_SAR_CHAN_WORK5
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK06
CYREG_SAR_CHAN_WORK06 EQU CYREG_SAR_CHAN_WORK6
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK07
CYREG_SAR_CHAN_WORK07 EQU CYREG_SAR_CHAN_WORK7
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK08
CYREG_SAR_CHAN_WORK08 EQU CYREG_SAR_CHAN_WORK8
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_WORK09
CYREG_SAR_CHAN_WORK09 EQU CYREG_SAR_CHAN_WORK9
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT00
CYREG_SAR_CHAN_RESULT00 EQU CYREG_SAR_CHAN_RESULT0
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT01
CYREG_SAR_CHAN_RESULT01 EQU CYREG_SAR_CHAN_RESULT1
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT02
CYREG_SAR_CHAN_RESULT02 EQU CYREG_SAR_CHAN_RESULT2
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT03
CYREG_SAR_CHAN_RESULT03 EQU CYREG_SAR_CHAN_RESULT3
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT04
CYREG_SAR_CHAN_RESULT04 EQU CYREG_SAR_CHAN_RESULT4
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT05
CYREG_SAR_CHAN_RESULT05 EQU CYREG_SAR_CHAN_RESULT5
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT06
CYREG_SAR_CHAN_RESULT06 EQU CYREG_SAR_CHAN_RESULT6
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT07
CYREG_SAR_CHAN_RESULT07 EQU CYREG_SAR_CHAN_RESULT7
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT08
CYREG_SAR_CHAN_RESULT08 EQU CYREG_SAR_CHAN_RESULT8
    ENDIF
    IF :LNOT::DEF:CYREG_SAR_CHAN_RESULT09
CYREG_SAR_CHAN_RESULT09 EQU CYREG_SAR_CHAN_RESULT9
    ENDIF
    END
